Simon Pilgrim 4e9b9cbee9 [X86][AVX512] Add support for v4i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets ...

Use 512-bit instructions with subvector insertion/extraction like we do in a number of similar circumstances

llvm-svn: 287762

2016-11-23 14:01:18 +00:00

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AArch64

[SLP] Avoid signed integer overflow

2016-08-23 20:48:50 +00:00

AMDGPU

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ARM

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PowerPC

[SLP] Pass in correct alignment when query memory access cost

2016-05-31 20:41:19 +00:00

X86

[X86][AVX512] Add support for v4i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets

2016-11-23 14:01:18 +00:00

XCore

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