94503c7bc3
Summary: This change extends MachineCopyPropagation to do COPY source forwarding and adds an additional run of the pass to the default pass pipeline just after register allocation. This version of this patch uses the newly added MachineOperand::isRenamable bit to avoid forwarding registers is such a way as to violate constraints that aren't captured in the Machine IR (e.g. ABI or ISA constraints). This change is a continuation of the work started in D30751. Reviewers: qcolombet, javed.absar, MatzeB, jonpa, tstellar Subscribers: tpr, mgorny, mcrosier, nhaehnle, nemanjai, jyknight, hfinkel, arsenm, inouehrs, eraman, sdardis, guyblank, fedor.sergeev, aheejin, dschuff, jfb, myatsina, llvm-commits Differential Revision: https://reviews.llvm.org/D41835 llvm-svn: 323991
337 lines
11 KiB
LLVM
337 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
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declare double @__sqrt_finite(double)
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declare float @__sqrtf_finite(float)
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declare x86_fp80 @__sqrtl_finite(x86_fp80)
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declare float @llvm.sqrt.f32(float)
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declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)
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declare <8 x float> @llvm.sqrt.v8f32(<8 x float>)
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define double @finite_f64_no_estimate(double %d) #0 {
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; SSE-LABEL: finite_f64_no_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtsd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: finite_f64_no_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%call = tail call double @__sqrt_finite(double %d) #2
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ret double %call
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}
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; No estimates for doubles.
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define double @finite_f64_estimate(double %d) #1 {
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; SSE-LABEL: finite_f64_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtsd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: finite_f64_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%call = tail call double @__sqrt_finite(double %d) #2
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ret double %call
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}
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define float @finite_f32_no_estimate(float %f) #0 {
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; SSE-LABEL: finite_f32_no_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtss %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: finite_f32_no_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%call = tail call float @__sqrtf_finite(float %f) #2
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ret float %call
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}
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define float @finite_f32_estimate(float %f) #1 {
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; SSE-LABEL: finite_f32_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtss %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm0, %xmm2
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; SSE-NEXT: mulss %xmm1, %xmm2
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; SSE-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
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; SSE-NEXT: mulss %xmm2, %xmm3
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; SSE-NEXT: mulss %xmm1, %xmm2
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; SSE-NEXT: addss {{.*}}(%rip), %xmm2
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; SSE-NEXT: mulss %xmm3, %xmm2
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; SSE-NEXT: xorps %xmm1, %xmm1
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; SSE-NEXT: cmpeqss %xmm1, %xmm0
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; SSE-NEXT: andnps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: finite_f32_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm1
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; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm2
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; AVX-NEXT: vmulss %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vaddss {{.*}}(%rip), %xmm1, %xmm1
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; AVX-NEXT: vmulss {{.*}}(%rip), %xmm2, %xmm2
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; AVX-NEXT: vmulss %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; AVX-NEXT: vcmpeqss %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vandnps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%call = tail call float @__sqrtf_finite(float %f) #2
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ret float %call
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}
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define x86_fp80 @finite_f80_no_estimate(x86_fp80 %ld) #0 {
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; CHECK-LABEL: finite_f80_no_estimate:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fsqrt
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; CHECK-NEXT: retq
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%call = tail call x86_fp80 @__sqrtl_finite(x86_fp80 %ld) #2
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ret x86_fp80 %call
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}
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; Don't die on the impossible.
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define x86_fp80 @finite_f80_estimate_but_no(x86_fp80 %ld) #1 {
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; CHECK-LABEL: finite_f80_estimate_but_no:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
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; CHECK-NEXT: fsqrt
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; CHECK-NEXT: retq
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%call = tail call x86_fp80 @__sqrtl_finite(x86_fp80 %ld) #2
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ret x86_fp80 %call
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}
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; PR34994 - https://bugs.llvm.org/show_bug.cgi?id=34994
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define float @sqrtf_check_denorms(float %x) #3 {
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; SSE-LABEL: sqrtf_check_denorms:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtss %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm0, %xmm2
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; SSE-NEXT: mulss %xmm1, %xmm2
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; SSE-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
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; SSE-NEXT: mulss %xmm2, %xmm3
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; SSE-NEXT: mulss %xmm1, %xmm2
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; SSE-NEXT: addss {{.*}}(%rip), %xmm2
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; SSE-NEXT: mulss %xmm3, %xmm2
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; SSE-NEXT: andps {{.*}}(%rip), %xmm0
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; SSE-NEXT: cmpltss {{.*}}(%rip), %xmm0
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; SSE-NEXT: andnps %xmm2, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: sqrtf_check_denorms:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm1
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; AVX-NEXT: vmulss %xmm1, %xmm0, %xmm2
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; AVX-NEXT: vmulss %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vaddss {{.*}}(%rip), %xmm1, %xmm1
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; AVX-NEXT: vmulss {{.*}}(%rip), %xmm2, %xmm2
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; AVX-NEXT: vmulss %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vcmpltss {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vandnps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%call = tail call float @__sqrtf_finite(float %x) #2
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ret float %call
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}
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define <4 x float> @sqrt_v4f32_check_denorms(<4 x float> %x) #3 {
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; SSE-LABEL: sqrt_v4f32_check_denorms:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtps %xmm0, %xmm2
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; SSE-NEXT: movaps %xmm0, %xmm1
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; SSE-NEXT: mulps %xmm2, %xmm1
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; SSE-NEXT: movaps {{.*#+}} xmm3 = [-5.000000e-01,-5.000000e-01,-5.000000e-01,-5.000000e-01]
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; SSE-NEXT: mulps %xmm1, %xmm3
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; SSE-NEXT: mulps %xmm2, %xmm1
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; SSE-NEXT: addps {{.*}}(%rip), %xmm1
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; SSE-NEXT: mulps %xmm3, %xmm1
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; SSE-NEXT: andps {{.*}}(%rip), %xmm0
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; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.175494e-38,1.175494e-38,1.175494e-38,1.175494e-38]
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; SSE-NEXT: cmpleps %xmm0, %xmm2
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; SSE-NEXT: andps %xmm2, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: sqrt_v4f32_check_denorms:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtps %xmm0, %xmm1
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; AVX-NEXT: vmulps %xmm1, %xmm0, %xmm2
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; AVX-NEXT: vmulps {{.*}}(%rip), %xmm2, %xmm3
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; AVX-NEXT: vmulps %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vaddps {{.*}}(%rip), %xmm1, %xmm1
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; AVX-NEXT: vmulps %xmm1, %xmm3, %xmm1
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; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vmovaps {{.*#+}} xmm2 = [1.175494e-38,1.175494e-38,1.175494e-38,1.175494e-38]
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; AVX-NEXT: vcmpleps %xmm0, %xmm2, %xmm0
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; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%call = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x) #2
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ret <4 x float> %call
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}
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define float @f32_no_estimate(float %x) #0 {
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; SSE-LABEL: f32_no_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtss %xmm0, %xmm1
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; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; SSE-NEXT: divss %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: f32_no_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; AVX-NEXT: vdivss %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%sqrt = tail call float @llvm.sqrt.f32(float %x)
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%div = fdiv fast float 1.0, %sqrt
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ret float %div
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}
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define float @f32_estimate(float %x) #1 {
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; SSE-LABEL: f32_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtss %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm2
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; SSE-NEXT: mulss %xmm1, %xmm2
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; SSE-NEXT: mulss %xmm0, %xmm2
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; SSE-NEXT: addss {{.*}}(%rip), %xmm2
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; SSE-NEXT: mulss {{.*}}(%rip), %xmm1
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; SSE-NEXT: mulss %xmm2, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: f32_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm1
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; AVX-NEXT: vmulss %xmm1, %xmm1, %xmm2
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; AVX-NEXT: vmulss %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vaddss {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vmulss {{.*}}(%rip), %xmm1, %xmm1
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; AVX-NEXT: vmulss %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%sqrt = tail call float @llvm.sqrt.f32(float %x)
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%div = fdiv fast float 1.0, %sqrt
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ret float %div
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}
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define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 {
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; SSE-LABEL: v4f32_no_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtps %xmm0, %xmm1
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; SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
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; SSE-NEXT: divps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: v4f32_no_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtps %xmm0, %xmm0
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; AVX-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
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; AVX-NEXT: vdivps %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%sqrt = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
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%div = fdiv fast <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %sqrt
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ret <4 x float> %div
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}
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define <4 x float> @v4f32_estimate(<4 x float> %x) #1 {
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; SSE-LABEL: v4f32_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtps %xmm0, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm2
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; SSE-NEXT: mulps %xmm1, %xmm2
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; SSE-NEXT: mulps %xmm0, %xmm2
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; SSE-NEXT: addps {{.*}}(%rip), %xmm2
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; SSE-NEXT: mulps {{.*}}(%rip), %xmm1
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; SSE-NEXT: mulps %xmm2, %xmm1
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: v4f32_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtps %xmm0, %xmm1
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; AVX-NEXT: vmulps %xmm1, %xmm1, %xmm2
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; AVX-NEXT: vmulps %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vmulps {{.*}}(%rip), %xmm1, %xmm1
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; AVX-NEXT: vmulps %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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%sqrt = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)
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%div = fdiv fast <4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, %sqrt
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ret <4 x float> %div
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}
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define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 {
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; SSE-LABEL: v8f32_no_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtps %xmm1, %xmm2
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; SSE-NEXT: sqrtps %xmm0, %xmm3
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; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
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; SSE-NEXT: movaps %xmm1, %xmm0
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; SSE-NEXT: divps %xmm3, %xmm0
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; SSE-NEXT: divps %xmm2, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: v8f32_no_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtps %ymm0, %ymm0
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; AVX-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
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; AVX-NEXT: vdivps %ymm0, %ymm1, %ymm0
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; AVX-NEXT: retq
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%sqrt = tail call <8 x float> @llvm.sqrt.v8f32(<8 x float> %x)
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%div = fdiv fast <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %sqrt
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ret <8 x float> %div
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}
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define <8 x float> @v8f32_estimate(<8 x float> %x) #1 {
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; SSE-LABEL: v8f32_estimate:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtps %xmm0, %xmm3
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; SSE-NEXT: movaps {{.*#+}} xmm4 = [-5.000000e-01,-5.000000e-01,-5.000000e-01,-5.000000e-01]
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; SSE-NEXT: movaps %xmm3, %xmm2
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; SSE-NEXT: mulps %xmm3, %xmm2
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; SSE-NEXT: mulps %xmm0, %xmm2
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; SSE-NEXT: movaps {{.*#+}} xmm0 = [-3.000000e+00,-3.000000e+00,-3.000000e+00,-3.000000e+00]
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; SSE-NEXT: addps %xmm0, %xmm2
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; SSE-NEXT: mulps %xmm4, %xmm2
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; SSE-NEXT: mulps %xmm3, %xmm2
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; SSE-NEXT: rsqrtps %xmm1, %xmm5
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; SSE-NEXT: movaps %xmm5, %xmm3
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; SSE-NEXT: mulps %xmm5, %xmm3
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; SSE-NEXT: mulps %xmm1, %xmm3
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; SSE-NEXT: addps %xmm0, %xmm3
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; SSE-NEXT: mulps %xmm4, %xmm3
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; SSE-NEXT: mulps %xmm5, %xmm3
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; SSE-NEXT: movaps %xmm2, %xmm0
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; SSE-NEXT: movaps %xmm3, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: v8f32_estimate:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtps %ymm0, %ymm1
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; AVX-NEXT: vmulps %ymm1, %ymm1, %ymm2
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; AVX-NEXT: vmulps %ymm2, %ymm0, %ymm0
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; AVX-NEXT: vaddps {{.*}}(%rip), %ymm0, %ymm0
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; AVX-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1
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; AVX-NEXT: vmulps %ymm0, %ymm1, %ymm0
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; AVX-NEXT: retq
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%sqrt = tail call <8 x float> @llvm.sqrt.v8f32(<8 x float> %x)
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%div = fdiv fast <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %sqrt
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ret <8 x float> %div
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}
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attributes #0 = { "unsafe-fp-math"="true" "reciprocal-estimates"="!sqrtf,!vec-sqrtf,!divf,!vec-divf" }
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attributes #1 = { "unsafe-fp-math"="true" "reciprocal-estimates"="sqrt,vec-sqrt" }
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attributes #2 = { nounwind readnone }
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attributes #3 = { "unsafe-fp-math"="true" "reciprocal-estimates"="sqrt,vec-sqrt" "denormal-fp-math"="ieee" }
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