a1710eb3cd
The LIT test cases were migrated with the script provided by Nikita Popov. No manual changes were made. Committed without review since no functional changes, after consultation with uweigand.
93 lines
2.5 KiB
LLVM
93 lines
2.5 KiB
LLVM
; Test load-and-trap instructions (LFHAT)
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; See comments in asm-18.ll about testing high-word operations.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 \
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; RUN: -no-integrated-as | FileCheck %s
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declare void @llvm.trap()
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; Check LAT with no displacement.
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define void @f1(ptr %ptr) {
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; CHECK-LABEL: f1:
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; CHECK: lfhat [[REG:%r[0-9]+]], 0(%r2)
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; CHECK: stepa [[REG]]
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; CHECK: br %r14
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entry:
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%val = load i32, ptr %ptr
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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if.end: ; preds = %entry
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call void asm sideeffect "stepa $0", "h"(i32 %val)
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ret void;
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}
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; Check the high end of the LAT range.
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define void @f2(ptr %src) {
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; CHECK-LABEL: f2:
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; CHECK: lfhat [[REG:%r[0-9]+]], 524284(%r2)
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; CHECK: stepa [[REG]]
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 131071
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%val = load i32, ptr %ptr
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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if.end: ; preds = %entry
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call void asm sideeffect "stepa $0", "h"(i32 %val)
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ret void;
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f3(ptr %src) {
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; CHECK-LABEL: f3:
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; CHECK: agfi %r2, 524288
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; CHECK: lfhat [[REG:%r[0-9]+]], 0(%r2)
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; CHECK: stepa [[REG]]
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; CHECK: br %r14
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%ptr = getelementptr i32, ptr %src, i64 131072
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%val = load i32, ptr %ptr
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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if.end: ; preds = %entry
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call void asm sideeffect "stepa $0", "h"(i32 %val)
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ret void;
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}
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; Check that LAT allows an index.
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define void @f4(i64 %src, i64 %index) {
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; CHECK-LABEL: f4:
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; CHECK: lfhat [[REG:%r[0-9]+]], 524287(%r3,%r2)
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; CHECK: stepa [[REG]]
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524287
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%ptr = inttoptr i64 %add2 to ptr
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%val = load i32, ptr %ptr
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void @llvm.trap()
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unreachable
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if.end: ; preds = %entry
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call void asm sideeffect "stepa $0", "h"(i32 %val)
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ret void;
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}
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