29441e4f5f
This PR removes the old `nocapture` attribute, replacing it with the new `captures` attribute introduced in #116990. This change is intended to be essentially NFC, replacing existing uses of `nocapture` with `captures(none)` without adding any new analysis capabilities. Making use of non-`none` values is left for a followup. Some notes: * `nocapture` will be upgraded to `captures(none)` by the bitcode reader. * `nocapture` will also be upgraded by the textual IR reader. This is to make it easier to use old IR files and somewhat reduce the test churn in this PR. * Helper APIs like `doesNotCapture()` will check for `captures(none)`. * MLIR import will convert `captures(none)` into an `llvm.nocapture` attribute. The representation in the LLVM IR dialect should be updated separately.
101 lines
5.0 KiB
LLVM
101 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes=loop-vectorize,instcombine -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Check that the interleaved-mem-access analysis currently does not create an
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; interleave group for the access to array 'in' due to the possibly wrapping
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; unsigned 'out_ix' index.
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;
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; In this test the interleave-group of the loads is not full (has gaps), so
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; the wrapping checks are necessary. Here this cannot be done statically so
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; runtime checks are needed, but with Assume=false getPtrStride cannot add
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; runtime checks and as a result we can't create the interleave-group.
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;
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; #include <stdlib.h>
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; void test(ptr __restrict__ out, ptr __restrict__ in, size_t size)
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; {
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; for (size_t out_offset = 0; out_offset < size; ++out_offset)
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; {
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; float t0 = in[2*out_offset];
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; out[out_offset] = t0;
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; }
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; }
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define void @_Z4testPfS_m(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, i64 %size) local_unnamed_addr {
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; CHECK-LABEL: define void @_Z4testPfS_m(
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; CHECK-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], i64 [[SIZE:%.*]]) local_unnamed_addr {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[CMP7:%.*]] = icmp eq i64 [[SIZE]], 0
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; CHECK-NEXT: br i1 [[CMP7]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY_PREHEADER:.*]]
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; CHECK: [[FOR_BODY_PREHEADER]]:
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SIZE]], 5
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = and i64 [[SIZE]], 3
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; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[N_MOD_VF]], 0
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; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 4, i64 [[N_MOD_VF]]
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[SIZE]], [[TMP1]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[DOTIDX:%.*]] = shl i64 [[INDEX]], 3
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; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[DOTIDX]]
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; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP2]], align 4
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; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, ptr [[OUT]], i64 [[INDEX]]
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; CHECK-NEXT: store <4 x i32> [[STRIDED_VEC]], ptr [[TMP3]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[FOR_BODY_PREHEADER]] ]
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; CHECK-NEXT: br label %[[FOR_BODY:.*]]
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; CHECK: [[FOR_COND_CLEANUP_LOOPEXIT:.*]]:
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; CHECK-NEXT: br label %[[FOR_COND_CLEANUP]]
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; CHECK: [[FOR_COND_CLEANUP]]:
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; CHECK-NEXT: ret void
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; CHECK: [[FOR_BODY]]:
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; CHECK-NEXT: [[OUT_OFFSET_08:%.*]] = phi i64 [ [[INC:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
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; CHECK-NEXT: [[ARRAYIDX_IDX:%.*]] = shl i64 [[OUT_OFFSET_08]], 3
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[IN]], i64 [[ARRAYIDX_IDX]]
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; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds float, ptr [[OUT]], i64 [[OUT_OFFSET_08]]
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; CHECK-NEXT: store i32 [[TMP5]], ptr [[ARRAYIDX1]], align 4
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; CHECK-NEXT: [[INC]] = add nuw i64 [[OUT_OFFSET_08]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INC]], [[SIZE]]
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; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_COND_CLEANUP_LOOPEXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
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;
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entry:
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%cmp7 = icmp eq i64 %size, 0
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br i1 %cmp7, label %for.cond.cleanup, label %for.body.preheader
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for.body.preheader:
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br label %for.body
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for.cond.cleanup.loopexit:
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br label %for.cond.cleanup
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for.cond.cleanup:
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ret void
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for.body:
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%out_offset.08 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%mul = shl i64 %out_offset.08, 1
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%arrayidx = getelementptr inbounds float, ptr %in, i64 %mul
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%0 = load i32, ptr %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds float, ptr %out, i64 %out_offset.08
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store i32 %0, ptr %arrayidx1, align 4
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%inc = add nuw i64 %out_offset.08, 1
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%exitcond = icmp eq i64 %inc, %size
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br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
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}
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;.
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; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
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;.
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