This operation is produced and used by the super-vectorization passes and has been emitted as an abstract unregistered operation until now. For end-to-end testing purposes, it has to be eventually lowered to LLVM IR. Matching abstract operation by name goes into the opposite direction of the generic lowering approach that is expected to be used for LLVM IR lowering in the future. Register vector_type_cast operation as a part of the SuperVector dialect. Arguably, this operation is a special case of the `view` operation from the Standard dialect. The semantics of `view` is not fully specified at this point so it is safer to rely on a custom operation. Additionally, using a custom operation may help to achieve clear dialect separation. PiperOrigin-RevId: 225887305
257 lines
9.7 KiB
C++
257 lines
9.7 KiB
C++
//===- LowerVectorTransfers.cpp - LowerVectorTransfers Pass Impl *- C++ -*-===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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//
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// This file implements target-dependent lowering of vector transfer operations.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Analysis/AffineAnalysis.h"
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#include "mlir/Analysis/MLFunctionMatcher.h"
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#include "mlir/Analysis/Utils.h"
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#include "mlir/Analysis/VectorAnalysis.h"
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#include "mlir/IR/AffineExpr.h"
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#include "mlir/IR/AffineMap.h"
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#include "mlir/IR/Attributes.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/Location.h"
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#include "mlir/IR/MLValue.h"
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#include "mlir/IR/OperationSupport.h"
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#include "mlir/IR/SSAValue.h"
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#include "mlir/IR/Types.h"
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#include "mlir/Pass.h"
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#include "mlir/StandardOps/StandardOps.h"
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#include "mlir/SuperVectorOps/SuperVectorOps.h"
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#include "mlir/Support/Functional.h"
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#include "mlir/Support/LLVM.h"
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#include "mlir/Transforms/Passes.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <type_traits>
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///
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/// Implements lowering of VectorTransferReadOp and VectorTransferWriteOp to a
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/// proper abstraction for the hardware.
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///
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/// For now only a simple loop nest is emitted.
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///
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using llvm::dbgs;
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using llvm::SetVector;
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using namespace mlir;
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#define DEBUG_TYPE "lower-vector-transfers"
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namespace {
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struct LowerVectorTransfersPass : public FunctionPass {
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LowerVectorTransfersPass()
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: FunctionPass(&LowerVectorTransfersPass::passID) {}
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PassResult runOnMLFunction(MLFunction *f) override;
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// Thread-safe RAII contexts local to pass, BumpPtrAllocator freed on exit.
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MLFunctionMatcherContext mlContext;
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static char passID;
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};
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struct LowerVectorTransfersState {
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// Top of the function constant zero index.
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SSAValue *zero;
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};
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} // end anonymous namespace
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char LowerVectorTransfersPass::passID = 0;
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/// Creates the SSAValue for the sum of `a` and `b` without building a
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/// full-fledged AffineMap for all indices.
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///
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/// Prerequisites:
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/// `a` and `b` must be of IndexType.
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static SSAValue *add(MLFuncBuilder *b, Location loc, SSAValue *v, SSAValue *w) {
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assert(v->getType().isa<IndexType>() && "v must be of IndexType");
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assert(w->getType().isa<IndexType>() && "w must be of IndexType");
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auto *context = b->getContext();
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auto d0 = getAffineDimExpr(0, context);
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auto d1 = getAffineDimExpr(1, context);
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auto map = AffineMap::get(2, 0, {d0 + d1}, {});
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return b->create<AffineApplyOp>(loc, map, ArrayRef<SSAValue *>{v, w})
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->getResult(0);
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}
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/// Performs simple lowering into a combination of:
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/// 1. local memory allocation,
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/// 2. vector_load/vector_store from/to local buffer
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/// 3. perfect loop nest over scalar loads/stores from/to remote memory.
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///
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/// This is a simple sketch for now but does the job.
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// TODO(ntv): This function has a lot of code conditioned on the template
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// argument being one of the two types. Extract the common behavior into helper
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// functions and detemplatizing it.
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template <typename VectorTransferOpTy>
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static void lowerAsLoops(VectorTransferOpTy *transfer,
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const LowerVectorTransfersState &state) {
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static_assert(
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std::is_same<VectorTransferOpTy, VectorTransferReadOp>::value ||
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std::is_same<VectorTransferOpTy, VectorTransferWriteOp>::value,
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"Must be called on either VectorTransferReadOp or VectorTransferWriteOp");
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auto vectorType = transfer->getVectorType();
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auto vectorShape = vectorType.getShape();
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// tmpMemRefType is used for staging the transfer in a local scalar buffer.
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auto tmpMemRefType =
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MemRefType::get(vectorShape, vectorType.getElementType(), {}, 0);
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// vectorMemRefType is a view of tmpMemRefType as one vector.
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auto vectorMemRefType = MemRefType::get({1}, vectorType, {}, 0);
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MLFuncBuilder b(cast<OperationStmt>(transfer->getOperation()));
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// 1. First allocate the local buffer in fast memory.
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// TODO(ntv): CL memory space.
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// TODO(ntv): Allocation padding for potential bank conflicts (e.g. GPUs).
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auto tmpScalarAlloc = b.create<AllocOp>(transfer->getLoc(), tmpMemRefType);
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auto vecView = b.create<VectorTypeCastOp>(
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transfer->getLoc(), tmpScalarAlloc->getResult(), vectorMemRefType);
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// 2. Store the vector to local storage in case of a vector_transfer_write.
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// TODO(ntv): This vector_store operation should be further lowered in the
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// case of GPUs.
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if (std::is_same<VectorTransferOpTy, VectorTransferWriteOp>::value) {
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b.create<StoreOp>(vecView->getLoc(), transfer->getVector(),
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vecView->getResult(), ArrayRef<SSAValue *>{state.zero});
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}
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// 3. Emit the loop-nest.
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// TODO(ntv): Invert the mapping and indexing contiguously in the remote
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// memory.
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// TODO(ntv): Handle broadcast / slice properly.
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auto permutationMap = transfer->getPermutationMap();
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SetVector<ForStmt *> loops;
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SmallVector<SSAValue *, 8> accessIndices(transfer->getIndices());
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for (auto it : llvm::enumerate(transfer->getVectorType().getShape())) {
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auto composed = composeWithUnboundedMap(
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getAffineDimExpr(it.index(), b.getContext()), permutationMap);
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auto *forStmt = b.createFor(transfer->getLoc(), 0, it.value());
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loops.insert(forStmt);
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// Setting the insertion point to the innermost loop achieves nesting.
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b.setInsertionPointToStart(loops.back());
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if (composed == getAffineConstantExpr(0, b.getContext())) {
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transfer->emitWarning(
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"Redundant copy can be implemented as a vector broadcast");
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} else {
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auto dim = composed.template cast<AffineDimExpr>();
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assert(accessIndices.size() > dim.getPosition());
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accessIndices[dim.getPosition()] =
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::add(&b, transfer->getLoc(), accessIndices[dim.getPosition()],
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loops.back());
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}
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}
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// 4. Emit memory operations within the loops.
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// TODO(ntv): SelectOp + padding value for load out-of-bounds.
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if (std::is_same<VectorTransferOpTy, VectorTransferReadOp>::value) {
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// VectorTransferReadOp.
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// a. read scalar from remote;
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// b. write scalar to local.
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auto scalarLoad = b.create<LoadOp>(transfer->getLoc(),
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transfer->getMemRef(), accessIndices);
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b.create<StoreOp>(
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transfer->getLoc(), scalarLoad->getResult(),
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tmpScalarAlloc->getResult(),
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functional::map([](SSAValue *val) { return val; }, loops));
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} else {
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// VectorTransferWriteOp.
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// a. read scalar from local;
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// b. write scalar to remote.
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auto scalarLoad = b.create<LoadOp>(
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transfer->getLoc(), tmpScalarAlloc->getResult(),
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functional::map([](SSAValue *val) { return val; }, loops));
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b.create<StoreOp>(transfer->getLoc(), scalarLoad->getResult(),
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transfer->getMemRef(), accessIndices);
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}
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// 5. Read the vector from local storage in case of a vector_transfer_read.
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// TODO(ntv): This vector_load operation should be further lowered in the
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// case of GPUs.
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if (std::is_same<VectorTransferOpTy, VectorTransferReadOp>::value) {
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b.setInsertionPoint(cast<OperationStmt>(transfer->getOperation()));
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auto *vector = b.create<LoadOp>(transfer->getLoc(), vecView->getResult(),
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ArrayRef<SSAValue *>{state.zero})
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->getResult();
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transfer->getVector()->replaceAllUsesWith(vector);
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}
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// 6. Free the local buffer.
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b.setInsertionPoint(cast<OperationStmt>(transfer->getOperation()));
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b.create<DeallocOp>(transfer->getLoc(), tmpScalarAlloc);
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// 7. It is now safe to erase the statement.
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transfer->erase();
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}
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PassResult LowerVectorTransfersPass::runOnMLFunction(MLFunction *f) {
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LowerVectorTransfersState state;
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{
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MLFuncBuilder b(f);
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b.setInsertionPointToStart(f);
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state.zero = b.create<ConstantIndexOp>(b.getUnknownLoc(), 0);
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}
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using matcher::Op;
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LLVM_DEBUG(dbgs() << "\nLowerVectorTransfersPass on MLFunction\n");
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LLVM_DEBUG(f->print(dbgs()));
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// Avoid any read/write ordering considerations: do it in 2 steps.
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// 1. vector_transfer_reads;
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auto filterReads = [](const Statement &stmt) {
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const auto &opStmt = cast<OperationStmt>(stmt);
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return opStmt.isa<VectorTransferReadOp>();
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};
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for (auto m : Op(filterReads).match(f)) {
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auto read = cast<OperationStmt>(m.first)->cast<VectorTransferReadOp>();
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// TODO(ntv): Drop &* once lowerAsLoops is detemplatized.
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lowerAsLoops(&*read, state);
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}
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// 2. vector_transfer_writes;
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auto filterWrites = [](const Statement &stmt) {
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const auto &opStmt = cast<OperationStmt>(stmt);
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return opStmt.isa<VectorTransferWriteOp>();
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};
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for (auto m : Op(filterWrites).match(f)) {
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auto write = cast<OperationStmt>(m.first)->cast<VectorTransferWriteOp>();
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// TODO(ntv): Drop &* once lowerAsLoops is detemplatized.
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lowerAsLoops(&*write, state);
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}
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return PassResult::Success;
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}
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FunctionPass *mlir::createLowerVectorTransfersPass() {
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return new LowerVectorTransfersPass();
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}
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static PassRegistration<LowerVectorTransfersPass>
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pass("lower-vector-transfers", "Materializes vector transfer ops to a "
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"proper abstraction for the hardware");
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#undef DEBUG_TYPE
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