Update Sema Checking to always do an HLSL Array RValue cast in the case we are dealing with hlsl constant array types Instead of comparing canonical types, compare canonical unqualified types Add a test to show it is possible to assign an array from a cbuffer. Closes #133767
180 lines
7.9 KiB
HLSL
180 lines
7.9 KiB
HLSL
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -finclude-default-header -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s
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struct S {
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int x;
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float f;
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};
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// CHECK: [[CBLayout:%.*]] = type <{ [2 x float], [2 x <4 x i32>], [2 x [2 x i32]], [1 x target("dx.Layout", %S, 8, 0, 4)] }>
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// CHECK: @CBArrays.cb = global target("dx.CBuffer", target("dx.Layout", [[CBLayout]], 136, 0, 32, 64, 128))
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// CHECK: @c1 = external addrspace(2) global [2 x float], align 4
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// CHECK: @c2 = external addrspace(2) global [2 x <4 x i32>], align 16
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// CHECK: @c3 = external addrspace(2) global [2 x [2 x i32]], align 4
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// CHECK: @c4 = external addrspace(2) global [1 x target("dx.Layout", %S, 8, 0, 4)], align 4
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cbuffer CBArrays {
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float c1[2];
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int4 c2[2];
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int c3[2][2];
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S c4[1];
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}
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// CHECK-LABEL: define void {{.*}}arr_assign1
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign1() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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Arr = Arr2;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign2
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr3:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 [[Arr3]], i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign2() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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int Arr3[2] = {3, 4};
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Arr = Arr2 = Arr3;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign3
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// CHECK: [[Arr3:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[Arr4:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr4]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 [[Arr4]], i32 16, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign3() {
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int Arr2[2][2] = {{0, 0}, {1, 1}};
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int Arr3[2][2] = {{1, 1}, {0, 0}};
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Arr2 = Arr3;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign4
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x i32], ptr [[Arr]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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// CHECK-NEXT: ret void
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void arr_assign4() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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(Arr = Arr2)[0] = 6;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign5
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// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x i32], align 4
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// CHECK-NEXT: [[Arr3:%.*]] = alloca [2 x i32], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memset.p0.i32(ptr align 4 [[Arr2]], i8 0, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 [[Arr3]], i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 8, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x i32], ptr [[Arr]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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// CHECK-NEXT: ret void
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void arr_assign5() {
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int Arr[2] = {0, 1};
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int Arr2[2] = {0, 0};
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int Arr3[2] = {3, 4};
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(Arr = Arr2 = Arr3)[0] = 6;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign6
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// CHECK: [[Arr3:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[Arr4:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr4]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr3]], ptr align 4 [[Arr4]], i32 16, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[Arr3]], i32 0, i32 0
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// CHECK-NEXT: [[Idx2:%.*]] = getelementptr inbounds [2 x i32], ptr [[Idx]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx2]], align 4
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// CHECK-NEXT: ret void
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void arr_assign6() {
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int Arr[2][2] = {{0, 0}, {1, 1}};
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int Arr2[2][2] = {{1, 1}, {0, 0}};
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(Arr = Arr2)[0][0] = 6;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign7
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// CHECK: [[Arr:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: [[Arr2:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NOT: alloca
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr2]], ptr align 4 {{@.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[Arr]], ptr align 4 [[Arr2]], i32 16, i1 false)
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// CHECK-NEXT: [[Idx:%.*]] = getelementptr inbounds [2 x [2 x i32]], ptr [[Arr]], i32 0, i32 0
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// CHECK-NEXT: store i32 6, ptr [[Idx]], align 4
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// CHECK-NEXT: [[Idx2:%.*]] = getelementptr inbounds i32, ptr %arrayidx, i32 1
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// CHECK-NEXT: store i32 6, ptr [[Idx2]], align 4
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// CHECK-NEXT: ret void
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void arr_assign7() {
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int Arr[2][2] = {{0, 1}, {2, 3}};
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int Arr2[2][2] = {{0, 0}, {1, 1}};
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(Arr = Arr2)[0] = {6, 6};
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}
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// Verify you can assign from a cbuffer array
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// CHECK-LABEL: define void {{.*}}arr_assign8
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// CHECK: [[C:%.*]] = alloca [2 x float], align 4
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[C]], ptr align 4 {{.*}}, i32 8, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p2.i32(ptr align 4 [[C]], ptr addrspace(2) align 4 @c1, i32 8, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign8() {
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float C[2] = {1.0, 2.0};
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C = c1;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign9
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// CHECK: [[C:%.*]] = alloca [2 x <4 x i32>], align 16
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 16 [[C]], ptr align 16 {{.*}}, i32 32, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p2.i32(ptr align 16 [[C]], ptr addrspace(2) align 16 @c2, i32 32, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign9() {
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int4 C[2] = {1,2,3,4,5,6,7,8};
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C = c2;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign10
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// CHECK: [[C:%.*]] = alloca [2 x [2 x i32]], align 4
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// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[C]], ptr align 4 {{.*}}, i32 16, i1 false)
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// CHECK-NEXT: call void @llvm.memcpy.p0.p2.i32(ptr align 4 [[C]], ptr addrspace(2) align 4 @c3, i32 16, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign10() {
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int C[2][2] = {1,2,3,4};
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C = c3;
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}
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// CHECK-LABEL: define void {{.*}}arr_assign11
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// CHECK: [[C:%.*]] = alloca [1 x %struct.S], align 4
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// CHECK: call void @llvm.memcpy.p0.p2.i32(ptr align 4 [[C]], ptr addrspace(2) align 4 @c4, i32 8, i1 false)
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// CHECK-NEXT: ret void
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void arr_assign11() {
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S s = {1, 2.0};
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S C[1] = {s};
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C = c4;
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}
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