caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
546e460a00a985ce6fca323fe509f7d4e893b621
clang-p2996/llvm/test/CodeGen/AArch64
History
Amara Emerson 546e460a00 [AArch64][GlobalISel] If a G_BUILD_VECTOR operands are all G_CONSTANT then assign to gpr bank. 
Even if the type is s8/s16, assigning to gpr is preferable with constants because
worst case we can select via a constant pool load, and without cross-bank copies
to the FPR bank more patterns can be imported later.
2020-09-25 18:27:57 -07:00
..
GlobalISel
[AArch64][GlobalISel] If a G_BUILD_VECTOR operands are all G_CONSTANT then assign to gpr bank.
2020-09-25 18:27:57 -07:00
128bit_load_store.ll
…
a57-csel.ll
…
aarch64_f16_be.ll
…
aarch64_tree_tests.ll
…
aarch64_win64cc_vararg.ll
…
aarch64-2014-08-11-MachineCombinerCrash.ll
…
aarch64-2014-12-02-combine-soften.ll
…
aarch64-a57-fp-load-balancing.ll
…
aarch64-address-type-promotion-assertion.ll
…
aarch64-address-type-promotion.ll
…
aarch64-addv.ll
[AArch64] Expand some vector of i64 reductions on NEON
2020-09-23 16:01:24 -05:00
aarch64-be-bv.ll
…
aarch64-bf16-dotprod-intrinsics.ll
[ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics
2020-08-27 18:43:16 +01:00
aarch64-bf16-ldst-intrinsics.ll
[AArch64]: BFloat Load/Store Intrinsics&CodeGen
2020-06-16 15:23:30 +01:00
aarch64-bif-gen.ll
…
aarch64-bit-gen.ll
…
aarch64-codegen-prepare-atp.ll
…
aarch64-combine-fmul-fsub.mir
…
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
…
aarch64-dynamic-stack-layout.ll
…
aarch64-fix-cortex-a53-835769.ll
…
aarch64-fold-lslfast.ll
…
aarch64-gep-opt.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
aarch64-insert-subvector-undef.ll
…
aarch64-interleaved-ld-combine.ll
…
aarch64-ldst-no-premature-sp-pop.mir
…
aarch64-ldst-subsuperReg-no-ldp.mir
[AArch64] Avoid pairing loads with same result reg
2020-09-22 16:25:08 -04:00
aarch64-loop-gep-opt.ll
…
aarch64-matmul.ll
…
aarch64-minmaxv.ll
…
aarch64-mov-debug-locs.mir
…
aarch64-named-reg-w18.ll
…
aarch64-named-reg-x18.ll
…
aarch64-neon-v1i1-setcc.ll
…
aarch64-signedreturnaddress.ll
[AArch64] __builtin_return_address for PAuth.
2020-09-24 23:23:49 +02:00
aarch64-smax-constantfold.ll
…
aarch64-smull.ll
…
aarch64-stp-cluster.ll
[Scheduling] Implement a new way to cluster loads/stores
2020-08-26 12:33:59 +00:00
aarch64-sve-asm-negative.ll
…
aarch64-sve-asm.ll
…
aarch64-tbz.ll
…
aarch64-tryBitfieldInsertOpFromOr-crash.ll
…
aarch64-vcvtfp2fxs-combine.ll
…
aarch64-vector-pcs.mir
…
aarch64-vuzp.ll
…
aarch64-wide-shuffle.ll
…
aarch-multipart.ll
…
adc.ll
…
addcarry-crash.ll
…
addg_subg.mir
…
addr-of-ret-addr.ll
…
addsub_ext.ll
…
addsub-constant-folding.ll
…
addsub-shifted.ll
…
addsub.ll
…
align-down.ll
…
alloca.ll
…
analyze-branch.ll
…
analyzecmp.ll
…
and-mask-removal.ll
…
and-sink.ll
…
andandshift.ll
…
apple-latest-cpu.ll
…
argument-blocks.ll
…
arm64_32-addrs.ll
…
arm64_32-atomics.ll
…
arm64_32-fastisel.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64_32-frame-pointers.ll
…
arm64_32-gep-sink.ll
…
arm64_32-memcpy.ll
…
arm64_32-neon.ll
…
arm64_32-null.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64_32-pointer-extend.ll
…
arm64_32-stack-pointers.ll
…
arm64_32-tls.ll
…
arm64_32-va.ll
…
arm64_32.ll
[AArch64] __builtin_return_address for PAuth.
2020-09-24 23:23:49 +02:00
arm64-2011-03-09-CPSRSpill.ll
…
arm64-2011-03-17-AsmPrinterCrash.ll
…
arm64-2011-03-21-Unaligned-Frame-Index.ll
…
arm64-2011-04-21-CPSRBug.ll
…
arm64-2011-10-18-LdStOptBug.ll
…
arm64-2012-01-11-ComparisonDAGCrash.ll
…
arm64-2012-05-07-DAGCombineVectorExtract.ll
…
arm64-2012-05-07-MemcpyAlignBug.ll
…
arm64-2012-05-09-LOADgot-bug.ll
…
arm64-2012-05-22-LdStOptBug.ll
…
arm64-2012-06-06-FPToUI.ll
…
arm64-2012-07-11-InstrEmitterBug.ll
…
arm64-2013-01-13-ffast-fcmp.ll
…
arm64-2013-01-23-frem-crash.ll
…
arm64-2013-01-23-sext-crash.ll
…
arm64-2013-02-12-shufv8i8.ll
…
arm64-aapcs-be.ll
…
arm64-aapcs.ll
Mark FMOV constant materialization as being as cheap as a move.
2020-09-10 16:38:59 +00:00
arm64-abi_align.ll
…
arm64-abi-varargs.ll
…
arm64-abi.ll
…
arm64-addp.ll
…
arm64-addr-mode-folding.ll
…
arm64-addr-type-promotion.ll
…
arm64-addrmode.ll
…
arm64-AdvSIMD-Scalar.ll
…
arm64-alloc-no-stack-realign.ll
…
arm64-alloca-frame-pointer-offset.ll
…
arm64-andCmpBrToTBZ.ll
…
arm64-ands-bad-peephole.ll
…
arm64-AnInfiniteLoopInDAGCombine.ll
…
arm64-anyregcc-crash.ll
…
arm64-anyregcc.ll
…
arm64-arith-saturating.ll
…
arm64-arith.ll
…
arm64-arm64-dead-def-elimination-flag.ll
…
arm64-assert-zext-sext.ll
[AArch64] Add tests for zext pattern match with AssertZext/AssertSext operand, NFC
2020-09-18 15:02:43 +08:00
arm64-atomic-128.ll
…
arm64-atomic.ll
…
arm64-bcc.ll
…
arm64-big-endian-bitconverts.ll
…
arm64-big-endian-eh.ll
…
arm64-big-endian-varargs.ll
…
arm64-big-endian-vector-callee.ll
…
arm64-big-endian-vector-caller.ll
…
arm64-big-imm-offsets.ll
…
arm64-big-stack.ll
…
arm64-bitfield-extract.ll
…
arm64-blockaddress.ll
…
arm64-build-vector.ll
…
arm64-builtins-linux.ll
…
arm64-call-tailcalls.ll
…
arm64-cast-opt.ll
…
arm64-ccmp-heuristics.ll
…
arm64-ccmp.ll
…
arm64-clrsb.ll
…
arm64-coalesce-ext.ll
…
arm64-coalescing-MOVi32imm.ll
…
arm64-code-model-large-darwin.ll
…
arm64-codegen-prepare-extload.ll
…
arm64-collect-loh-garbage-crash.ll
…
arm64-collect-loh-str.ll
…
arm64-collect-loh.ll
…
arm64-complex-ret.ll
…
arm64-const-addr.ll
…
arm64-convert-v4f64.ll
…
arm64-copy-tuple.ll
…
arm64-crc32.ll
…
arm64-crypto.ll
…
arm64-cse.ll
…
arm64-csel.ll
…
arm64-csldst-mmo.ll
…
arm64-custom-call-saved-reg.ll
…
arm64-cvt.ll
…
arm64-dagcombiner-convergence.ll
…
arm64-dagcombiner-dead-indexed-load.ll
…
arm64-dagcombiner-load-slicing.ll
…
arm64-darwin-cc.ll
…
arm64-dead-def-frame-index.ll
…
arm64-dead-register-def-bug.ll
…
arm64-detect-vec-redux.ll
…
arm64-dup.ll
…
arm64-early-ifcvt.ll
…
arm64-elf-calls.ll
…
arm64-elf-constpool.ll
…
arm64-elf-globals.ll
…
arm64-EXT-undef-mask.ll
…
arm64-ext.ll
…
arm64-extend-int-to-fp.ll
…
arm64-extend.ll
…
arm64-extload-knownzero.ll
…
arm64-extract_subvector.ll
…
arm64-extract.ll
…
arm64-fast-isel-addr-offset.ll
…
arm64-fast-isel-alloca.ll
…
arm64-fast-isel-br.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64-fast-isel-call.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64-fast-isel-conversion-fallback.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64-fast-isel-conversion.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64-fast-isel-fcmp.ll
…
arm64-fast-isel-gv.ll
…
arm64-fast-isel-icmp.ll
…
arm64-fast-isel-indirectbr.ll
…
arm64-fast-isel-intrinsic.ll
…
arm64-fast-isel-materialize.ll
…
arm64-fast-isel-noconvert.ll
…
arm64-fast-isel-rem.ll
…
arm64-fast-isel-ret.ll
…
arm64-fast-isel-store.ll
…
arm64-fast-isel.ll
…
arm64-fastcc-tailcall.ll
…
arm64-fastisel-gep-promote-before-add.ll
…
arm64-fcmp-opt.ll
…
arm64-fcopysign.ll
…
arm64-fixed-point-scalar-cvt-dagcombine.ll
…
arm64-fma-combine-with-fpfusion.ll
…
arm64-fma-combines.ll
…
arm64-fmadd.ll
…
arm64-fmax-safe.ll
…
arm64-fmax.ll
…
arm64-fminv.ll
…
arm64-fml-combines.ll
…
arm64-fmuladd.ll
…
arm64-fold-address.ll
…
arm64-fold-lsl.ll
…
arm64-fp128-folding.ll
…
arm64-fp128.ll
[SelectionDAG][GISel] Make LegalizeDAG lower FNEG using integer ops.
2020-09-23 14:10:33 -07:00
arm64-fp-contract-zero.ll
…
arm64-fp-imm-size.ll
[PGO][PGSO] Add profile guided size optimization to LegalizeDAG.
2020-07-15 10:03:38 -07:00
arm64-fp-imm.ll
…
arm64-fp.ll
…
arm64-fpcr.ll
…
arm64-frame-index.ll
…
arm64-global-address.ll
…
arm64-hello.ll
…
arm64-i16-subreg-extract.ll
…
arm64-icmp-opt.ll
…
arm64-indexed-memory.ll
…
arm64-indexed-vector-ldst-2.ll
…
arm64-indexed-vector-ldst.ll
…
arm64-inline-asm-error-I.ll
…
arm64-inline-asm-error-J.ll
…
arm64-inline-asm-error-K.ll
…
arm64-inline-asm-error-L.ll
…
arm64-inline-asm-error-M.ll
…
arm64-inline-asm-error-N.ll
…
arm64-inline-asm-zero-reg-error.ll
…
arm64-inline-asm.ll
…
arm64-join-reserved.ll
…
arm64-jumptable.ll
…
arm64-large-frame.ll
…
arm64-ld1.ll
…
arm64-ld-from-st.ll
…
arm64-ldp-aa.ll
…
arm64-ldp-cluster.ll
…
arm64-ldp.ll
…
arm64-ldst-unscaled-pre-post.mir
…
arm64-ldur.ll
…
arm64-ldxr-stxr.ll
…
arm64-leaf.ll
…
arm64-long-shift.ll
…
arm64-memcpy-inline.ll
…
arm64-memset-inline.ll
…
arm64-memset-to-bzero-pgso.ll
…
arm64-memset-to-bzero.ll
…
arm64-misaligned-memcpy-inline.ll
…
arm64-misched-basic-A53.ll
…
arm64-misched-basic-A57.ll
…
arm64-misched-forwarding-A53.ll
…
arm64-misched-memdep-bug.ll
…
arm64-misched-multimmo.ll
…
arm64-movi.ll
…
arm64-mte.ll
…
arm64-mul.ll
…
arm64-named-reg-alloc.ll
…
arm64-named-reg-notareg.ll
…
arm64-narrow-st-merge.ll
…
arm64-neg.ll
…
arm64-neon-2velem-high.ll
…
arm64-neon-2velem.ll
[AArch64] Optimize instruction selection for certain vector shuffles
2020-08-27 11:06:49 +01:00
arm64-neon-3vdiff.ll
…
arm64-neon-aba-abd.ll
…
arm64-neon-across.ll
…
arm64-neon-add-pairwise.ll
…
arm64-neon-add-sub.ll
…
arm64-neon-copy.ll
Regenerate neon copy tests. NFC.
2020-07-06 13:58:25 +01:00
arm64-neon-copyPhysReg-tuple.ll
…
arm64-neon-mul-div-cte.ll
…
arm64-neon-mul-div.ll
…
arm64-neon-scalar-by-elem-mul.ll
…
arm64-neon-select_cc.ll
…
arm64-neon-simd-ldst-one.ll
…
arm64-neon-simd-shift.ll
…
arm64-neon-simd-vget.ll
…
arm64-neon-v1i1-setcc.ll
…
arm64-neon-v8.1a.ll
…
arm64-neon-vector-list-spill.ll
…
arm64-neon-vector-shuffle-extract.ll
…
arm64-nvcast.ll
…
arm64-opt-remarks-lazy-bfi.ll
…
arm64-patchpoint-scratch-regs.ll
…
arm64-patchpoint-webkit_jscc.ll
…
arm64-patchpoint.ll
…
arm64-pic-local-symbol.ll
…
arm64-platform-reg.ll
…
arm64-popcnt.ll
…
arm64-prefetch.ll
…
arm64-preserve-most.ll
…
arm64-promote-const-complex-initializers.ll
…
arm64-promote-const.ll
…
arm64-redzone.ll
…
arm64-reg-copy-noneon.ll
…
arm64-register-offset-addressing.ll
…
arm64-register-pairing.ll
…
arm64-regress-f128csel-flags.ll
…
arm64-regress-interphase-shift.ll
…
arm64-regress-opt-cmp.mir
…
arm64-reserve-call-saved-reg.ll
…
arm64-reserved-arg-reg-call-error.ll
…
arm64-return-vector.ll
…
arm64-returnaddr.ll
[AArch64] __builtin_return_address for PAuth.
2020-09-24 23:23:49 +02:00
arm64-rev.ll
[AArch64][GlobalISel] Make <8 x s16> and <16 x s8> legal types for G_SHUFFLE_VECTOR and G_IMPLICIT_DEF.
2020-07-26 00:48:09 -07:00
arm64-rounding.ll
…
arm64-scaled_iv.ll
…
arm64-scvt.ll
…
arm64-setcc-int-to-fp-combine.ll
…
arm64-shifted-sext.ll
…
arm64-shrink-v1i64.ll
…
arm64-shrink-wrapping.ll
…
arm64-simd-scalar-to-vector.ll
…
arm64-simplest-elf.ll
…
arm64-sincos.ll
…
arm64-sitofp-combine-chains.ll
…
arm64-sli-sri-opt.ll
…
arm64-smaxv.ll
…
arm64-sminv.ll
…
arm64-spill-lr.ll
…
arm64-spill-remarks-treshold-hotness.ll
…
arm64-spill-remarks.ll
…
arm64-spill.ll
…
arm64-sqshl-uqshl-i64Contant.ll
…
arm64-st1.ll
…
arm64-stack-no-frame.ll
…
arm64-stackmap-nops.ll
…
arm64-stackmap.ll
…
arm64-stackpointer.ll
…
arm64-stacksave.ll
…
arm64-storebytesmerge.ll
…
arm64-stp-aa.ll
…
arm64-stp.ll
…
arm64-strict-align.ll
…
arm64-stur.ll
…
arm64-subsections.ll
…
arm64-subvector-extend.ll
…
arm64-summary-remarks.ll
…
arm64-swizzle-tbl-i16-layout.ll
…
arm64-tbl.ll
…
arm64-this-return.ll
…
arm64-tls-darwin.ll
[AArch64][GlobalISel] Fix TLS accesses clobbering registers incorrectly.
2020-07-21 16:01:17 -07:00
arm64-tls-dynamic-together.ll
…
arm64-tls-dynamics.ll
…
arm64-tls-initial-exec.ll
…
arm64-tls-local-exec.ll
…
arm64-trap.ll
…
arm64-triv-disjoint-mem-access.ll
…
arm64-trn.ll
…
arm64-trunc-store.ll
…
arm64-umaxv.ll
…
arm64-uminv.ll
…
arm64-umov.ll
…
arm64-unaligned_ldst.ll
…
arm64-uzp.ll
…
arm64-vaargs.ll
…
arm64-vabs.ll
[AArch64][GlobalISel] If a G_BUILD_VECTOR operands are all G_CONSTANT then assign to gpr bank.
2020-09-25 18:27:57 -07:00
arm64-vadd.ll
…
arm64-vaddlv.ll
…
arm64-vaddv.ll
…
arm64-variadic-aapcs.ll
…
arm64-vbitwise.ll
…
arm64-vclz.ll
…
arm64-vcmp.ll
…
arm64-vcnt.ll
…
arm64-vcombine.ll
…
arm64-vcvt_f32_su32.ll
…
arm64-vcvt_f.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
arm64-vcvt_n.ll
…
arm64-vcvt_su32_f32.ll
…
arm64-vcvt.ll
[AArch64][GlobalISel] Fix bug in fewVectorElts action while legalizing oversize G_FPTRUNC vectors.
2020-09-17 08:56:26 -07:00
arm64-vcvtxd_f32_f64.ll
…
arm64-vecCmpBr.ll
…
arm64-vecFold.ll
…
arm64-vector-ext.ll
…
arm64-vector-imm.ll
…
arm64-vector-insertion.ll
…
arm64-vector-ldst.ll
…
arm64-vext_reverse.ll
[AArch64] Optimize instruction selection for certain vector shuffles
2020-08-27 11:06:49 +01:00
arm64-vext.ll
…
arm64-vfloatintrinsics.ll
…
arm64-vhadd.ll
[ARM] Generate [SU]HADD from ((a + b) >> 1)
2020-07-21 13:22:07 +01:00
arm64-vhsub.ll
…
arm64-virtual_base.ll
…
arm64-vmax.ll
…
arm64-vminmaxnm.ll
…
arm64-vmovn.ll
…
arm64-vmul.ll
…
arm64-volatile.ll
…
arm64-vpopcnt.ll
…
arm64-vqadd.ll
…
arm64-vqsub.ll
…
arm64-vselect.ll
…
arm64-vsetcc_fp.ll
…
arm64-vshift.ll
…
arm64-vshr.ll
…
arm64-vshuffle.ll
…
arm64-vsqrt.ll
…
arm64-vsra.ll
…
arm64-vsub.ll
…
arm64-weak-reference.ll
…
arm64-windows-calls.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
arm64-windows-tailcall.ll
…
arm64-xaluo.ll
…
arm64-zero-cycle-regmov.ll
…
arm64-zero-cycle-zeroing.ll
[MachineScheduler] Fix the TopDepth/BotHeightReduce latency heuristics
2020-07-17 11:02:13 +01:00
arm64-zeroreg.ll
…
arm64-zext.ll
…
arm64-zextload-unscaled.ll
…
arm64-zip.ll
…
asm-large-immediate.ll
…
asm-print-comments.ll
…
asm-srcloc.ll
Fix FastISel dropping srcloc metadata from InlineAsm
2020-06-13 16:52:37 +01:00
assertion-rc-mismatch.ll
…
atomic-ops-lse.ll
…
atomic-ops-not-barriers.ll
…
atomic-ops.ll
…
autoupgrade-aarch64-neon-addp-float.ll
…
basic-pic.ll
…
bcmp-inline-small.ll
…
bf16-convert-intrinsics.ll
[BFloat] Add convert/copy instrinsic support
2020-06-23 14:27:05 +00:00
bf16-vector-bitcast.ll
[AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported
2020-08-28 11:44:37 +01:00
bf16-vector-shuffle.ll
[AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported
2020-08-28 11:44:37 +01:00
bf16.ll
[AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported
2020-08-28 11:44:37 +01:00
bics.ll
…
big-callframe.ll
…
bisect-post-ra-machine-sink.mir
…
bitcast-promote-widen.ll
…
bitcast-v2i8.ll
…
bitcast.ll
…
bitfield-extract.ll
…
bitfield-insert-0.ll
…
bitfield-insert.ll
…
bitfield.ll
…
bitreverse.ll
…
blockaddress.ll
…
bool-ext-inc.ll
…
bool-loads.ll
…
br-cond-not-merge.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
br-to-eh-lpad.ll
…
br-undef-cond.ll
…
branch-folder-merge-mmos.ll
…
branch-folder-oneinst.mir
…
branch-relax-alignment.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
branch-relax-asm.ll
…
branch-relax-bcc.ll
…
branch-relax-block-size.mir
…
branch-relax-cbz.ll
…
branch-target-enforcement-indirect-calls.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
branch-target-enforcement.mir
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
breg.ll
…
bswap-known-bits.ll
…
bti-branch-relaxation.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
build-one-lane.ll
[CodeGen] Ensure callers of CreateStackTemporary use sensible alignments
2020-06-09 08:10:17 +01:00
build-pair-isel.ll
…
build-vector-extract.ll
…
byval-type.ll
…
callbr-asm-label.ll
Change the INLINEASM_BR MachineInstr to be a non-terminating instruction.
2020-07-01 12:51:50 -04:00
callbr-asm-obj-file.ll
Change the INLINEASM_BR MachineInstr to be a non-terminating instruction.
2020-07-01 12:51:50 -04:00
callee-save.ll
…
ccmp-successor-probs.mir
…
cfguard-checks.ll
…
cfguard-module-flag.ll
…
cfi_restore.mir
…
cfinv-def-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
cfinv-use-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
cgp-trivial-phi-node.ll
…
cgp-usubo.ll
…
chkstk.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
cls.ll
…
cluster-frame-index.mir
…
cmp-bool.ll
[DAGCombiner] Rebuild (setcc x, y, ==) from (xor (xor x, y), 1)
2020-07-15 07:34:22 +00:00
cmp-const-max.ll
…
cmp-frameindex.ll
…
cmp-to-cmn.ll
…
cmpwithshort.ll
…
cmpxchg-idioms.ll
…
cmpxchg-lse-even-regs.ll
…
cmpxchg-O0.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
code-model-large-abs.ll
…
code-model-tiny-abs.ll
…
combine-and-like.ll
…
combine-comparisons-by-cse.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
combine-loads.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
compare-branch.ll
…
compiler-ident.ll
…
complex-copy-noneon.ll
…
complex-fp-to-int.ll
…
complex-int-to-fp.ll
…
concat_vector-scalar-combine.ll
…
concat_vector-truncate-combine.ll
…
concat_vector-truncated-scalar-combine.ll
…
cond-br-tuning.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
cond-sel-value-prop.ll
…
cond-sel.ll
…
const-shift-of-constmasked.ll
…
consthoist-gep.ll
…
convertphitype.ll
[CGP] Limit converting phi types to simple loads and stores
2020-09-14 12:08:34 +01:00
copyprop.mir
…
cpus.ll
[ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM
2020-07-10 18:24:11 +01:00
csel-zero-float.ll
…
csr-split.ll
…
cxx-tlscc.ll
…
dag-combine-invaraints.ll
…
dag-combine-mul-shl.ll
[AArch64] Regenerate dag-combine-mul-shl.ll checks
2020-09-24 13:42:03 +01:00
dag-combine-select.ll
…
dag-combine-trunc-build-vec.ll
…
dag-numsignbits.ll
[AArch64] Regenerate dag-numsignbits.ll checks
2020-09-24 18:40:49 +01:00
dbg-declare-tag-offset.ll
…
dbg-value-tag-offset.ll
…
debugtrap.ll
AArch64: emit @llvm.debugtrap as brk #0xf000 on all platforms
2020-07-20 10:31:26 +01:00
directcond.ll
…
div_minsize.ll
…
div-rem-pair-recomposition-signed.ll
…
div-rem-pair-recomposition-unsigned.ll
…
divrem.ll
…
dllexport.ll
…
dllimport.ll
…
dont-shrink-wrap-stack-mayloadorstore.mir
…
dont-take-over-the-world.ll
…
dp1.ll
…
dp2.ll
…
dp-3source.ll
…
dwarf-cfi.ll
…
early-ifcvt-regclass-mismatch.mir
…
eh_recoverfp.ll
…
eliminate-trunc.ll
…
emutls_generic.ll
…
emutls.ll
[X86][ELF] Prefer lowering MC_GlobalAddress operands to .Lfoo$local for STV_DEFAULT only
2020-08-14 00:09:15 +01:00
eon.ll
…
expand-movi-renamable.mir
…
expand-select.ll
…
ext-narrow-index.ll
…
extern-weak.ll
…
extra-callee-save.mir
…
extract-bits.ll
…
extract-insert.ll
…
extract-lowbits.ll
…
extract.ll
…
f16-convert.ll
…
f16-imm.ll
…
f16-instructions.ll
…
fabs.ll
…
fadd-combines.ll
[DAGCombiner] tighten fast-math constraints for fma fold
2020-07-12 08:51:49 -04:00
faddp-half.ll
[AArch64] Match pairwise add/fadd pattern
2020-09-17 16:27:01 +01:00
faddp.ll
[AArch64] Match pairwise add/fadd pattern
2020-09-17 16:27:01 +01:00
falkor-hwpf-fix.ll
…
falkor-hwpf-fix.mir
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
falkor-hwpf.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
fast-isel-address-extends.ll
…
fast-isel-addressing-modes.ll
…
fast-isel-assume.ll
…
fast-isel-atomic.ll
…
fast-isel-branch_weights.ll
…
fast-isel-branch-cond-mask.ll
…
fast-isel-branch-cond-split.ll
…
fast-isel-branch-uncond-debug.ll
…
fast-isel-call-return.ll
…
fast-isel-cbz.ll
…
fast-isel-cmp-branch.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
fast-isel-cmp-vec.ll
…
fast-isel-cmpxchg.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
fast-isel-dbg.ll
…
fast-isel-erase.ll
…
fast-isel-folded-shift.ll
…
fast-isel-folding.ll
…
fast-isel-gep.ll
…
fast-isel-int-ext2.ll
…
fast-isel-int-ext3.ll
…
fast-isel-int-ext4.ll
…
fast-isel-int-ext5.ll
…
fast-isel-int-ext.ll
…
fast-isel-intrinsic.ll
…
fast-isel-logic-op.ll
…
fast-isel-memcpy.ll
…
fast-isel-mul.ll
…
fast-isel-runtime-libcall.ll
…
fast-isel-sdiv.ll
…
fast-isel-select.ll
…
fast-isel-shift.ll
…
fast-isel-sp-adjust.ll
Reapply "RegAllocFast: Record internal state based on register units"
2020-09-18 14:05:18 -04:00
fast-isel-sqrt.ll
…
fast-isel-switch-phi.ll
…
fast-isel-tail-call.ll
…
fast-isel-tbz.ll
…
fast-isel-trunc.ll
…
fast-isel-vector-arithmetic.ll
…
fast-isel-vret.ll
…
fast-regalloc-empty-bb-with-liveins.mir
…
fastcc-reserved.ll
…
fastcc.ll
…
fastisel-debugvalue-undef.ll
…
fcmp.ll
…
fcopysign.ll
…
fcsel-zero.ll
…
fcvt_combine.ll
…
fcvt-fixed.ll
…
fcvt-int.ll
…
fdiv_combine.ll
…
fdiv-combine.ll
…
fence-singlethread.ll
…
fjcvtzs.ll
…
fjcvtzs.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
flags-multiuse.ll
…
floatdp_1source.ll
…
floatdp_2source.ll
…
fmov-imm-licm.ll
Mark FMOV constant materialization as being as cheap as a move.
2020-09-10 16:38:59 +00:00
fold-constants.ll
…
fold-global-offsets.ll
…
fp16_intrinsic_lane.ll
…
fp16_intrinsic_scalar_1op.ll
[AArch64] Add missing isel patterns for fcvtzs/u intrinsic on v1f64.
2020-08-03 13:04:59 -07:00
fp16_intrinsic_scalar_2op.ll
…
fp16_intrinsic_scalar_3op.ll
…
fp16_intrinsic_vector_1op.ll
…
fp16_intrinsic_vector_2op.ll
…
fp16_intrinsic_vector_3op.ll
…
fp16-fmla.ll
…
fp16-v4-instructions.ll
…
fp16-v8-instructions.ll
…
fp16-v16-instructions.ll
…
fp16-vector-bitcast.ll
…
fp16-vector-load-store.ll
…
fp16-vector-nvcast.ll
…
fp16-vector-shuffle.ll
…
fp128-folding.ll
…
fp-cond-sel.ll
Mark FMOV constant materialization as being as cheap as a move.
2020-09-10 16:38:59 +00:00
fp-const-fold.ll
[SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying to set them after the fact.:
2020-09-08 15:27:21 -07:00
fp-dp3.ll
…
fp-intrinsics.ll
…
fpconv-vector-op-scalarize-strict.ll
…
fpconv-vector-op-scalarize.ll
…
fpimm.ll
…
fptouint-i8-zext.ll
…
frameaddr.ll
…
framelayout-fp-csr.ll
Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain""
2020-09-01 19:29:03 +00:00
framelayout-frame-record.mir
Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain""
2020-09-01 19:29:03 +00:00
framelayout-offset-immediate-change.mir
…
framelayout-scavengingslot.mir
[AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.
2020-07-22 10:50:36 +01:00
framelayout-sve-basepointer.mir
[AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.
2020-07-22 10:50:36 +01:00
framelayout-sve-calleesaves-fix.mir
[AArch64][SVE] Fix calculation restore point for SVE callee saves.
2020-08-26 10:02:31 +01:00
framelayout-sve-scavengingslot.mir
[AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.
2020-07-22 10:50:36 +01:00
framelayout-sve.mir
[AArch64][SVE] Fix frame offset calculation when d8 is saved.
2020-09-23 11:33:53 -07:00
framelayout-unaligned-fp.ll
Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain""
2020-09-01 19:29:03 +00:00
free-zext.ll
…
ftrunc.ll
…
func-argpassing.ll
…
func-calls.ll
Mark FMOV constant materialization as being as cheap as a move.
2020-09-10 16:38:59 +00:00
funclet-local-stack-size.ll
…
funclet-match-add-sub-stack.ll
…
funcptr_cast.ll
Remove GlobalValue::getAlignment().
2020-06-23 19:13:42 -07:00
function-info-noredzone-present.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
[SelectionDAG] Better legalization for FSHL and FSHR
2020-08-21 10:32:49 +01:00
funnel-shift.ll
[SelectionDAG] Better legalization for FSHL and FSHR
2020-08-21 10:32:49 +01:00
gep-nullptr.ll
…
ghc-cc.ll
…
global-alignment.ll
Remove GlobalValue::getAlignment().
2020-06-23 19:13:42 -07:00
global-merge-1.ll
…
global-merge-2.ll
…
global-merge-3.ll
…
global-merge-4.ll
…
global-merge-group-by-use.ll
…
global-merge-hidden-minsize.ll
…
global-merge-ignore-single-use-minsize.ll
…
global-merge-ignore-single-use.ll
…
global-merge-minsize.ll
…
global-merge.ll
…
got-abuse.ll
…
half.ll
…
hints.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
[DAGCombiner] Enhance (zext(setcc))
2020-08-29 03:37:41 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[DAGCombiner] Enhance (zext(setcc))
2020-08-29 03:37:41 +00:00
hwasan-check-memaccess.ll
…
hwasan-prefer-fp.ll
…
i1-contents.ll
…
i128_volatile_load_store.ll
…
i128-align.ll
…
i128-fast-isel-fallback.ll
…
iabs.ll
…
ifcvt-select.ll
…
illegal-float-ops.ll
…
immcost.ll
…
implicit-null-check.ll
[AArch64] Teach analyzeBranch to remove branch equivelent to fallthrough
2020-09-22 14:38:27 -07:00
implicit-sret.ll
…
inc-of-add.ll
…
init-array.ll
…
inline-asm-blockaddress.ll
…
inline-asm-clobber.ll
…
inline-asm-constraints-badI.ll
…
inline-asm-constraints-badK2.ll
…
inline-asm-constraints-badK.ll
…
inline-asm-constraints-badL.ll
…
inline-asm-globaladdress.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-multilevel-gep.ll
…
inlineasm-illegal-type.ll
…
inlineasm-ldr-pseudo.ll
…
inlineasm-output-template.ll
…
inlineasm-S-constraint.ll
…
inlineasm-X-allocation.ll
…
inlineasm-X-constraint.ll
…
intrinsics-memory-barrier.ll
…
irg_sp_tagp.ll
…
irg-nomem.mir
…
irg.ll
…
isinf.ll
…
jti-correct-datatype.mir
…
jump-table-32.ll
…
jump-table-compress.mir
…
jump-table-duplicate.mir
AArch64: make sure jump table entries can reach entire image
2020-09-18 09:50:40 +01:00
jump-table-exynos.ll
AArch64: make sure jump table entries can reach entire image
2020-09-18 09:50:40 +01:00
jump-table.ll
AArch64: make sure jump table entries can reach entire image
2020-09-18 09:50:40 +01:00
known-never-nan.ll
…
lack-of-signed-truncation-check.ll
…
landingpad-ifcvt.ll
…
large_shift.ll
…
large-consts.ll
…
large-stack-cmp.ll
…
large-stack.ll
…
ldp-stp-scaled-unscaled-pairs.ll
…
ldradr.ll
…
ldst-miflags.mir
…
ldst-opt-aa.mir
…
ldst-opt-after-block-placement.ll
…
ldst-opt-mte-with-dbg.mir
…
ldst-opt-mte.mir
…
ldst-opt-non-imm-offset.mir
[AArch64] Fix ldst optimization of non-immediate store offset
2020-09-23 23:00:13 +08:00
ldst-opt-zr-clobber.mir
…
ldst-opt.ll
…
ldst-opt.mir
…
ldst-paired-aliasing.ll
…
ldst-regoffset.ll
…
ldst-unscaledimm.ll
…
ldst-unsignedimm.ll
…
ldst-zero.ll
…
legalize-bug-bogus-cpu.ll
…
legalize-uaddo.mir
…
lit.local.cfg
…
literal_pools_float.ll
…
live-interval-analysis.mir
…
llrint-conv-fp16.ll
…
llrint-conv.ll
…
llround-conv-fp16.ll
…
llround-conv.ll
…
llvm-ir-to-intrinsic.ll
[AArch64][SVE] Add patterns for integer mla/mls.
2020-08-18 12:51:16 -07:00
llvm-masked-gather-legal-for-sve.ll
[llvm][CodeGen] Do not scalarize llvm.masked.[gather|scatter] operating on scalable vectors.
2020-09-16 16:00:28 +00:00
llvm-masked-scatter-legal-for-sve.ll
[llvm][CodeGen] Do not scalarize llvm.masked.[gather|scatter] operating on scalable vectors.
2020-09-16 16:00:28 +00:00
load-combine-big-endian.ll
…
load-combine.ll
…
load-store-forwarding.ll
…
local_vars.ll
…
logical_shifted_reg.ll
…
logical-imm.ll
…
loh-use-between-adrp-add.mir
…
loh.mir
…
loop-micro-op-buffer-size-t99.ll
…
loopvectorize_pr33804_double.ll
…
lower-ptrmask.ll
…
lower-range-metadata-func-call.ll
…
lrint-conv-fp16-win.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
lrint-conv-fp16.ll
…
lrint-conv-win.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
lrint-conv.ll
[AArch64][GlobalISel] Add legalization & selection support for G_INTRINSIC_LRINT.
2020-07-30 16:14:56 -07:00
lround-conv-fp16-win.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
lround-conv-fp16.ll
…
lround-conv-win.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
lround-conv.ll
…
machine_cse_illegal_hoist.ll
…
machine_cse_impdef_killflags.ll
…
machine_cse.ll
…
machine-combiner-instr-fmf.mir
[AArch64] Consider instruction-level contract FMFs in combiner patterns.
2020-08-04 10:25:16 +01:00
machine-combiner-madd.ll
…
machine-combiner.ll
…
machine-combiner.mir
…
machine-copy-prop.ll
…
machine-copy-remove.ll
…
machine-copy-remove.mir
…
machine-cp-clobbers.mir
…
machine-dead-copy.mir
…
machine-outliner-2fixup-blr-terminator.mir
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
machine-outliner-all-stack.mir
…
machine-outliner-bad-adrp.mir
…
machine-outliner-bad-register.mir
…
machine-outliner-bti.mir
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
machine-outliner-calls.mir
…
machine-outliner-cfi-tail-some.mir
…
machine-outliner-cfi-tail.mir
…
machine-outliner-cfi.mir
…
machine-outliner-compatible-candidates.mir
…
machine-outliner-default.mir
…
machine-outliner-drop-stack.mir
…
machine-outliner-flags.ll
…
machine-outliner-function-annotate.mir
…
machine-outliner-inline-asm-adrp.mir
…
machine-outliner-iterative-2.mir
…
machine-outliner-iterative.mir
…
machine-outliner-no-noreturn-no-stack.mir
[MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner.
2020-08-10 15:43:30 -04:00
machine-outliner-noredzone.ll
…
machine-outliner-noreturn-no-stack.mir
[MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner.
2020-08-10 15:43:30 -04:00
machine-outliner-noreturn-save-lr.mir
…
machine-outliner-ordering.mir
…
machine-outliner-outline-bti.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
machine-outliner-regsave.mir
…
machine-outliner-remarks.ll
…
machine-outliner-retaddr-sign-cfi.ll
[Outliner] Set nounwind for outlined functions
2020-07-01 17:18:34 +01:00
machine-outliner-retaddr-sign-diff-scope-same-key.ll
…
machine-outliner-retaddr-sign-non-leaf.ll
…
machine-outliner-retaddr-sign-regsave.mir
…
machine-outliner-retaddr-sign-same-scope-diff-key.ll
…
machine-outliner-retaddr-sign-same-scope-same-key-a.ll
…
machine-outliner-retaddr-sign-same-scope-same-key-b.ll
[Outliner] Set nounwind for outlined functions
2020-07-01 17:18:34 +01:00
machine-outliner-retaddr-sign-sp-mod.ll
…
machine-outliner-retaddr-sign-sp-mod.mir
…
machine-outliner-retaddr-sign-subtarget.ll
…
machine-outliner-retaddr-sign-thunk.ll
…
machine-outliner-retaddr-sign-v8-3.ll
[Outliner] Set nounwind for outlined functions
2020-07-01 17:18:34 +01:00
machine-outliner-side-effect.mir
…
machine-outliner-size-info.mir
…
machine-outliner-tail.ll
…
machine-outliner-throw2.ll
[Outliner] Set nounwind for outlined functions
2020-07-01 17:18:34 +01:00
machine-outliner-throw.ll
[Outliner] Set nounwind for outlined functions
2020-07-01 17:18:34 +01:00
machine-outliner-thunk.ll
…
machine-outliner-unsafe-stack-call.mir
…
machine-outliner.ll
[Outliner] Set nounwind for outlined functions
2020-07-01 17:18:34 +01:00
machine-outliner.mir
…
machine-scheduler.mir
…
machine-sink-getmemoperandwithoffset.mir
…
machine-sink-kill-flags.ll
…
machine-sink-zr.mir
…
machine-zero-copy-remove.mir
…
macho-global-symbols.ll
…
macho-trap.ll
…
macro-fusion-last.mir
…
macro-fusion.ll
…
madd-combiner.ll
…
madd-lohi.ll
…
mature-mc-support.ll
…
max-jump-table.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
memcpy-f128.ll
…
merge-store-dependency.ll
[DAGCombiner] allow load/store merging if pairs can be rotated into place
2020-07-13 08:57:00 -04:00
merge-store.ll
…
merge-trunc-store.ll
[DAGCombiner] allow more store merging for non-i8 truncated ops
2020-09-07 14:12:36 -04:00
mergestores_noimplicitfloat.ll
…
midpoint-int.ll
…
min-jump-table.ll
[llc] (almost) remove --print-machineinstrs
2020-07-20 10:43:28 -07:00
mingw-refptr.ll
…
minmax-of-minmax.ll
…
minmax.ll
…
misched-fusion-addr.ll
…
misched-fusion-aes.ll
[MachineScheduler] Update available queue on the first mop of a new cycle
2020-06-09 19:13:53 +01:00
misched-fusion-arith-logic.mir
…
misched-fusion-crypto-eor.mir
…
misched-fusion-csel.ll
…
misched-fusion-lit.ll
…
misched-fusion.ll
…
misched-stp.ll
…
mlicm-stack-write-check.mir
…
movimm-wzr.mir
…
movw-consts.ll
…
movw-shift-encoding.ll
…
mul_by_elt.ll
…
mul_pow2.ll
…
mul-lohi.ll
…
multi-vector-store-size.ll
…
neg-imm.ll
…
neon-bitcast.ll
…
neon-bitwise-instructions.ll
…
neon-compare-instructions.ll
…
neon-diagnostics.ll
…
neon-dot-product.ll
…
neon-extract.ll
[AArch64] Optimize instruction selection for certain vector shuffles
2020-08-27 11:06:49 +01:00
neon-fma-FMF.ll
[AArch64] Consider instruction-level contract FMFs in combiner patterns.
2020-08-04 10:25:16 +01:00
neon-fma.ll
…
neon-fp16fml.ll
…
neon-fpround_f128.ll
…
neon-idiv.ll
…
neon-inline-asm-16-bit-fp.ll
…
neon-mla-mls.ll
…
neon-mov.ll
…
neon-or-combine.ll
…
neon-perm.ll
…
neon-scalar-by-elem-fma.ll
…
neon-scalar-copy.ll
…
neon-shift-left-long.ll
…
neon-truncStore-extLoad.ll
…
neon-vcadd.ll
…
neon-vmull-high-p64.ll
…
neon-wide-splat.ll
[AArch64] Optimize instruction selection for certain vector shuffles
2020-08-27 11:06:49 +01:00
nest-register.ll
…
no_cfi.ll
…
no-fp-asm-clobbers-crash.ll
…
no-quad-ldp-stp.ll
…
no-stack-arg-probe.ll
…
nomerge.ll
…
nonlazybind.ll
…
nontemporal.ll
…
note-gnu-property-pac-bti-0.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
note-gnu-property-pac-bti-1.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
note-gnu-property-pac-bti-2.ll
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-3.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
note-gnu-property-pac-bti-4.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
note-gnu-property-pac-bti-5.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
note-gnu-property-pac-bti-6.ll
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
note-gnu-property-pac-bti-7.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
note-gnu-property-pac-bti-8.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
nzcv-save.ll
…
O0-pipeline.ll
[AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions.
2020-06-12 07:34:33 +01:00
O3-pipeline.ll
Disable hoisting MI to hotter basic blocks when using pgo
2020-09-17 14:17:00 -05:00
optimize-cond-branch.ll
…
optimize-imm.ll
…
or-combine.ll
…
overeager_mla_fusing.ll
…
overlapping-copy-bundle-cycle.mir
…
overlapping-copy-bundle.mir
…
pacbti-llvm-generated-funcs-1.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
pacbti-llvm-generated-funcs-2.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
pacbti-module-attrs.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
paired-load.ll
…
parity.ll
[SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __builtin_parity. Expand it to shifts and xors.
2020-09-12 11:42:18 -07:00
partial-pipeline-execution.ll
[CodeGen][TargetPassConfig] Add unreachable-mbb-elimination pass explicitly
2020-07-23 18:05:11 +03:00
patchable-function-entry-bti.ll
[AArch64] PAC/BTI code generation for LLVM generated functions
2020-09-25 11:47:14 +01:00
patchable-function-entry-empty.mir
…
patchable-function-entry.ll
…
PBQP-chain.ll
…
PBQP-coalesce-benefit.ll
…
PBQP-csr.ll
…
PBQP.ll
…
peephole-and-tst.ll
…
peephole-opt-check-cflags.mir
…
phi-dbg.ll
…
PHIElimination-crash.mir
…
pic-eh-stubs.ll
…
pie.ll
…
popcount.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
post-ra-machine-sink.mir
…
postra-mi-sched.ll
…
pow.75.ll
…
pow.ll
Mark FMOV constant materialization as being as cheap as a move.
2020-09-10 16:38:59 +00:00
powi-windows.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
pr27816.ll
…
pr33172.ll
…
pr40091.ll
…
preferred-alignment.ll
…
preferred-function-alignment.ll
…
prefixdata.ll
…
preserve_mostcc.ll
…
print-mrs-system-register.ll
…
prologue-epilogue-remarks.mir
…
pull-binop-through-shift.ll
…
pull-conditional-binop-through-shift.ll
…
ragreedy-csr.ll
…
ragreedy-local-interval-cost.ll
…
rbit.ll
…
read-pc.ll
…
readcyclecounter.ll
…
README
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
recp-fastmath.ll
…
redundant-copy-elim-empty-mbb.ll
…
Redundantstore.ll
…
reg-scavenge-frame.mir
…
regcoal-physreg.mir
…
regress-bitcast-formals.ll
…
regress-combine-extract-vectors.ll
[CodeGen] Don't combine extract + concat vectors with non-legal types
2020-07-08 15:29:57 +01:00
regress-f128csel-flags.ll
…
regress-fp128-livein.ll
…
regress-tail-livereg.ll
…
regress-tblgen-chains.ll
…
regress-w29-reserved-with-fp.ll
…
reloc-specifiers.mir
…
rem_crash.ll
…
remat-float0.ll
…
remat.ll
[ARM] Add Cortex-A78 and Cortex-X1 Support for Clang and LLVM
2020-07-10 18:24:11 +01:00
returnaddr.ll
[AArch64] __builtin_return_address for PAuth.
2020-09-24 23:23:49 +02:00
reverse-csr-restore-seq.mir
…
rm_redundant_cmp.ll
…
rmif-def-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
rmif-use-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
rotate-extract.ll
…
rotate.ll
…
round-conv.ll
…
sadd_sat_plus.ll
…
sadd_sat_vec.ll
[SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore.
2020-09-14 13:54:50 -07:00
sadd_sat.ll
…
sat-add.ll
…
scalable-vector-promotion.ll
…
sched-past-vector-ldst.ll
…
scheduledag-constreg.mir
…
sdag-store-merging-bug.ll
…
sdivpow2.ll
…
seh_funclet_x1.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
seh-finally.ll
…
select_cc.ll
…
select_const.ll
…
select_fmf.ll
…
select-sve.ll
…
selectcc-to-shiftand.ll
…
selectiondag-order.ll
…
seqpaircopy.mir
…
seqpairspill.mir
…
setcc-takes-i32.ll
…
setcc-type-mismatch.ll
…
setf8-def-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
setf8-use-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
setf16-def-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
setf16-use-nzcv.mir
[AArch64] fjcvtzs,rmif,cfinv,setf* all clobber nzcv
2020-07-27 09:17:53 -06:00
settag-merge.ll
…
settag-merge.mir
…
settag.ll
…
shadow-call-stack.ll
…
shift_minsize.ll
[AArch64] Emit zext move when the source of the zext is AssertZext or AssertSext
2020-09-18 12:48:41 +08:00
shift-amount-mod.ll
…
shift-by-signext.ll
[SelectionDAG] Better legalization for FSHL and FSHR
2020-08-21 10:32:49 +01:00
shift-logic.ll
…
shift-mod.ll
…
shrink-constant-multiple-users.ll
…
shrink-wrap.ll
…
shrink-wrapping-vla.ll
…
shuffle-mask-legal.ll
…
sibling-call.ll
…
sign-return-address-cfi-negate-ra-state.ll
…
sign-return-address.ll
…
signbit-shift.ll
…
signed-truncation-check.ll
…
simple-macho.ll
…
sincos-expansion.ll
…
sincospow-vector-expansion.ll
…
sink-addsub-of-const.ll
…
sink-copy-for-shrink-wrap.ll
…
sitofp-fixed-legal.ll
…
space.ll
[AArch64] Print the immediate operand for SPACE pseudo instruction
2020-06-15 20:55:53 -07:00
special-reg.ll
…
speculation-hardening-dagisel.ll
Change filecheck default to dump input on failure
2020-06-09 18:57:46 +00:00
speculation-hardening-loads.ll
Change filecheck default to dump input on failure
2020-06-09 18:57:46 +00:00
speculation-hardening-sls-blr.mir
[AArch64] Extend AArch64SLSHardeningPass to harden BLR instructions.
2020-06-12 07:34:33 +01:00
speculation-hardening-sls.ll
[AArch64] Avoid incompatibility between SLSBLR mitigation and BTI codegen.
2020-06-19 06:21:54 +01:00
speculation-hardening-sls.mir
[AArch64] Introduce AArch64SLSHardeningPass, implementing hardening of RET and BR instructions.
2020-06-11 07:51:17 +01:00
speculation-hardening.ll
Change filecheck default to dump input on failure
2020-06-09 18:57:46 +00:00
speculation-hardening.mir
Change filecheck default to dump input on failure
2020-06-09 18:57:46 +00:00
spill-fold.ll
…
spill-fold.mir
…
spill-stack-realignment.mir
…
spill-undef.mir
…
spillfill-sve.ll
[AArch64][SVE] Add unpred load/store patterns for bf16 types
2020-07-02 10:01:24 +01:00
spillfill-sve.mir
…
sponentry.ll
…
sqrt-fastmath.ll
[DAGCombiner] skip reciprocal divisor optimization for x/sqrt(x), better
2020-08-31 09:35:59 -04:00
srem-lkk.ll
…
srem-seteq-optsize.ll
…
srem-seteq-vec-nonsplat.ll
…
srem-seteq-vec-splat.ll
…
srem-seteq.ll
…
srem-vector-lkk.ll
…
ssub_sat_plus.ll
…
ssub_sat_vec.ll
[SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore.
2020-09-14 13:54:50 -07:00
ssub_sat.ll
…
stack_guard_remat.ll
…
stack-guard-reassign.ll
AArch64: Fix hardcoded register in test
2020-08-25 13:56:39 -04:00
stack-guard-reassign.mir
…
stack-guard-remat-bitcast.ll
…
stack-guard-vaarg.ll
…
stack-id-pei-alloc.mir
…
stack-id-stackslot-scavenging.mir
…
stack-protector-target.ll
…
stack-tagging-dbg.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
stack-tagging-ex-1.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
stack-tagging-ex-2.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
stack-tagging-initializer-merge.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
stack-tagging-unchecked-ld-st.ll
…
stack-tagging-untag-placement.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
stack-tagging.ll
[StackSafety] Skip ambiguous lifetime analysis
2020-08-16 18:05:52 -07:00
stackguard-internal.ll
…
stackmap-frame-setup.ll
…
stackmap-liveness.ll
…
stackmap.ll
…
statepoint-call-lowering.ll
[AArch64] Statepoint support for AArch64.
2020-09-14 16:43:08 -07:00
stgp.ll
…
store_merge_pair_offset.ll
…
stp-opt-with-renaming-debug.mir
…
stp-opt-with-renaming-ld3.mir
[AArch64] Fix ldst-opt of multiple disjunct subregs.
2020-06-08 20:18:24 +01:00
stp-opt-with-renaming-reserved-regs.mir
…
stp-opt-with-renaming.mir
[AArch64] Add a ldst-opt test with undef operands (NFC).
2020-06-08 18:46:56 +01:00
strict-fp-int-promote.ll
…
strqro.ll
…
strqu.ll
…
sub1.ll
…
sub-of-bias.ll
…
sub-of-not.ll
…
subs-to-sub-opt.ll
…
sve2-bitwise-ternary.ll
…
sve2-int-addsub-long.ll
…
sve2-int-mul.ll
…
sve2-intrinsics-binary-narrowing-add-sub.ll
…
sve2-intrinsics-binary-narrowing-shr.ll
…
sve2-intrinsics-bit-permutation.ll
…
sve2-intrinsics-character-match.ll
…
sve2-intrinsics-complex-dot.ll
…
sve2-intrinsics-contiguous-conflict-detection.ll
[AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics
2020-06-24 10:06:31 +00:00
sve2-intrinsics-crypto.ll
…
sve2-intrinsics-fp-converts.ll
…
sve2-intrinsics-fp-int-binary-logarithm.ll
…
sve2-intrinsics-fp-widening-mul-acc.ll
…
sve2-intrinsics-int-mul-lane.ll
…
sve2-intrinsics-non-widening-pairwise-arith.ll
…
sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll
…
sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll
…
sve2-intrinsics-perm-tb.ll
[sve][acle] Add some C intrinsics for brain float types.
2020-06-25 16:31:01 +00:00
sve2-intrinsics-polynomial-arithmetic-128.ll
…
sve2-intrinsics-polynomial-arithmetic.ll
…
sve2-intrinsics-unary-narrowing.ll
…
sve2-intrinsics-uniform-complex-arith.ll
…
sve2-intrinsics-uniform-dsp-zeroing.ll
[AArch64][SVE] Put zeroing pseudos and patterns under flag.
2020-07-02 14:24:33 +01:00
sve2-intrinsics-uniform-dsp.ll
…
sve2-intrinsics-vec-hist-count.ll
…
sve2-intrinsics-while.ll
…
sve2-intrinsics-widening-complex-int-arith.ll
…
sve2-intrinsics-widening-dsp.ll
…
sve2-intrinsics-widening-pairwise-arith.ll
…
sve2-mla-indexed.ll
…
sve2-mla-unpredicated.ll
…
sve-alloca-stackid.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-bad-intrinsics.ll
…
sve-bad-select.ll
…
sve-bitcast.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-breakdown-scalable-vectortype.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-callbyref-notailcall.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-calling-convention-byref.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-calling-convention-tuple-types.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-calling-convention.ll
[AArch64][SVE] Fix PCS for functions taking/returning scalable types.
2020-07-21 15:55:39 +01:00
sve-copy-zprpair.mir
[AArch64][SVE] Teach copyPhysReg to copy ZPR2/3/4.
2020-07-23 16:41:37 -07:00
sve-extract-element.ll
[SVE] Use NEON for extract_vector_elt when the index is in range.
2020-09-21 13:12:28 +01:00
sve-extract-subvector.ll
[CodeGen] In narrowExtractedVectorLoad bail out for scalable vectors
2020-08-13 10:46:18 +01:00
sve-fcmp.ll
[AArch64][SVE] Add "fast" fcmp operations.
2020-07-24 13:22:41 -07:00
sve-fcvt.ll
[SVE][CodeGen] Lower legal integer -> floating point conversions
2020-09-23 11:53:53 +01:00
sve-fix-length-and-combine-512.ll
[SVE][VLS] Don't combine logical AND.
2020-08-12 20:00:07 +01:00
sve-fixed-length-fp-arith.ll
Fix "CHECK-LABEL: @" typos in llvm/test/CodeGen/AArch64/sve-fixed-length-*.ll
2020-08-10 20:07:45 +01:00
sve-fixed-length-fp-converts.ll
[SVE] Ensure fixed length vector fptrunc operations bigger than NEON are not considered legal.
2020-07-13 11:16:30 +00:00
sve-fixed-length-fp-minmax.ll
[SVE] Lower fixed length FP minnum/maxnum
2020-08-12 12:02:52 -05:00
sve-fixed-length-fp-select.ll
[SVE][WIP] Implement lowering for fixed length VSELECT to Scalable
2020-09-17 14:02:57 -05:00
sve-fixed-length-int-arith.ll
[NFCI][SVE] Move fixed length i32/i64 SDIV tests
2020-08-20 14:46:26 -05:00
sve-fixed-length-int-compares.ll
[SVE] Lower fixed length vector integer ISD::SETCC operations.
2020-08-13 12:01:56 +01:00
sve-fixed-length-int-div.ll
[SVE] Lower fixed length UDIV to scalable
2020-08-21 09:01:25 -05:00
sve-fixed-length-int-extends.ll
[SVE] Fallback to default expansion when lowering SIGN_EXTEN_INREG from non-byte based source.
2020-08-27 10:57:37 +01:00
sve-fixed-length-int-immediates.ll
[SVE] Add ISEL patterns for predicated shifts by an immediate.
2020-08-20 11:47:20 +01:00
sve-fixed-length-int-log.ll
Fix "CHECK-LABEL: @" typos in llvm/test/CodeGen/AArch64/sve-fixed-length-*.ll
2020-08-10 20:07:45 +01:00
sve-fixed-length-int-minmax.ll
[SVE] Lower fixed length vector integer UMIN/UMAX
2020-08-13 14:48:36 -05:00
sve-fixed-length-int-reduce.ll
[SVE] Lower fixed length VECREDUCE_[SMAX|SMIN] to Scalable
2020-09-25 09:58:17 -05:00
sve-fixed-length-int-select.ll
[SVE][WIP] Implement lowering for fixed length VSELECT to Scalable
2020-09-17 14:02:57 -05:00
sve-fixed-length-int-shifts.ll
[SVE] Lower fixed length vector integer shifts.
2020-08-13 12:35:47 +01:00
sve-fixed-length-loads.ll
[SVE] Code generation for fixed length vector loads & stores.
2020-06-23 09:39:03 +00:00
sve-fixed-length-shuffles.ll
[SVE] Disable some BUILD_VECTOR related code generator features.
2020-07-09 10:47:04 +00:00
sve-fixed-length-splat-vector.ll
[SVE] Lower fixed length vector ISD::SPLAT_VECTOR operations.
2020-08-18 11:19:43 +01:00
sve-fixed-length-stores.ll
[SVE] Code generation for fixed length vector loads & stores.
2020-06-23 09:39:03 +00:00
sve-fixed-length-subvector.ll
[SVE] Don't reorder subvector/binop sequences when the resulting binop is not legal.
2020-09-02 11:01:33 +01:00
sve-fixed-length-trunc.ll
[SVE] Code generation for fixed length vector truncates.
2020-07-10 10:37:19 +00:00
sve-fp-rounding.ll
[AArch64][SVE] Add lowering for rounding operations
2020-09-04 11:16:57 -04:00
sve-fp.ll
[AArch64][SVE] Add lowering for llvm fsqrt
2020-09-15 15:26:17 -04:00
sve-gather-scatter-dag-combine.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-gep.ll
[AArch64][SVE] Add patterns for integer mla/mls.
2020-08-18 12:51:16 -07:00
sve-insert-element.ll
[SVE] Use NEON for extract_vector_elt when the index is in range.
2020-09-21 13:12:28 +01:00
sve-int-arith-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-arith-pred.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-arith.ll
[AArch64][SVE] Add patterns for integer mla/mls.
2020-08-18 12:51:16 -07:00
sve-int-div-pred.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-log-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-log-pred.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-log.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-mad-pred.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-mul-pred.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-int-reduce-pred.ll
[SVE] Change definition of reduction ISD nodes to have an SVE vector result type.
2020-09-21 13:16:28 +01:00
sve-intrinsic-opts-ptest.ll
[SVE] Fix bug in SVEIntrinsicOpts::optimizePTest
2020-08-14 07:57:21 +01:00
sve-intrinsic-opts-reinterpret.ll
Prefix some AArch64/ARM passes with "aarch64-"/"arm-"
2020-07-27 11:00:39 -07:00
sve-intrinsics-adr.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-bfloat.ll
[sve][acle] Add SVE BFloat16 extensions.
2020-06-22 16:53:02 +00:00
sve-intrinsics-contiguous-prefetches.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-conversion.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-counting-bits.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-counting-elems.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-create-tuple.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-dup-x.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ffr-manipulation.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-arith-merging.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-arith.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-compares.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-converts.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-fp-reduce.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-32bit-scaled-offsets.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-64bit-scaled-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-vector-base-imm-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-loads-vector-base-scalar-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-index.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-insert-extract-tuple.ll
[AArch64][SVE] Implement vector tuple intrinsics
2020-06-08 11:09:55 +00:00
sve-intrinsics-int-arith-imm.ll
[SVE] Fix shift-by-imm patterns used by asr, lsl & lsr intrinsics.
2020-08-18 11:41:26 +01:00
sve-intrinsics-int-arith-merging.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-int-arith.ll
[SVE][CodeGen] Add simple integer add tests for SVE tuple types
2020-07-29 13:32:10 +01:00
sve-intrinsics-int-compares-with-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-int-compares.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1-addressing-mode-reg-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1-addressing-mode-reg-reg.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll
[llvm][sve] Reg + Imm addressing mode for ld1ro.
2020-07-24 17:48:47 +00:00
sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ld1ro.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-ldN-reg+imm-addr-mode.ll
[llvm][CodeGen] Addressing modes for SVE ldN.
2020-07-27 22:18:28 +00:00
sve-intrinsics-ldN-reg+reg-addr-mode.ll
[llvm][CodeGen] Addressing modes for SVE ldN.
2020-07-27 22:18:28 +00:00
sve-intrinsics-loads-ff.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-loads-nf.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-loads.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-logical.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-matmul-fp32.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-matmul-fp64.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-matmul-int8.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-perm-select-matmul-fp64.ll
[AArch64][SVE] Guard perm and select bfloat16 intrinsic patterns
2020-06-26 09:35:36 +00:00
sve-intrinsics-perm-select.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-pred-creation.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-pred-operations.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-pred-testing.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-reinterpret.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-reversal.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scalar-to-vec.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-64bit-scaled-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-vector-base-imm-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-sel.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-shifts-merging.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-shifts.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-sqdec.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-sqinc.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-st1-addressing-mode-reg-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-st1-addressing-mode-reg-reg.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-st1.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-stN-reg-imm-addr-mode.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-stN-reg-reg-addr-mode.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-stores.ll
[AArch64][SVE] Allow llvm.aarch64.sve.st2/3/4 with vectors of pointers.
2020-08-18 12:51:16 -07:00
sve-intrinsics-uqdec.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-uqinc.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-intrinsics-while.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-ld1-addressing-mode-reg-imm.ll
[SVE][CodeGen] Fix scalable vector issues in DAGTypeLegalizer::GenWidenVectorLoads
2020-08-19 07:54:32 +01:00
sve-ld-post-inc.ll
[AArch64][SVE] Bail out of performPostLD1Combine for scalable types
2020-06-29 11:59:53 +01:00
sve-localstackalloc.mir
[SVE] Don't use LocalStackAllocation for SVE objects
2020-07-27 08:22:01 +01:00
sve-masked-ldst-nonext.ll
[AArch64][SVE] Allow vector of pointers as legal type for masked load/store.
2020-07-31 17:30:23 -07:00
sve-masked-ldst-sext.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-masked-ldst-trunc.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-masked-ldst-zext.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-merging-stores.ll
[SVE][CodeGen] Fix bug in DAGCombiner::reduceBuildVecToShuffle
2020-06-30 07:28:15 +01:00
sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-pred-log.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-pseudos-expand-undef.mir
[SVE] Fix invalid assert in expand_DestructiveOp.
2020-07-04 09:21:40 +00:00
sve-select.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-setcc.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-sext-zext.ll
[SVE] Add checks for no warnings in CodeGen/AArch64/sve-sext-zext.ll
2020-07-29 13:06:39 +01:00
sve-split-extract-elt.ll
[SVE] Use NEON for extract_vector_elt when the index is in range.
2020-09-21 13:12:28 +01:00
sve-split-fcvt.ll
[SVE][CodeGen] Lower floating point -> integer conversions
2020-09-17 14:04:22 +01:00
sve-split-insert-elt.ll
[SVE][CodeGen] Fix up warnings in sve-split-insert/extract tests
2020-09-04 09:51:31 +01:00
sve-split-load.ll
[SVE][CodeGen] Fix TypeSize/ElementCount related warnings in sve-split-load.ll
2020-09-01 07:47:59 +01:00
sve-split-store.ll
[SVE][CodeGen] Legalisation of masked loads and stores
2020-07-16 10:55:45 +01:00
sve-split-trunc.ll
[SVE][CodeGen] Legalisation of truncate for scalable vectors
2020-09-10 11:35:33 +01:00
sve-st1-addressing-mode-reg-imm.ll
[SVE][CodeGen] Fix scalable vector issues in DAGTypeLegalizer::GenWidenVectorStores
2020-08-13 11:07:17 +01:00
sve-tailcall.ll
[AArch64][SVE] Disable tail calls if callee does not preserve SVE regs.
2020-08-05 09:38:54 +01:00
sve-trunc.ll
[AArch64][SVE] Add missing unwind info for SVE registers.
2020-08-04 11:47:06 +01:00
sve-vector-splat.ll
[SVE] Lower fixed length vector ISD::SPLAT_VECTOR operations.
2020-08-18 11:19:43 +01:00
sve-vscale-combine.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-vscale.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-vselect-imm.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
sve-zeroinit.ll
[SVE][CodeGen] Add README for SVE-related warnings in tests
2020-07-14 08:31:10 +01:00
swap-compare-operands.ll
…
swift-error.ll
…
swift-return.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
swiftcc.ll
…
swifterror.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
swiftself-scavenger.ll
…
swiftself.ll
…
switch-unreachable-default.ll
…
tagged-globals.ll
[HWASan] [GlobalISel] Add +tagged-globals backend feature for GlobalISel
2020-08-03 14:28:44 -07:00
tagp.ll
…
tail-call-unused-zext.ll
…
tail-call.ll
…
tailcall_misched_graph.ll
…
tailcall-bitcast-memcpy.ll
…
tailcall-ccmismatch.ll
…
tailcall-explicit-sret.ll
…
tailcall-fastisel.ll
…
tailcall-implicit-sret.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-string-rvo.ll
…
taildup-cfi.ll
…
taildup-inst-dup-loc.mir
…
tailmerging_in_mbp.ll
…
tbi.ll
…
tbz-tbnz.ll
…
tiny_model.ll
…
tiny_supported.ll
…
tme.ll
…
trunc-v1i64.ll
…
tst-br.ll
…
uadd_sat_plus.ll
…
uadd_sat_vec.ll
[SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore.
2020-09-14 13:54:50 -07:00
uadd_sat.ll
…
uaddo.ll
…
umulo-128-legalisation-lowering.ll
…
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unreachable-emergency-spill-slot.mir
…
unwind-preserved-from-mir.mir
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
unwind-preserved.ll
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""
2020-09-22 14:40:06 +05:00
urem-lkk.ll
…
urem-seteq-nonzero.ll
…
urem-seteq-optsize.ll
…
urem-seteq-vec-nonsplat.ll
…
urem-seteq-vec-nonzero.ll
…
urem-seteq-vec-splat.ll
…
urem-seteq-vec-tautological.ll
…
urem-seteq.ll
…
urem-vector-lkk.ll
…
use-cr-result-of-dom-icmp-st.ll
…
usub_sat_plus.ll
…
usub_sat_vec.ll
[SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore.
2020-09-14 13:54:50 -07:00
usub_sat.ll
…
v3f-to-int.ll
…
vararg-tallcall.ll
…
vcvt-oversize.ll
…
vec_cttz.ll
…
vec_uaddo.ll
…
vec_umulo.ll
…
vec-extract-branch.ll
[SelectionDAG] don't split branch on logic-of-vector-compares
2020-07-02 17:05:24 -04:00
vec-libcalls.ll
…
vecreduce-add-legalization.ll
…
vecreduce-and-legalization.ll
…
vecreduce-bool.ll
…
vecreduce-fadd-legalization-strict.ll
…
vecreduce-fadd-legalization.ll
…
vecreduce-fadd.ll
[AArch64] Match pairwise add/fadd pattern
2020-09-17 16:27:01 +01:00
vecreduce-fmax-legalization-nan.ll
[Intrinsics] define semantics for experimental fmax/fmin vector reductions
2020-09-12 09:10:28 -04:00
vecreduce-fmax-legalization.ll
[AArch64] Add additional vecreduce fmax/fmin legalization tests (NFC)
2020-09-14 21:13:45 +02:00
vecreduce-fmin-legalization.ll
[AArch64] Add additional vecreduce fmax/fmin legalization tests (NFC)
2020-09-14 21:13:45 +02:00
vecreduce-fmul-legalization-strict.ll
…
vecreduce-propagate-sd-flags.ll
…
vecreduce-umax-legalization.ll
[AArch64] Expand some vector of i64 reductions on NEON
2020-09-23 16:01:24 -05:00
vector_merge_dep_check.ll
…
vector_splat-const-shift-of-constmasked.ll
…
vector-fcopysign.ll
…
vector-gep.ll
[SelectionDAG] Fix lowering of vector geps
2020-07-30 14:56:53 -06:00
vector-insert-shuffle-cycle.ll
…
vselect-constants.ll
…
win64_vararg.ll
…
win64-jumptable.ll
[CodeGen] [WinException] Only produce handler data at the end of the function if needed
2020-09-21 23:42:59 +03:00
win64-no-uwtable.ll
…
win64-nocfi.ll
…
win64cc-backup-x18.ll
…
win_cst_pool.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
win-alloca-no-stack-probe.ll
…
win-alloca.ll
…
win-catchpad-nested-cxx.ll
…
win-tls.ll
…
windows-extern-weak.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
windows-SEH-support.ll
…
windows-trap.ll
…
wineh1.mir
[CodeGen] [WinException] Only produce handler data at the end of the function if needed
2020-09-21 23:42:59 +03:00
wineh2.mir
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
wineh3.mir
[MC] [Win64EH] Write packed ARM64 epilogues if possible
2020-09-11 10:31:04 +03:00
wineh4.mir
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
wineh5.mir
[llvm-readobj] Fix arm64 unwind opcode disassembly printing
2020-08-26 09:38:11 +03:00
wineh6.mir
[MC] [Win64EH] Write packed ARM64 epilogues if possible
2020-09-11 10:31:04 +03:00
wineh7.mir
[MC] [Win64EH] Write packed ARM64 epilogues if possible
2020-09-11 10:31:04 +03:00
wineh8.mir
[llvm-readobj] Update tests because of changes in llvm-readobj behavior
2020-07-20 10:39:04 +01:00
wineh_shrinkwrap.mir
…
wineh-frame0.mir
…
wineh-frame1.mir
…
wineh-frame2.mir
…
wineh-frame3.mir
…
wineh-frame4.mir
…
wineh-frame5.mir
…
wineh-frame6.mir
…
wineh-frame7.mir
…
wineh-frame8.mir
…
wineh-mingw.ll
[CodeGen] [WinException] Remove a redundant explicit section switch for aarch64
2020-09-11 10:31:04 +03:00
wineh-try-catch-cbz.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
wineh-try-catch-nobase.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
wineh-try-catch-realign.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
wineh-try-catch-vla.ll
[AArch64] Generate and parse SEH assembly directives
2020-08-29 15:15:22 +03:00
wineh-try-catch.ll
…
wineh-unwindhelp-via-fp.ll
…
wrong_debug_loc_after_regalloc.ll
…
wrong-callee-save-size-after-livedebugvariables.mir
…
xbfiz.ll
…
xor.ll
…
xray-attribute-instrumentation.ll
…
xray-omit-function-index.ll
[xray] Option to omit the function index
2020-06-17 13:49:01 -04:00
xray-partial-instrumentation-skip-entry.ll
…
xray-partial-instrumentation-skip-exit.ll
…
xray-tail-call-sled.ll
…
zero-reg.ll
…
zext-logic-shift-load.ll
…
zext-reg-coalesce.mir
[AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long
2020-09-08 08:04:52 +01:00

README 

++ SVE CodeGen Warnings ++

When the WARN check lines fail in the SVE codegen tests it most likely means you
have introduced a warning due to:
1. Adding an invalid call to VectorType::getNumElements() or EVT::getVectorNumElements()
   when the type is a scalable vector.
2. Relying upon an implicit cast conversion from TypeSize to uint64_t.

For generic code, please modify your code to work with ElementCount and TypeSize directly.
For target-specific code that only deals with fixed-width vectors, use the fixed-size interfaces.
Please refer to the code where those functions live for more details.
Reference in New Issue View Git Blame Copy Permalink