4a9a4885ae
Currently the dbg_value ends up in the relaxed branch block. A future commit will push the dbg_value out of this block, and I'm not sure how to coax the IR into producing the same MIR at the relevant point.
124 lines
6.5 KiB
YAML
124 lines
6.5 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -start-before=branch-relaxation -amdgpu-s-branch-bits=4 -o - %s | FileCheck -check-prefix=GCN %s
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# Make sure there's no assert if the DBG_VALUE ends up in the same
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# block as the branch expansion.
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# GCN-LABEL: long_branch_dbg_value:
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# GCN: BB0_5: ; %bb
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# GCN-NEXT: ;DEBUG_VALUE: test_debug_value:globalptr_arg <- [DW_OP_plus_uconst 12, DW_OP_stack_value]
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# GCN-NEXT: .loc 1 0 42 is_stmt 0 ; /tmp/test_debug_value.cl:0:42
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# GCN-NEXT: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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# GCN-NEXT: s_add_u32 s[[PC_LO]], s[[PC_LO]], BB0_4-(BB0_5+4)
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# GCN-NEXT: s_addc_u32 s[[PC_HI]], s[[PC_HI]], 0
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# GCN-NEXT: s_setpc_b64
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--- |
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define amdgpu_kernel void @long_branch_dbg_value(float addrspace(1)* nocapture %arg, float %arg1) #1 !dbg !5 {
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bb:
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%long_branch_dbg_value.kernarg.segment = call nonnull align 16 dereferenceable(12) i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr()
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%arg.kernarg.offset = getelementptr inbounds i8, i8 addrspace(4)* %long_branch_dbg_value.kernarg.segment, i64 0
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%arg.kernarg.offset.cast = bitcast i8 addrspace(4)* %arg.kernarg.offset to float addrspace(1)* addrspace(4)*, !amdgpu.uniform !2, !amdgpu.noclobber !2
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%arg.load = load float addrspace(1)*, float addrspace(1)* addrspace(4)* %arg.kernarg.offset.cast, align 16, !invariant.load !2
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%arg1.kernarg.offset = getelementptr inbounds i8, i8 addrspace(4)* %long_branch_dbg_value.kernarg.segment, i64 8
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%arg1.kernarg.offset.cast = bitcast i8 addrspace(4)* %arg1.kernarg.offset to float addrspace(4)*, !amdgpu.uniform !2, !amdgpu.noclobber !2
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%arg1.load = load float, float addrspace(4)* %arg1.kernarg.offset.cast, align 8, !invariant.load !2
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%tmp = fmul float %arg1.load, %arg1.load
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%tmp2 = getelementptr inbounds float, float addrspace(1)* %arg.load, i64 3
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call void @llvm.dbg.value(metadata float addrspace(1)* %tmp2, metadata !11, metadata !DIExpression()) #5, !dbg !12
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store float %tmp, float addrspace(1)* %tmp2, align 4, !dbg !12
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%tmp3 = fcmp olt float %tmp, 0x3810000000000000
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%tmp3.inv = xor i1 %tmp3, true
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br i1 %tmp3.inv, label %bb4, label %bb8, !amdgpu.uniform !2
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bb4: ; preds = %bb
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%tmp5 = load volatile float, float addrspace(1)* undef, align 4
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%tmp6 = fcmp oeq float %tmp5, 0x7FF0000000000000
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br i1 %tmp6, label %bb7, label %Flow, !amdgpu.uniform !2
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bb7: ; preds = %bb4
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br label %Flow, !amdgpu.uniform !2
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Flow: ; preds = %bb7, %bb4
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br label %bb8, !amdgpu.uniform !2
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bb8: ; preds = %bb, %Flow
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ret void
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}
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declare align 4 i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr() #2
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declare void @llvm.dbg.value(metadata, metadata, metadata) #0
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attributes #0 = { nounwind readnone speculatable willreturn }
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attributes #1 = { nounwind writeonly }
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attributes #2 = { nounwind readnone speculatable willreturn }
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attributes #3 = { convergent nounwind willreturn }
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attributes #4 = { convergent nounwind readnone willreturn }
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attributes #5 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4}
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!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 3.8.0 (trunk 244715) (llvm/trunk 244718)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "/tmp/test_debug_value.cl", directory: "/Users/matt/src/llvm/build_debug")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = distinct !DISubprogram(name: "test_debug_value", scope: !1, file: !1, line: 1, type: !6, scopeLine: 2, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !10)
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!6 = !DISubroutineType(types: !7)
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!7 = !{null, !8}
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!8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !9, size: 64, align: 32)
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!9 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)
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!10 = !{!11}
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!11 = !DILocalVariable(name: "globalptr_arg", arg: 1, scope: !5, file: !1, line: 1, type: !8)
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!12 = !DILocation(line: 1, column: 42, scope: !5)
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...
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---
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name: long_branch_dbg_value
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tracksRegLiveness: true
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registers: []
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body: |
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bb.0.bb:
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successors: %bb.1(0x40000000), %bb.4(0x40000000)
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liveins: $sgpr4_sgpr5
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renamable $sgpr6_sgpr7 = S_LOAD_DWORDX2_IMM renamable $sgpr4_sgpr5, 0, 0, 0 :: (dereferenceable invariant load 8 from %ir.arg.kernarg.offset.cast, align 16, addrspace 4)
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renamable $sgpr4 = S_LOAD_DWORD_IMM killed renamable $sgpr4_sgpr5, 8, 0, 0 :: (dereferenceable invariant load 4 from %ir.arg1.kernarg.offset.cast, align 8, addrspace 4)
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S_WAITCNT 49279
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renamable $vgpr0 = nofpexcept V_MUL_F32_e64 0, killed $sgpr4, 0, $sgpr4, 0, 0, implicit $mode, implicit $exec
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DBG_VALUE renamable $sgpr6_sgpr7, $noreg, !11, !DIExpression(DW_OP_plus_uconst, 12, DW_OP_stack_value), debug-location !12
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$vgpr1 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $sgpr6_sgpr7
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$vgpr2 = V_MOV_B32_e32 $sgpr7, implicit $exec, implicit killed $sgpr6_sgpr7, implicit $exec
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GLOBAL_STORE_DWORD killed renamable $vgpr1_vgpr2, renamable $vgpr0, 12, 0, 0, 0, implicit $exec, debug-location !12 :: (store 4 into %ir.tmp2, addrspace 1)
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renamable $sgpr4 = S_MOV_B32 8388608
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renamable $sgpr4_sgpr5 = nofpexcept V_CMP_GT_F32_e64 0, killed $sgpr4, 0, killed $vgpr0, 0, implicit $mode, implicit $exec
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renamable $vcc = S_AND_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.4, implicit killed $vcc
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bb.1.bb4:
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successors: %bb.2(0x40000000), %bb.3(0x40000000)
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renamable $sgpr4_sgpr5 = IMPLICIT_DEF
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$vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr4_sgpr5
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$vgpr1 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit killed $sgpr4_sgpr5, implicit $exec
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renamable $vgpr0 = GLOBAL_LOAD_DWORD killed renamable $vgpr0_vgpr1, 0, 0, 0, 0, implicit $exec :: (volatile load 4 from `float addrspace(1)* undef`, addrspace 1)
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renamable $sgpr4 = S_MOV_B32 2139095040
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S_WAITCNT 3952
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renamable $sgpr4_sgpr5 = nofpexcept V_CMP_NEQ_F32_e64 0, killed $sgpr4, 0, killed $vgpr0, 0, implicit $mode, implicit $exec
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renamable $vcc = S_AND_B64 $exec, killed renamable $sgpr4_sgpr5, implicit-def dead $scc
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S_CBRANCH_VCCNZ %bb.3, implicit killed $vcc
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bb.2.bb7:
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successors: %bb.3(0x80000000)
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bb.3.Flow:
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successors: %bb.4(0x80000000)
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bb.4.bb8:
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S_ENDPGM 0
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...
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