4b4496312e
This is the groundwork required to implement strictfp. For now, this should be NFC for regular instructoins (many instructions just gain an extra use of a reserved register). Regalloc won't rematerialize instructions with reads of physical registers, but we were suffering from that anyway with the exec reads. Should add it for all the related FP uses (possibly with some extras). I did not add it to either the gpr index mode instructions (or every single VALU instruction) since it's a ridiculous feature already modeled as an arbitrary side effect. Also work towards marking instructions with FP exceptions. This doesn't actually set the bit yet since this would start to change codegen. It seems nofpexcept is currently not implied from the regular IR FP operations. Add it to some MIR tests where I think it might matter.
166 lines
5.6 KiB
YAML
166 lines
5.6 KiB
YAML
# RUN: llc -run-pass=si-insert-waitcnts -march=amdgcn -mcpu=tahiti -o - %s | FileCheck %s -check-prefixes=CHECK,SI
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# RUN: llc -run-pass=si-insert-waitcnts -march=amdgcn -mcpu=gfx900 -o - %s | FileCheck %s -check-prefixes=CHECK,GFX9
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# RUN: llc -run-pass=si-insert-waitcnts -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -o - %s | FileCheck %s -check-prefixes=CHECK,GFX10
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---
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# CHECK-LABEL: name: vccz_corrupt_workaround
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# CHECK: $vcc = V_CMP_EQ_F32
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# SI-NEXT: S_WAITCNT 127
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# SI-NEXT: $vcc = S_MOV_B64 $vcc
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# CHECK-NEXT: S_CBRANCH_VCCZ %bb.2, implicit killed $vcc
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name: vccz_corrupt_workaround
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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$sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 11, 0, 0
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 -1
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$vcc = V_CMP_EQ_F32_e64 0, 0, 0, undef $sgpr2, 0, implicit $mode, implicit $exec
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S_CBRANCH_VCCZ %bb.1, implicit killed $vcc
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bb.2:
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liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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$vgpr0 = V_MOV_B32_e32 9, implicit $exec
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_BRANCH %bb.3
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bb.1:
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liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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$vgpr0 = V_MOV_B32_e32 100, implicit $exec
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 1, implicit $exec
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bb.3:
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liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# CHECK-LABEL: name: vccz_corrupt_undef_vcc
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# CHECK: BUFFER_STORE_DWORD_OFFSET
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# SI-NEXT: S_WAITCNT 3855
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# CHECK-NEXT: $vgpr0 = V_MOV_B32_e32
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name: vccz_corrupt_undef_vcc
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0_sgpr1
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$sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 11, 0, 0
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 -1
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S_CBRANCH_VCCZ %bb.1, implicit undef $vcc
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bb.2:
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liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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$vgpr0 = V_MOV_B32_e32 9, implicit $exec
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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S_BRANCH %bb.3
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bb.1:
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liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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$vgpr0 = V_MOV_B32_e32 100, implicit $exec
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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$vgpr0 = V_MOV_B32_e32 1, implicit $exec
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bb.3:
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liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003
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$sgpr3 = S_MOV_B32 61440
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$sgpr2 = S_MOV_B32 -1
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BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, 0, 0, implicit $exec
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S_ENDPGM 0
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...
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---
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# Test that after reloading vcc spilled to a vgpr, we insert any necessary
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# instructions to fix vccz.
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# CHECK-LABEL: name: reload_vcc_from_vgpr
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# CHECK: $vcc_lo = V_READLANE_B32_vi $vgpr0, 8, implicit-def $vcc
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# CHECK: $vcc_hi = V_READLANE_B32_vi $vgpr0, 9
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# SI: $vcc = S_MOV_B64 $vcc
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# GFX9: $vcc = S_MOV_B64 $vcc
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# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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name: reload_vcc_from_vgpr
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body: |
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bb.0:
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$vcc_lo = V_READLANE_B32_vi $vgpr0, 8, implicit-def $vcc
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$vcc_hi = V_READLANE_B32_vi $vgpr0, 9
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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bb.1:
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...
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---
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# Test that after reloading vcc spilled to memory, we insert any necessary
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# instructions to fix vccz.
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# CHECK-LABEL: name: reload_vcc_from_mem
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# CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 4, 0, 0, 0, 0, 0, implicit $exec
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# CHECK: $vcc_lo = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc
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# CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 8, 0, 0, 0, 0, 0, implicit $exec
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# CHECK: $vcc_hi = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc
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# SI: $vcc = S_MOV_B64 $vcc
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# GFX9: $vcc = S_MOV_B64 $vcc
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# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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name: reload_vcc_from_mem
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body: |
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bb.0:
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 4, 0, 0, 0, 0, 0, implicit $exec
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$vcc_lo = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc
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$vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 8, 0, 0, 0, 0, 0, implicit $exec
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$vcc_hi = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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bb.1:
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...
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---
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# Test that after inline asm that defines vcc_lo, we insert any necessary
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# instructions to fix vccz.
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# CHECK-LABEL: name: inlineasm_def_vcc_lo
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# CHECK: INLINEASM &"; def vcc_lo", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_lo
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# SI: $vcc = S_MOV_B64 $vcc
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# GFX9: $vcc = S_MOV_B64 $vcc
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# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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name: inlineasm_def_vcc_lo
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body: |
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bb.0:
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INLINEASM &"; def vcc_lo", 1, 10, implicit-def $vcc_lo
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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bb.1:
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...
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---
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# Test that after inline asm that defines vcc, no unnecessary instructions are
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# inserted to fix vccz.
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# CHECK-LABEL: name: inlineasm_def_vcc
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# CHECK: INLINEASM &"; def vcc", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc
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# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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name: inlineasm_def_vcc
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body: |
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bb.0:
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INLINEASM &"; def vcc", 1, 10, implicit-def $vcc
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S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
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bb.1:
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...
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