b3b4727a3e
For i32 and i64 cases, X86ISD::SHLD/SHRD are close enough to ISD::FSHL/FSHR that we can use them directly, we just need to account for the operand commutation for SHRD. The i16 SHLD/SHRD case is annoying as the shift amount is modulo-32 (vs funnel shift modulo-16), so I've added X86ISD::FSHL/FSHR equivalents, which matches the generic implementation in all other terms. Something I'm slightly concerned with is that ISD::FSHL/FSHR legality is controlled by the Subtarget.isSHLDSlow() feature flag - we don't normally use non-ISA features for this but it allows the DAG combines to continue to operate after legalization in a lot more cases. The X86 *bits.ll changes are all affected by the same issue - we now have a "FSHR(-1,-1,amt) -> ROTR(-1,amt) -> (-1)" simplification that reduces the dependencies enough for the branch fall through code to mess up. Differential Revision: https://reviews.llvm.org/D75748
41 lines
1.5 KiB
LLVM
41 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
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; PR4736
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%0 = type { i32, i8, [35 x i8] }
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@g_144 = external global %0, align 8 ; <%0*> [#uses=1]
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define i32 @int87(i32 %uint64p_8, i1 %cond) nounwind {
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; CHECK-LABEL: int87:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movq g_144+{{.*}}(%rip), %rax
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; CHECK-NEXT: movq g_144+{{.*}}(%rip), %rcx
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; CHECK-NEXT: movzbl %sil, %edx
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; CHECK-NEXT: shll $6, %edx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: .LBB0_1: # %for.cond
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: testb $64, %dl
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; CHECK-NEXT: movq %rcx, %rsi
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; CHECK-NEXT: cmovneq %rax, %rsi
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; CHECK-NEXT: orl $0, %esi
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; CHECK-NEXT: je .LBB0_1
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; CHECK-NEXT: # %bb.2: # %if.then
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; CHECK-NEXT: movl $1, %eax
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; CHECK-NEXT: retq
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entry:
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%srcval4 = load i320, i320* bitcast (%0* @g_144 to i320*), align 8 ; <i320> [#uses=1]
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br label %for.cond
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for.cond: ; preds = %for.cond, %entry
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%call3.in.in.in.v = select i1 %cond, i320 192, i320 128 ; <i320> [#uses=1]
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%call3.in.in.in = lshr i320 %srcval4, %call3.in.in.in.v ; <i320> [#uses=1]
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%call3.in = trunc i320 %call3.in.in.in to i32 ; <i32> [#uses=1]
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%tobool = icmp eq i32 %call3.in, 0 ; <i1> [#uses=1]
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br i1 %tobool, label %for.cond, label %if.then
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if.then: ; preds = %for.cond
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ret i32 1
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}
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