d6351340bb
Summary: A number of optimizations are inhibited by single-use TokenFactors not being merged into the TokenFactor using it. This makes we consider if we can do the merge immediately. Most tests changes here are due to the change in visitation causing minor reorderings and associated reassociation of paired memory operations. CodeGen tests with non-reordering changes: X86/aligned-variadic.ll -- memory-based add folded into stored leaq value. X86/constant-combiners.ll -- Optimizes out overlap between stores. X86/pr40631_deadstore_elision -- folds constant byte store into preceding quad word constant store. Reviewers: RKSimon, craig.topper, spatel, efriedma, courbet Reviewed By: courbet Subscribers: dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, javed.absar, eraman, hiraditya, kbarton, jrtc27, atanasyan, jsji, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59260 llvm-svn: 356068
132 lines
3.4 KiB
LLVM
132 lines
3.4 KiB
LLVM
; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-win32 | FileCheck %s
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; Verify that the var arg parameters which are passed in registers are stored
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; in home stack slots allocated by the caller and that AP is correctly
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; calculated.
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define void @average_va(i32 %count, ...) nounwind {
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entry:
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; CHECK: pushq
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; CHECK-DAG: movq %r9, 40(%rsp)
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; CHECK-DAG: movq %r8, 32(%rsp)
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; CHECK-DAG: movq %rdx, 24(%rsp)
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; CHECK: leaq 24(%rsp), %rax
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%ap = alloca i8*, align 8 ; <i8**> [#uses=1]
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%ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=1]
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call void @llvm.va_start(i8* %ap1)
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ret void
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}
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_copy(i8*, i8*) nounwind
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; CHECK-LABEL: f5:
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; CHECK: pushq
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; CHECK: leaq 56(%rsp),
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define i8* @f5(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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ret i8* %ap1
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}
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; CHECK-LABEL: f4:
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; CHECK: pushq
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; CHECK: leaq 48(%rsp),
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define i8* @f4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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ret i8* %ap1
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}
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; CHECK-LABEL: f3:
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; CHECK: pushq
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; CHECK: leaq 40(%rsp),
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define i8* @f3(i64 %a0, i64 %a1, i64 %a2, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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ret i8* %ap1
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}
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; WinX86_64 uses char* for va_list. Verify that the correct amount of bytes
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; are copied using va_copy.
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; CHECK-LABEL: copy1:
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; CHECK: subq $16
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; CHECK: leaq 32(%rsp), [[REG_copy1:%[a-z]+]]
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; CHECK: movq [[REG_copy1]], 8(%rsp)
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; CHECK: movq [[REG_copy1]], (%rsp)
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; CHECK: addq $16
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; CHECK: ret
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define void @copy1(i64 %a0, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%cp = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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%cp1 = bitcast i8** %cp to i8*
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call void @llvm.va_start(i8* %ap1)
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call void @llvm.va_copy(i8* %cp1, i8* %ap1)
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ret void
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}
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; CHECK-LABEL: copy4:
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; CHECK: subq $16
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; CHECK: leaq 56(%rsp), [[REG_copy4:%[a-z]+]]
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; CHECK: movq [[REG_copy4]], 8(%rsp)
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; CHECK: movq [[REG_copy4]], (%rsp)
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; CHECK: addq $16
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; CHECK: ret
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define void @copy4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%cp = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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%cp1 = bitcast i8** %cp to i8*
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call void @llvm.va_start(i8* %ap1)
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call void @llvm.va_copy(i8* %cp1, i8* %ap1)
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ret void
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}
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; CHECK-LABEL: arg4:
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; CHECK: pushq
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; va_start (optimized away as overwritten by va_arg)
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; va_arg:
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; CHECK: leaq 52(%rsp), [[REG_arg4_2:%[a-z]+]]
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; CHECK: movq [[REG_arg4_2]], (%rsp)
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; CHECK: movl 48(%rsp), %eax
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; CHECK: popq
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; CHECK: ret
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define i32 @arg4(i64 %a0, i64 %a1, i64 %a2, i64 %a3, ...) nounwind {
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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%tmp = va_arg i8** %ap, i32
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ret i32 %tmp
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}
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define void @sret_arg(i32* sret %agg.result, i8* nocapture readnone %format, ...) {
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entry:
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%ap = alloca i8*
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%ap_i8 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap_i8)
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%tmp = va_arg i8** %ap, i32
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store i32 %tmp, i32* %agg.result
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ret void
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}
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; CHECK-LABEL: sret_arg:
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; CHECK: pushq
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; CHECK: movq %rcx, %rax
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; CHECK-DAG: movq %r9, 40(%rsp)
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; CHECK-DAG: movq %r8, 32(%rsp)
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; CHECK-DAG: leaq 36(%rsp), %[[sret:[^ ]*]]
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; CHECK-DAG: movl %r8d, (%rax)
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; CHECK-DAG: movq %[[sret]], (%rsp)
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; CHECK: popq
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; CHECK: retq
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