Simon Pilgrim 54b20cbb95 [DAG] computeKnownBits - abds(x, y) will be zero in the upper bits if x and y are sign-extended (#94448) ...

As reported on #94442 - if x and y have more than one signbit, then the upper bits of its absolute value are guaranteed to be zero

Sibling PR to #94382

Alive2: https://alive2.llvm.org/ce/z/7_z2Vc

Fixes #94442

2024-06-05 11:57:55 +01:00

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AArch64

[DAG] computeKnownBits - abds(x, y) will be zero in the upper bits if x and y are sign-extended (#94448)

2024-06-05 11:57:55 +01:00

AMDGPU

[AMDGPU] Add gfx12 run lines to fence MMRA tests (#94333)

2024-06-04 12:49:31 +02:00

ARC

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ARM

[IR] Remove support for icmp and fcmp constant expressions (#93038)

2024-06-04 08:31:03 +02:00

AVR

[MachineLICM] Hoist copies of constant physical register (#93285)

2024-05-29 14:10:01 +08:00

BPF

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CSKY

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DirectX

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Generic

[IR] Remove support for icmp and fcmp constant expressions (#93038)

2024-06-04 08:31:03 +02:00

Hexagon

[IR] Remove support for icmp and fcmp constant expressions (#93038)

2024-06-04 08:31:03 +02:00

Inputs

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Lanai

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LoongArch

[LoongArch] Custom legalize i32 operations for LA64 to reduce signed extensions (#93811)

2024-06-03 13:23:35 +08:00

M68k

[M68k] Fix compilation pipeline check

2024-05-31 20:06:54 -04:00

Mips

[IR] Remove support for icmp and fcmp constant expressions (#93038)

2024-06-04 08:31:03 +02:00

MIR

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MLRegAlloc

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MSP430

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NVPTX

[NVPTX] disable combine-mad test for newer ptxas (#93919)

2024-06-01 09:28:56 -07:00

PowerPC

[PowerPC] Add test of non-zero addend in tocdata relocation. NFC.

2024-06-05 08:55:57 +00:00

RISCV

[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214)

2024-06-04 09:23:52 +08:00

SPARC

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SPIRV

[SPIR-V] Introduce support of '__spirv_' wrapper builtins for the SPV_INTEL_subgroups extension (#94235)

2024-06-05 09:57:23 +02:00

SystemZ

[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214)

2024-06-04 09:23:52 +08:00

Thumb

[Thumb] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (#82120)

2024-05-26 14:58:32 -04:00

Thumb2

[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214)

2024-06-04 09:23:52 +08:00

VE

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WebAssembly

[WebAssembly] Implement all f16x8 unary instructions. (#94063)

2024-06-04 13:06:16 -04:00

WinCFGuard

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WinEH

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X86

[DAG] computeKnownBits - abs(x) will be zero in the upper bits if x is sign-extended (#94382)

2024-06-05 10:58:54 +01:00

XCore

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Xtensa

[PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (#92960)

2024-06-04 16:44:59 +02:00