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Amy Kwan 2af57b6099 [PowerPC] Add prefix load pattern for fpext to v2f64 
This patch adds a prefixed load pattern involving v2f32 fpext v2f64, where we
are dealing with a value with an offset that fits into a 34-bit signed immediate.
A reduced test case is also added to patch that tests the pattern, in which the
pattern is tested in the big endian CHECKs of the newly added test.

Differential Revision: https://reviews.llvm.org/D109887
2021-09-21 12:45:24 -05:00
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[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
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[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
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[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
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eh-dwarf-cfa.ll
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eieio.ll
…
elf-common.ll
…
eliminate-compare-of-copy.ll
…
empty-functions.ll
…
emptystruct.ll
…
emutls_generic.ll
…
eqv-andc-orc-nor.ll
…
expand-contiguous-isel.ll
…
expand-foldable-isel.ll
…
expand-isel-1.mir
…
expand-isel-2.mir
…
expand-isel-3.mir
…
expand-isel-4.mir
…
expand-isel-5.mir
…
expand-isel-6.mir
…
expand-isel-7.mir
…
expand-isel-8.mir
…
expand-isel-9.mir
…
expand-isel-10.mir
…
expand-isel-liveness.mir
…
expand-isel.ll
…
ext-bool-trunc-repl.ll
…
extra-toc-reg-deps.ll
…
extract-and-store.ll
…
extsh.ll
…
extswsli.ll
…
f32-to-i64.ll
…
f128_ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
f128-aggregates.ll
…
f128-arith.ll
…
f128-bitcast.ll
…
f128-compare.ll
…
f128-conv.ll
…
f128-fma.ll
…
f128-passByValue.ll
…
f128-rounding.ll
…
f128-truncateNconv.ll
…
f128-vecExtractNconv.ll
…
fabs.ll
…
fast-isel-binary.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-br-const.ll
…
fast-isel-branch.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-call.ll
…
fast-isel-cmp-imm.ll
…
fast-isel-const.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-conversion-p5.ll
…
fast-isel-conversion.ll
…
fast-isel-crash.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-ext.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-fcmp-nan.ll
…
fast-isel-fold.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-fpconv.ll
…
fast-isel-GEP-coalesce.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-i64offset.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-icmp-split.ll
…
fast-isel-indirectbr.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fast-isel-load-store-vsx.ll
…
fast-isel-load-store.ll
…
fast-isel-pcrel.ll
…
fast-isel-redefinition.ll
…
fast-isel-ret.ll
…
fast-isel-rsp.ll
[PowerPC] Guard XSRSP in P8 for FastISel
2021-09-07 15:17:51 +00:00
fast-isel-shifter.ll
[PowerPC] Enable fast-isel on AIX 64 subtarget
2021-09-03 11:33:45 +08:00
fastcc_stacksize.ll
…
fastisel-gep-promote-before-add.ll
…
fcpsgn.ll
…
fdiv-combine.ll
…
fdiv.ll
…
fixup-kill-dead-flag-crash.mir
…
float-asmprint.ll
…
float-load-store-pair.ll
…
float-logic-ops.ll
…
float-to-int.ll
…
float-vector-gather.ll
…
floatPSA.ll
…
flt-preinc.ll
…
fma-aggr-FMF.ll
…
fma-assoc.ll
…
fma-combine.ll
…
fma-ext.ll
…
fma-mutate-duplicate-vreg.ll
…
fma-mutate-register-constraint.ll
…
fma-mutate.ll
…
fma-negate.ll
…
fma-precision.ll
…
fma.ll
…
fmaxnum.ll
…
fmf-propagation.ll
…
fminnum.ll
…
fnabs.ll
…
fneg.ll
…
fold_swtest_br.ll
…
fold-frame-offset-using-rr.mir
…
fold-li.ll
…
fold-remove-li.ll
…
fold-rlwinm-1.ll
…
fold-rlwinm.mir
…
fold-zero.ll
…
fp2int2fp-ppcfp128.ll
…
fp64-to-int16.ll
…
fp128-bitcast-after-operation.ll
…
fp128-libcalls.ll
…
fp_to_uint.ll
…
fp-branch.ll
…
fp-int128-fp-combine.ll
…
fp-int-conversions-direct-moves.ll
…
fp-int-fp.ll
…
fp-intrinsics-fptosi-legal.ll
…
fp-splat.ll
…
fp-strict-conv-f128.ll
…
fp-strict-conv-spe.ll
…
fp-strict-conv.ll
…
fp-strict-f128.ll
…
fp-strict-fcmp-noopt.ll
…
fp-strict-fcmp-spe.ll
…
fp-strict-fcmp.ll
…
fp-strict-minmax.ll
…
fp-strict-round.ll
…
fp-strict.ll
…
fp-to-int-ext.ll
…
fp-to-int-to-fp.ll
…
fpcopy.ll
…
fpscr-intrinsics.ll
…
frame_index_scavenging.mir
…
frame-size.ll
…
frameaddr.ll
…
Frames-dyn-alloca-with-func-call.ll
…
Frames-dyn-alloca.ll
…
Frames-large.ll
…
Frames-leaf.ll
…
Frames-small.ll
…
Frames-stack-floor.ll
…
frem.ll
Pre-commit frem test in PowerPC
2021-08-18 17:52:53 +08:00
frounds.ll
…
fsel.ll
…
fsl-e500mc.ll
…
fsl-e5500.ll
…
fsqrt.ll
…
fsub-fneg.ll
…
ftrunc-legalize.ll
…
ftrunc-vec.ll
…
func-addr-consts.ll
…
func-addr.ll
…
func-alias.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
[NFC] Add tests for i128 fshl on a few targets.
2021-08-24 11:43:35 -07:00
fusion-load-store.ll
…
future-check-features.ll
…
glob-comp-aa-crash.ll
…
global-address-non-got-indirect-access.ll
…
gpr-vsr-spill.ll
…
handle-f16-storage-type.ll
…
hardware-loops-crash.ll
…
hello.ll
…
hidden-vis-2.ll
…
hidden-vis.ll
…
hoist-logic.ll
…
htm-ttest.ll
…
htm.ll
…
huge-frame-size.ll
[PowerPC] Use int64_t to represent stack object offset and frame size
2021-08-23 02:13:21 +00:00
i1-ext-fold.ll
…
i1-to-double.ll
…
i32-to-float.ll
…
i64_fp_round.ll
…
i64_fp.ll
…
i64-to-float.ll
…
i128-and-beyond.ll
…
ia-mem-r0.ll
…
ia-neg-const.ll
…
iabs.ll
…
ifcvt_cr_field.ll
[PowerPC] Fixed the crash due to early if conversion with fixed CR fields
2021-09-07 10:51:03 -05:00
ifcvt-diamond-ret.mir
…
ifcvt-forked-bug-2016-08-08.ll
…
ifcvt.ll
…
ifcvt.mir
…
ifunc.ll
…
illegal-element-type.ll
…
in-asm-f64-reg.ll
…
inc-of-add.ll
…
indexed-load.ll
…
indirect-hidden.ll
…
indirectbr.ll
…
inline-asm-dollarpc.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-label.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-physical-fpr-spe.ll
…
inline-asm-physical-fpr.ll
…
inline-asm-s-modifier.ll
…
inline-asm-scalar-to-vector-error.ll
…
inline-asm-vsx-clobbers.ll
…
inlineasm-copy.ll
…
inlineasm-extendedmne.ll
…
inlineasm-i64-reg.ll
…
inlineasm-output-template.ll
…
inlineasm-vsx-reg.ll
…
instr-properties.ll
…
int128_ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
int-fp-conv-0.ll
…
int-fp-conv-1.ll
…
inverted-bool-compares.ll
…
isel-rc-nox0.ll
…
isel.ll
…
ispositive.ll
…
isync.ll
…
itofp128.ll
…
jaggedstructs.ll
…
jump-tables-collapse-rotate-remove-SrcMI.mir
…
jump-tables-collapse-rotate.ll
…
kernel-fp-round.ll
…
knowCRBitSpill.ll
…
LargeAbsoluteAddr.ll
…
larger-than-red-zone.ll
…
lbz-from-ld-shift.ll
…
lbzux.ll
…
ld-bswap64-no-ldbrx.ll
…
ld-st-upd.ll
…
ldst-16-byte-asm.mir
…
ldst-16-byte.mir
…
ldst-align.ll
…
ldtoc-inv.ll
…
legalize-invert-br_cc.ll
…
legalize-vaarg.ll
…
lha.ll
…
licm-remat.ll
…
licm-tocReg.ll
…
lit.local.cfg
…
livephysregs.mir
…
livevars-crash1.mir
…
livevars-crash2.mir
…
llrint-conv.ll
…
llround-conv.ll
…
load-and-splat.ll
…
load-constant-addr.ll
…
load-rightmost-vector-elt.ll
…
load-shift-combine.ll
…
load-shuffle-and-shuffle-store.ll
…
load-two-flts.ll
…
load-v4i8-improved.ll
…
logic-ops-on-compares.ll
…
long-compare.ll
…
longcall.ll
…
longdbl-truncate.ll
…
loop-align.ll
…
loop-comment.ll
…
loop-data-prefetch-inner.ll
…
loop-data-prefetch.ll
…
loop-hoist-toc-save.ll
…
loop-instr-form-prepare.ll
…
loop-instr-prep-non-const-increasement.ll
[PowerPC] prepare more loop load/store instructions
2021-09-14 05:00:48 +00:00
loop-p10-pair-prepare.ll
…
loop-prep-all.ll
…
lower-globaladdr32-aix-asm.ll
…
lower-globaladdr32-aix.ll
…
lower-globaladdr64-aix-asm.ll
…
lower-globaladdr64-aix.ll
…
lower-massv-attr.ll
…
lower-massv.ll
…
lrint-conv.ll
…
lround-conv.ll
…
lsa.ll
…
lsr-ctrloop.ll
…
lsr-insns-cost.ll
…
lsr-postinc-pos.ll
…
lsr-profitable-chain.ll
[PowerPC] prepare more loop load/store instructions
2021-09-14 05:00:48 +00:00
lxv-aligned-stack-slots.ll
…
lxvw4x-bug.ll
…
machine-backward-cp.mir
…
machine-combiner.ll
…
machine-pre.ll
…
machinelicm-cse-dead-flag.mir
…
macro-fusion.ll
…
maddld.ll
…
mask64.ll
…
mature-mc-support.ll
…
mc-instrlat.ll
…
mcm-1.ll
…
mcm-2.ll
…
mcm-3.ll
…
mcm-4.ll
…
mcm-5.ll
…
mcm-6.ll
…
mcm-7.ll
…
mcm-8.ll
…
mcm-9.ll
…
mcm-10.ll
…
mcm-11.ll
…
mcm-12.ll
…
mcm-13.ll
…
mcm-default.ll
…
mcm-obj-2.ll
…
mcm-obj.ll
…
mcount-insertion.ll
…
MCSE-caller-preserved-reg.ll
…
mem_update.ll
…
mem-rr-addr-mode.ll
…
memcmp-mergeexpand.ll
…
memcmp.ll
…
memcmpIR.ll
…
memCmpUsedInZeroEqualityComparison.ll
…
memcpy_dereferenceable.ll
…
memcpy-vec.ll
…
memset-nc-le.ll
…
merge_stores_dereferenceable.ll
…
merge-st-chain-op.ll
…
MergeConsecutiveStores.ll
…
mftb.ll
…
mi-peephole-splat.ll
…
mi-peephole.mir
…
mi-scheduling-lhs.ll
…
mi-simplify-code.mir
…
misched-inorder-latency.ll
…
misched.ll
…
mma-acc-memops.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
mma-acc-spill.ll
…
mma-integer-based-outer-product.ll
…
mma-intrinsics.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
mma-outer-product.ll
…
mma-phi-accs.ll
Revert "[HardwareLoops] Change order of SCEV expression construction for InitLoopCount."
2021-09-03 02:55:43 +00:00
MMO-flags-assertion.ll
…
more-dq-form-prepare.ll
…
mtvsrdd.ll
…
mul-const-i64.ll
…
mul-const-vector.ll
…
mul-const.ll
…
mul-high.ll
…
mul-with-overflow.ll
…
mulhs.ll
…
mulld.ll
…
mulli.ll
…
mult-alt-generic-powerpc64.ll
…
mult-alt-generic-powerpc.ll
…
multi-return.ll
…
named-reg-alloc-r0.ll
…
named-reg-alloc-r1-64.ll
…
named-reg-alloc-r1.ll
…
named-reg-alloc-r2-64.ll
…
named-reg-alloc-r2.ll
…
named-reg-alloc-r13-64.ll
…
named-reg-alloc-r13.ll
…
neg-abs.ll
…
neg.ll
…
negate-i1.ll
…
negctr.ll
…
no-ctr-loop-if-exit-in-nested-loop.ll
…
no-dead-strip.ll
…
no-dup-of-bdnz.ll
…
no-dup-spill-fp.ll
…
no-duplicate.ll
…
no-ext-with-count-zeros.ll
…
no-extra-fp-conv-ldst.ll
…
no-pref-jumps.ll
…
no-rlwimi-trivial-commute.mir
…
NoCRFieldRedefWhenSpillingCRBIT.mir
…
nofpexcept.ll
…
nomerge.ll
…
non-debug-mi-search-frspxsrsp.ll
…
non-simple-args-intrin.ll
…
noPermuteFormasking.ll
…
not-fixed-frame-object.ll
…
novrsave.ll
…
O3-pipeline.ll
Revert "[Remarks] Emit optimization remarks for atomics generating CAS loop"
2021-08-15 11:44:13 +02:00
opt-builtins-ppc-xlcompat-cas.ll
…
opt-cmp-inst-cr0-live.ll
…
opt-li-add-to-addi.ll
…
opt-sub-inst-cr0-live.mir
…
optcmp.ll
…
optimize-andiso.ll
…
optnone-crbits-i1-ret.ll
…
or-addressing-mode.ll
…
ori_imm32.ll
…
ori_imm64.ll
…
out-of-range-dform.ll
…
overflow-intrinsic-optimizations.ll
[PPCISelLowering] avoid emitting libcalls to __mulodi4()
2021-08-31 11:09:58 -07:00
p8-isel-sched.ll
…
p8-scalar_vector_conversions.ll
…
p8altivec-shuffles-pred.ll
…
p9_copy_fp.ll
…
p9-dform-load-alignment.ll
…
p9-vector-compares-and-counts.ll
…
p9-vector-sign-extend.ll
…
p9-vinsert-vextract.ll
…
p9-xxinsertw-xxextractuw.ll
…
p10-bit-manip-ops.ll
…
p10-constants.ll
…
p10-fi-elim.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
p10-setbc-ri.ll
…
p10-setbc-rr.ll
…
p10-setbcr-ri.ll
…
p10-setbcr-rr.ll
…
p10-setboolean-ext-fp.ll
…
p10-setnbc-ri.ll
…
p10-setnbc-rr.ll
…
p10-setnbcr-ri.ll
…
p10-setnbcr-rr.ll
…
p10-spill-creq.ll
…
p10-spill-crgt.ll
…
p10-spill-crlt.ll
…
p10-spill-crun.ll
…
p10-splatImm32.ll
…
p10-splatImm-CPload-pcrel.ll
…
p10-splatImm.ll
…
p10-string-ops.ll
…
p10-vector-divide.ll
…
p10-vector-mask-ops.ll
…
p10-vector-modulo.ll
…
p10-vector-multiply.ll
…
p10-vector-rotate.ll
…
p10-vector-shift.ll
…
p10-vector-sign-extend.ll
…
p10-vsx-pcv.ll
…
P10-stack-alignment.ll
…
paired-vector-intrinsics.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
pcrel_ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
pcrel-block-address.ll
…
pcrel-byte-loads.ll
…
pcrel-call-linkage-leaf.ll
…
pcrel-call-linkage-simple.ll
…
pcrel-call-linkage-with-calls.ll
…
pcrel-got-indirect.ll
…
pcrel-indirect-call.ll
…
pcrel-jump-table.ll
…
pcrel-linkeropt-option.ll
…
pcrel-linkeropt.ll
…
pcrel-local-caller-toc.ll
…
pcrel-relocation-plus-offset.ll
…
pcrel-tail-calls.ll
…
pcrel-tls_get_addr_clobbers.ll
…
pcrel-tls-general-dynamic.ll
…
pcrel-tls-initial-exec.ll
…
pcrel-tls-local-dynamic.ll
…
pcrel-tls-local-exec.ll
…
pcrel.ll
…
peephole-align.ll
…
peephole-cmp-eq.mir
…
peephole-miscompile-extswsli.mir
…
peephole-phi-acc.mir
…
peephole-subreg-def.mir
…
phi-eliminate.mir
…
pie.ll
…
pip-inner.ll
…
popcnt-zext.ll
…
popcnt.ll
…
popcount.ll
…
post-ra-ec.ll
…
pow_massv_075_025exp.ll
…
pow.75.ll
…
power9-moves-and-splats.ll
…
powf_massv_075_025exp.ll
…
ppc32-align-long-double-sf.ll
…
ppc32-constant-BE-ppcf128.ll
…
ppc32-cyclecounter.ll
…
ppc32-i1-stack-arguments-abi-bug.ll
…
ppc32-i1-vaarg.ll
…
ppc32-i64-to-float-conv.ll
…
ppc32-lshrti3.ll
…
ppc32-nest.ll
…
ppc32-pic-large.ll
…
ppc32-pic.ll
…
ppc32-secure-plt-tls2.ll
…
ppc32-secure-plt-tls.ll
…
ppc32-selectcc-i64.ll
…
ppc32-skip-regs.ll
…
ppc32-vacopy.ll
…
ppc64-32bit-addic.ll
…
ppc64-abi-extend.ll
…
ppc64-acc-regalloc-bugfix.ll
[PowerPC] Fix issue where hint was providing the incorrect regsiter class.
2021-07-29 21:10:45 -05:00
ppc64-acc-regalloc.ll
…
ppc64-align-long-double.ll
…
ppc64-altivec-abi.ll
…
ppc64-anyregcc-crash.ll
…
ppc64-anyregcc.ll
…
ppc64-blnop.ll
…
ppc64-byval-align.ll
…
ppc64-calls.ll
…
ppc64-crash.ll
…
ppc64-crsave.mir
…
ppc64-cyclecounter.ll
…
ppc64-elf-abi.ll
…
ppc64-fastcc-fast-isel.ll
…
ppc64-fastcc.ll
…
ppc64-func-desc-hoist.ll
…
ppc64-gep-opt.ll
…
ppc64-get-cache-line-size.ll
…
ppc64-i128-abi.ll
…
ppc64-icbt-pwr7.ll
…
ppc64-icbt-pwr8.ll
…
ppc64-inlineasm-clobber.ll
…
ppc64-linux-func-size.ll
…
ppc64-nest.ll
…
ppc64-nonfunc-calls.ll
…
ppc64-P9-mod.ll
…
ppc64-P9-setb.ll
…
ppc64-P9-vabsd.ll
…
ppc64-patchpoint.ll
…
ppc64-pre-inc-no-extra-phi.ll
…
ppc64-prefetch.ll
…
ppc64-r2-alloc.ll
…
ppc64-rop-protection.ll
…
ppc64-sibcall-shrinkwrap.ll
…
ppc64-sibcall.ll
…
ppc64-smallarg.ll
…
ppc64-stackmap-nops.ll
…
ppc64-stackmap.ll
…
ppc64-toc.ll
…
ppc64-vaarg-int.ll
…
ppc64-varargs.ll
…
ppc64-xxsplti32dx-pattern-check.ll
…
ppc64-zext.ll
…
ppc64le-aggregates.ll
…
ppc64le-calls.ll
…
ppc64le-crsave.ll
…
ppc64le-localentry-large.ll
…
ppc64le-localentry.ll
…
ppc64le-smallarg.ll
…
ppc440-fp-basic.ll
…
ppc440-msync.ll
…
ppc_fp128-bcwriter.ll
…
ppc-32bit-build-vector.ll
…
ppc-32bit-shift.ll
…
ppc-crbits-onoff.ll
…
ppc-ctr-dead-code.ll
…
ppc-disable-non-volatile-cr.ll
…
ppc-empty-fs.ll
…
ppc-label2.ll
…
ppc-label.ll
…
ppc-partword-atomic.ll
…
ppc-passname-assert.ll
…
ppc-passname.ll
…
ppc-prologue.ll
…
ppc-redzone-alignment-bug.ll
…
ppc-shrink-wrapping.ll
…
ppc-vaarg-agg.ll
…
ppcf128-1-opt.ll
…
ppcf128-1.ll
…
ppcf128-2.ll
…
ppcf128-3.ll
…
ppcf128-4.ll
…
ppcf128-constrained-fp-intrinsics.ll
…
ppcf128-endian.ll
…
ppcf128-freeze.mir
…
ppcf128sf.ll
…
ppcsoftops.ll
…
pr3711_widen_bit.ll
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pr12757.ll
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pr13641.ll
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pr13891.ll
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pr15031.ll
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pr15359.ll
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pr15630.ll
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pr15632.ll
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pr16556-2.ll
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pr16556.ll
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pr16573.ll
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pr17168.ll
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pr17354.ll
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pr18663-2.ll
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pr18663.ll
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pr20442.ll
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pr22711.ll
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pr24216.ll
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pr24546.ll
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pr24636.ll
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pr25080.ll
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pr25157-peephole.ll
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pr25157.ll
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pr26180.ll
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pr26193.ll
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pr26356.ll
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pr26378.ll
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pr26381.ll
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pr26617.ll
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pr26690.ll
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pr27078.ll
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pr27350.ll
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pr28130.ll
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pr28630.ll
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pr30451.ll
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pr30640.ll
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pr30663.ll
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pr30715.ll
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pr31144.ll
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pr32063.ll
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pr32140.ll
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pr33093.ll
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pr33547.ll
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pr35402.ll
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pr35688.ll
[MemorySSA] Remove -enable-mssa-loop-dependency option
2021-08-16 20:59:37 +02:00
pr36068.ll
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pr36292.ll
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pr38087.ll
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pr38899-split-register-at-spill.mir
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pr39478.ll
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pr39815.ll
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pr40922.ll
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pr41088.ll
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pr41177.ll
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pr42492.ll
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pr43527.ll
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pr43976.ll
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pr44183.ll
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pr44239.ll
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pr45186.ll
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pr45297.ll
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pr45301.ll
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pr45432.ll
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pr45448.ll
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pr45628.ll
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pr45709.ll
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pr46759.ll
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pr46923.ll
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pr47373.ll
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pr47660.ll
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pr47707.ll
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pr47830.ll
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pr47891.ll
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pr47916.ll
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pr48388.ll
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pr48519.ll
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pr48527.ll
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pr49092.ll
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pr49509.ll
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PR3488.ll
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PR33636.ll
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PR33671.ll
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PR35812-neg-cmpxchg.ll
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pre-inc-disable.ll
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prefer-dqform.ll
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preinc-ld-sel-crash.ll
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preincprep-i64-check.ll
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preincprep-invoke.ll
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preincprep-nontrans-crash.ll
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private.ll
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prolog_vec_spills.mir
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pwr3-6x.ll
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pwr7-gt-nop.ll
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pzero-fp-xored.ll
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quadint-return.ll
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r31.ll
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read-set-flm.ll
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recipest.ll
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reduce_cr.ll
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reduce_scalarization02.ll
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reduce_scalarization.ll
[PowerPC] Add prefix load pattern for fpext to v2f64
2021-09-21 12:45:24 -05:00
redundant-copy-after-tail-dup.ll
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reg_copy.mir
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reg-coalesce-simple.ll
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reg-names.ll
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reg-scavenging.ll
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register-pressure-reduction.ll
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reloc-align.ll
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remap-crash.ll
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remat-imm.ll
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rematerializable-instruction-machine-licm.ll
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remove-copy-crunsetcrbit.mir
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remove-implicit-use.mir
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remove-redundant-li-implicit-reg.mir
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remove-redundant-li-skip-imp-kill.mir
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remove-redundant-load-imm.ll
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remove-redundant-load-imm.mir
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remove-redundant-moves.ll
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remove-redundant-toc-saves.ll
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remove-self-copies.mir
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repeated-fp-divisors.ll
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resolvefi-basereg.ll
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resolvefi-disp.ll
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restore-r30.ll
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retaddr2.ll
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retaddr_multi_levels.ll
[PowerPC] Fix return address computation for "__builtin_return_address"
2021-08-12 09:44:49 -05:00
retaddr.ll
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return-val-i128.ll
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rlwimi2.ll
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rlwimi3.ll
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rlwimi-and-or-bits.ll
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rlwimi-and.ll
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rlwimi-commute.ll
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rlwimi-dyn-and.ll
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rlwimi-keep-rsh.ll
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rlwimi.ll
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rlwinm2.ll
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rlwinm_rldicl_to_andi.mir
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rlwinm-zero-ext.ll
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rlwinm.ll
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rm-zext.ll
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rotl-2.ll
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rotl-64.ll
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rotl-rotr-crash.ll
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rotl.ll
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rounding-ops.ll
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rounding-rm-flag.ll
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rs-undef-use.ll
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s000-alias-misched.ll
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sat-add.ll
[ISel] Expand saddsat and ssubsat via asr and xor
2021-08-19 16:08:07 +01:00
sat-register-clobber.ll
…
saturating-intrinsics.ll
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save-bp.ll
…
save-cr-ppc32svr4.ll
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save-crbp-ppc32svr4.ll
…
scalar_cmp.ll
…
scalar_vector_test_1.ll
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scalar_vector_test_2.ll
…
scalar_vector_test_3.ll
…
scalar_vector_test_4.ll
…
scalar_vector_test_5.ll
[PowerPC] Fix copy/paste error in scalar_to_vector patterns
2021-08-06 02:59:01 +00:00
scalar-double-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
scalar-equal.ll
…
scalar-float-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
scalar-i8-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
scalar-i16-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
scalar-i32-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
scalar-i64-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
scalar-min-max.ll
…
scalar-rounding-ops.ll
…
scavenging.mir
…
sched-addi.ll
…
schedule-addi-load.mir
…
scheduling-mem-dependency.ll
…
sdag-ppcf128.ll
…
sdiv-pow2.ll
…
sections.ll
…
select_const.ll
…
select_lt0.ll
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select-addrRegRegOnly.ll
…
select-cc.ll
…
select-constant-xor.ll
[DAG] Fix GT -> GE condition when creating SetCC
2021-09-08 12:41:51 +01:00
select-i1-vs-i1.ll
…
select-to-branch.mir
…
select.ll
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selectiondag-extload-computeknownbits.ll
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selectiondag-sextload.ll
…
set0-v8i16.ll
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setcc_no_zext.ll
…
setcc-logic.ll
…
setcc-sub-flag.ll
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setcc-to-sub.ll
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setcc-vector.ll
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setcclike-or-comb.ll
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setcr_bc2.mir
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setcr_bc3.mir
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setcr_bc.mir
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seteq-0.ll
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setrnd.ll
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sext-vector-inreg.ll
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sh-overflow.mir
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shift128.ll
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shift_mask.ll
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shift-cmp.ll
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shl_elim.ll
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shl_sext.ll
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shrink-wrap.ll
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shrink-wrap.mir
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sign_ext_inreg1.ll
…
sign-ext-atomics.ll
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signbit-shift.ll
…
simplifyConstCmpToISEL.ll
…
sink-down-more-instructions-1.mir
[PowerPC] Set branch/call instructions as no hasSideEffects
2021-08-30 12:23:35 +08:00
sink-down-more-instructions-regpressure-high.mir
…
sink-side-effect.ll
[PowerPC] Set branch/call instructions as no hasSideEffects
2021-08-30 12:23:35 +08:00
sj-ctr-loop.ll
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sjlj_no0x.ll
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sjlj.ll
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small-arguments.ll
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sms-cpy-1.ll
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sms-grp-order.ll
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sms-iterator.ll
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sms-phi-1.ll
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sms-phi-2.ll
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sms-phi-3.ll
…
sms-phi-5.ll
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sms-phi.ll
…
sms-remark.ll
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sms-simple.ll
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smulfixsat.ll
[DAG] Remove oneuse check in select_cc setgt X, -1, C, ~C fold
2021-09-05 16:18:31 +01:00
spe-fastmath.ll
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spe-hwdouble.ll
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spe.ll
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spill_p9_setb.ll
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spill-nor0.ll
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spill-nor0.mir
…
spill-vec-pair.ll
…
splat-bug.ll
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splat-larger-types-as-v16i8.ll
…
split-index-tc.ll
…
splitstore-check-volatile.ll
…
srem-lkk.ll
…
srem-seteq-illegal-types.ll
…
srem-vector-lkk.ll
RegAllocGreedy: Account for reserved registers in num regs heuristic
2021-09-14 21:00:29 -04:00
srl-mask.ll
…
stack_pointer_vec_spills.mir
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stack-clash-dynamic-alloca.ll
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stack-clash-prologue-nounwind.ll
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stack-clash-prologue.ll
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stack-coloring-vararg.mir
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stack-guard-oob.ll
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stack-guard-reassign.ll
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stack-no-redzone.ll
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stack-protector.ll
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stack-realign.ll
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stack-restore-with-setjmp.ll
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stackmap-frame-setup.ll
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stacksize.ll
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std-unal-fi.ll
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stdux-constuse.ll
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stfiwx-2.ll
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stfiwx.ll
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store_fptoi.ll
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store-combine.ll
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store-constant.ll
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store-load-fwd.ll
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store-rightmost-vector-elt.ll
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store-update.ll
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structsinmem.ll
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structsinregs.ll
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stubs.ll
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stwu8.ll
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stwu-gta.ll
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stwu-sched.ll
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stwux.ll
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sub-bv-types.ll
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sub-of-not.ll
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subc.ll
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subreg-killed.mir
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subreg-postra-2.ll
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subreg-postra.ll
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subtract_from_imm.ll
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svr4-redzone.ll
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swap-reduction.ll
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swaps-le-1.ll
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swaps-le-2.ll
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swaps-le-3.ll
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swaps-le-4.ll
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swaps-le-5.ll
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swaps-le-6.ll
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swaps-le-7.ll
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swaps-le-8.ll
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tail-dup-analyzable-fallthrough.ll
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tail-dup-branch-to-fallthrough.ll
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tail-dup-break-cfg.ll
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tail-dup-layout.ll
…
tailcall1-64.ll
…
tailcall1.ll
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tailcall-speculatable-callee.ll
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tailcall-string-rvo.ll
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tailcallpic1.ll
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test_call_aix.ll
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test_func_desc.ll
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test-and-cmp-folding.ll
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testBitReverse.ll
…
testComparesi32gtu.ll
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testComparesi32leu.ll
…
testComparesi32ltu.ll
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testComparesieqsc.ll
…
testComparesieqsi.ll
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testComparesieqsll.ll
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testComparesieqss.ll
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testComparesiequc.ll
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testComparesiequi.ll
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testComparesiequll.ll
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testComparesiequs.ll
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testComparesigesc.ll
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testComparesigesi.ll
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testComparesigesll.ll
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testComparesigess.ll
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testComparesigeuc.ll
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testComparesigeui.ll
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testComparesigeull.ll
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testComparesigeus.ll
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testComparesigtsc.ll
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testComparesigtsi.ll
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testComparesigtsll.ll
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testComparesigtss.ll
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testComparesigtuc.ll
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testComparesigtui.ll
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testComparesigtus.ll
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testComparesilesc.ll
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testComparesilesi.ll
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testComparesilesll.ll
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testComparesiless.ll
…
testComparesileuc.ll
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testComparesileui.ll
…
testComparesileull.ll
…
testComparesileus.ll
…
testComparesiltsc.ll
…
testComparesiltsi.ll
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testComparesiltsll.ll
…
testComparesiltss.ll
…
testComparesiltuc.ll
…
testComparesiltui.ll
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testComparesiltus.ll
…
testComparesinesc.ll
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testComparesinesi.ll
…
testComparesinesll.ll
…
testComparesiness.ll
…
testComparesineuc.ll
…
testComparesineui.ll
…
testComparesineull.ll
…
testComparesineus.ll
…
testCompareslleqsc.ll
…
testCompareslleqsi.ll
…
testCompareslleqsll.ll
…
testCompareslleqss.ll
…
testComparesllequc.ll
…
testComparesllequi.ll
…
testComparesllequll.ll
…
testComparesllequs.ll
…
testComparesllgesc.ll
…
testComparesllgesi.ll
…
testComparesllgesll.ll
…
testComparesllgess.ll
…
testComparesllgeuc.ll
…
testComparesllgeui.ll
…
testComparesllgeull.ll
…
testComparesllgeus.ll
…
testComparesllgtsll.ll
…
testComparesllgtuc.ll
…
testComparesllgtui.ll
…
testComparesllgtus.ll
…
testCompareslllesc.ll
…
testCompareslllesi.ll
…
testCompareslllesll.ll
…
testComparesllless.ll
…
testComparesllleuc.ll
…
testComparesllleui.ll
…
testComparesllleull.ll
…
testComparesllleus.ll
…
testComparesllltsll.ll
…
testComparesllltuc.ll
…
testComparesllltui.ll
…
testComparesllltus.ll
…
testComparesllnesll.ll
…
testComparesllneull.ll
…
thread-pointer.ll
…
tls_get_addr_clobbers.ll
…
tls_get_addr_fence1.mir
…
tls_get_addr_fence2.mir
…
tls_get_addr_stackframe.ll
…
tls-cse.ll
…
tls-pic.ll
…
tls-pie-xform.ll
…
tls-store2.ll
…
tls.ll
…
toc-data.ll
…
toc-float.ll
…
toc-load-sched-bug.ll
…
tocSaveInPrologue.ll
…
topdepthreduce-postra.mir
…
trampoline.ll
…
trunc-srl-load.ll
…
two-address-crash.mir
…
uint-to-fp-v4i32.ll
…
uint-to-ppcfp128-crash.ll
…
umulfixsat.ll
…
umulo-128-legalisation-lowering.ll
…
unal4-std.ll
…
unal-altivec2.ll
…
unal-altivec-wint.ll
…
unal-altivec.ll
…
unal-vec-ldst.ll
…
unal-vec-negarith.ll
…
unaligned-addressing-mode.ll
…
unaligned-dqform-ld.ll
…
unaligned-floats.ll
…
unaligned.ll
[DAG] TransformFPLoadStorePair - replace getABITypeAlign with allowsMemoryAccess (PR45116)
2021-08-24 13:11:27 +01:00
unreachable-mbb-jtreference-elimination.ll
…
unsafe-math.ll
…
unwind-dw2-g.ll
…
unwind-dw2.ll
…
urem-lkk.ll
…
urem-seteq-illegal-types.ll
…
urem-vector-lkk.ll
RegAllocGreedy: Account for reserved registers in num regs heuristic
2021-09-14 21:00:29 -04:00
use-cr-result-of-dom-icmp-st.ll
…
uwtables.ll
…
vaddsplat.ll
…
varargs-struct-float.ll
…
varargs.ll
…
variable_elem_vec_extracts.ll
…
vavg.ll
…
vcmp-fold.ll
…
vec_abs.ll
…
vec_absd.ll
…
vec_add_sub_doubleword.ll
…
vec_add_sub_quadword.ll
…
vec_auto_constant.ll
…
vec_br_cmp.ll
…
vec_buildvector_loadstore.ll
…
vec_call.ll
…
vec_clz.ll
…
vec_cmp.ll
…
vec_cmpd_p7.ll
…
vec_cmpd.ll
…
vec_cmpq.ll
…
vec_constants.ll
…
vec_conv_fp32_to_i8_elts.ll
…
vec_conv_fp32_to_i16_elts.ll
…
vec_conv_fp32_to_i64_elts.ll
…
vec_conv_fp64_to_i8_elts.ll
…
vec_conv_fp64_to_i16_elts.ll
…
vec_conv_fp64_to_i32_elts.ll
…
vec_conv_fp_to_i_4byte_elts.ll
…
vec_conv_fp_to_i_8byte_elts.ll
…
vec_conv_i8_to_fp32_elts.ll
…
vec_conv_i8_to_fp64_elts.ll
…
vec_conv_i16_to_fp32_elts.ll
…
vec_conv_i16_to_fp64_elts.ll
…
vec_conv_i32_to_fp64_elts.ll
…
vec_conv_i64_to_fp32_elts.ll
…
vec_conv_i_to_fp_4byte_elts.ll
…
vec_conv_i_to_fp_8byte_elts.ll
…
vec_conv.ll
…
vec_extload.ll
…
vec_extract_p9_2.ll
…
vec_extract_p9.ll
…
vec_fmuladd.ll
…
vec_fneg.ll
…
vec_insert_elt.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
vec_insert.ll
…
vec_int_ext.ll
…
vec_int_to_double_shuffle.ll
[PowerPC] Fix shift amount of xxsldwi when performing vector int_to_double
2021-08-06 06:01:29 +00:00
vec_mergeow.ll
…
vec_minmax.ll
…
vec_misaligned.ll
…
vec_mul_even_odd.ll
…
vec_mul.ll
…
vec_perf_shuffle.ll
…
vec_popcnt.ll
…
vec_revb.ll
…
vec_rotate_shift.ll
…
vec_rounding.ll
…
vec_select.ll
…
vec_shift.ll
…
vec_shuffle_le.ll
…
vec_shuffle_p8vector_le.ll
…
vec_shuffle_p8vector.ll
…
vec_shuffle.ll
…
vec_sldwi.ll
…
vec_splat_constant.ll
…
vec_splat.ll
…
vec_sqrt.ll
…
vec_urem_const.ll
…
vec_veqv_vnand_vorc.ll
…
vec_vrsave.ll
…
vec_xxpermdi.ll
…
vec_zero.ll
…
vec-abi-align.ll
…
vec-asm-disabled.ll
…
vec-bswap.ll
…
vec-extract-itofp.ll
…
vec-itofp.ll
…
vec-min-max.ll
…
vec-select.ll
…
vec-trunc2.ll
…
vec-trunc.ll
…
vector-constrained-fp-intrinsics.ll
…
vector-copysign.ll
…
vector-extend-sign.ll
…
vector-identity-shuffle.ll
…
vector-ldst.ll
[PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
2021-09-14 08:39:49 -05:00
vector-merge-store-fp-constants.ll
…
vector-popcnt-128-ult-ugt.ll
…
vector-rotates.ll
…
vector-rounding-ops.ll
…
vector.ll
…
vmladduhm.ll
…
vperm-instcombine.ll
…
vperm-lowering.ll
…
vrsave-inline-asm.ll
…
vrspill.ll
…
vsel-prom.ll
…
vselect-constants.ll
…
vsx_builtins.ll
…
vsx_insert_extract_le.ll
…
vsx_scalar_ld_st.ll
…
vsx_shuffle_le.ll
…
vsx-args.ll
…
VSX-DForm-Scalars.ll
…
vsx-div.ll
…
vsx-elementary-arith.ll
…
vsx-fma-m.ll
…
vsx-fma-mutate-trivial-copy.ll
…
vsx-fma-mutate-undef.ll
…
vsx-fma-sp.ll
…
vsx-infl-copy1.ll
…
vsx-infl-copy2.ll
…
vsx-ldst-builtin-le.ll
…
vsx-ldst.ll
…
vsx-minmax.ll
…
vsx-p8.ll
…
vsx-p9.ll
…
vsx-partword-int-loads-and-stores.ll
…
vsx-recip-est.ll
…
vsx-self-copy.ll
…
vsx-shuffle-le-load.ll
…
vsx-shuffle-le-multiple-uses.ll
…
vsx-spill-norwstore.ll
…
vsx-spill.ll
…
vsx-vec-spill.ll
…
vsx-word-splats.ll
…
VSX-XForm-Scalars.ll
…
vsx.ll
…
vsxD-Form-spills.ll
…
vtable-reloc.ll
…
wa-asm-fpr.ll
…
weak_def_can_be_hidden.ll
…
xray-attribute-instrumentation.ll
…
xray-conditional-return.ll
…
xray-ret-is-terminator.ll
…
xray-tail-call-hidden.ll
…
xray-tail-call-sled.ll
…
xvcmpeqdp-v2f64.ll
…
xxeval-and-nand.ll
…
xxleqv_xxlnand_xxlorc.ll
…
xxpermdi_mnemonics.s
…
zero-not-run.ll
…
zext-and-cmp.ll
…
zext-bitperm.ll
…
zext-free.ll
…