571e4de02e
In most places, the rows are copied anyway (because they are generated by cumulating modifications) immediately after adding them to the unwind plans. In others, they can be moved into the unwind plan. This lets us remove some backflip copies and make `const UnwindPlan` actually mean something. I've split this patch into two (and temporarily left both APIs) as this patch was getting a bit big. This patch covers all the interesting cases. Part two all about converting "architecture default" unwind plans from ABI and InstructionEmulation plugins.
614 lines
24 KiB
C++
614 lines
24 KiB
C++
//===-- UnwindAssemblyInstEmulation.cpp -----------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "UnwindAssemblyInstEmulation.h"
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#include "lldb/Core/Address.h"
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#include "lldb/Core/Disassembler.h"
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#include "lldb/Core/DumpDataExtractor.h"
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#include "lldb/Core/DumpRegisterValue.h"
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#include "lldb/Core/FormatEntity.h"
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#include "lldb/Core/PluginManager.h"
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#include "lldb/Target/ExecutionContext.h"
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#include "lldb/Target/Process.h"
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#include "lldb/Target/Target.h"
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#include "lldb/Target/Thread.h"
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#include "lldb/Utility/ArchSpec.h"
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#include "lldb/Utility/DataBufferHeap.h"
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#include "lldb/Utility/DataExtractor.h"
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#include "lldb/Utility/LLDBLog.h"
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#include "lldb/Utility/Log.h"
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#include "lldb/Utility/Status.h"
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#include "lldb/Utility/StreamString.h"
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using namespace lldb;
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using namespace lldb_private;
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LLDB_PLUGIN_DEFINE(UnwindAssemblyInstEmulation)
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// UnwindAssemblyInstEmulation method definitions
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bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly(
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AddressRange &range, Thread &thread, UnwindPlan &unwind_plan) {
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std::vector<uint8_t> function_text(range.GetByteSize());
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ProcessSP process_sp(thread.GetProcess());
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if (process_sp) {
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Status error;
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const bool force_live_memory = true;
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if (process_sp->GetTarget().ReadMemory(
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range.GetBaseAddress(), function_text.data(), range.GetByteSize(),
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error, force_live_memory) != range.GetByteSize()) {
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return false;
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}
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}
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return GetNonCallSiteUnwindPlanFromAssembly(
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range, function_text.data(), function_text.size(), unwind_plan);
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}
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bool UnwindAssemblyInstEmulation::GetNonCallSiteUnwindPlanFromAssembly(
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AddressRange &range, uint8_t *opcode_data, size_t opcode_size,
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UnwindPlan &unwind_plan) {
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if (opcode_data == nullptr || opcode_size == 0)
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return false;
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if (range.GetByteSize() == 0 || !range.GetBaseAddress().IsValid() ||
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!m_inst_emulator_up)
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return false;
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// The instruction emulation subclass setup the unwind plan for the first
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// instruction.
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m_inst_emulator_up->CreateFunctionEntryUnwind(unwind_plan);
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// CreateFunctionEntryUnwind should have created the first row. If it doesn't,
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// then we are done.
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if (unwind_plan.GetRowCount() == 0)
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return false;
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const bool prefer_file_cache = true;
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DisassemblerSP disasm_sp(Disassembler::DisassembleBytes(
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m_arch, nullptr, nullptr, nullptr, nullptr, range.GetBaseAddress(),
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opcode_data, opcode_size, 99999, prefer_file_cache));
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if (!disasm_sp)
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return false;
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Log *log = GetLog(LLDBLog::Unwind);
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m_range_ptr = ⦥
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m_unwind_plan_ptr = &unwind_plan;
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const uint32_t addr_byte_size = m_arch.GetAddressByteSize();
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const bool show_address = true;
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const bool show_bytes = true;
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const bool show_control_flow_kind = false;
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m_state.cfa_reg_info = *m_inst_emulator_up->GetRegisterInfo(
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unwind_plan.GetRegisterKind(), unwind_plan.GetInitialCFARegister());
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m_state.fp_is_cfa = false;
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m_state.register_values.clear();
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m_pushed_regs.clear();
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// Initialize the CFA with a known value. In the 32 bit case it will be
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// 0x80000000, and in the 64 bit case 0x8000000000000000. We use the address
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// byte size to be safe for any future address sizes
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m_initial_sp = (1ull << ((addr_byte_size * 8) - 1));
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RegisterValue cfa_reg_value;
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cfa_reg_value.SetUInt(m_initial_sp, m_state.cfa_reg_info.byte_size);
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SetRegisterValue(m_state.cfa_reg_info, cfa_reg_value);
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const InstructionList &inst_list = disasm_sp->GetInstructionList();
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const size_t num_instructions = inst_list.GetSize();
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if (num_instructions > 0) {
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Instruction *inst = inst_list.GetInstructionAtIndex(0).get();
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const lldb::addr_t base_addr = inst->GetAddress().GetFileAddress();
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// Map for storing the unwind state at a given offset. When we see a forward
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// branch we add a new entry to this map with the actual unwind plan row and
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// register context for the target address of the branch as the current data
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// have to be valid for the target address of the branch too if we are in
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// the same function.
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std::map<lldb::addr_t, UnwindState> saved_unwind_states;
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// Make a copy of the current instruction Row and save it in m_state so
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// we can add updates as we process the instructions.
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m_state.row = *unwind_plan.GetLastRow();
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// Add the initial state to the save list with offset 0.
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auto condition_block_start_state =
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saved_unwind_states.emplace(0, m_state).first;
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// The architecture dependent condition code of the last processed
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// instruction.
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EmulateInstruction::InstructionCondition last_condition =
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EmulateInstruction::UnconditionalCondition;
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for (size_t idx = 0; idx < num_instructions; ++idx) {
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m_curr_row_modified = false;
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m_forward_branch_offset = 0;
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inst = inst_list.GetInstructionAtIndex(idx).get();
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if (!inst)
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continue;
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lldb::addr_t current_offset =
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inst->GetAddress().GetFileAddress() - base_addr;
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auto it = saved_unwind_states.upper_bound(current_offset);
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assert(it != saved_unwind_states.begin() &&
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"Unwind row for the function entry missing");
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--it; // Move it to the row corresponding to the current offset
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// If the offset of m_curr_row don't match with the offset we see in
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// saved_unwind_states then we have to update current unwind state to
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// the saved values. It is happening after we processed an epilogue and a
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// return to caller instruction.
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if (it->second.row.GetOffset() != m_state.row.GetOffset())
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m_state = it->second;
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m_inst_emulator_up->SetInstruction(inst->GetOpcode(), inst->GetAddress(),
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nullptr);
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if (last_condition != m_inst_emulator_up->GetInstructionCondition()) {
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// If the last instruction was conditional with a different condition
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// than the current condition then restore the state.
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if (last_condition != EmulateInstruction::UnconditionalCondition) {
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m_state = condition_block_start_state->second;
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m_state.row.SetOffset(current_offset);
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// The last instruction might already created a row for this offset
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// and we want to overwrite it.
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saved_unwind_states.insert_or_assign(current_offset, m_state);
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}
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// We are starting a new conditional block at the actual offset
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condition_block_start_state = it;
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}
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if (log && log->GetVerbose()) {
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StreamString strm;
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lldb_private::FormatEntity::Entry format;
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FormatEntity::Parse("${frame.pc}: ", format);
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inst->Dump(&strm, inst_list.GetMaxOpcocdeByteSize(), show_address,
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show_bytes, show_control_flow_kind, nullptr, nullptr,
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nullptr, &format, 0);
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log->PutString(strm.GetString());
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}
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last_condition = m_inst_emulator_up->GetInstructionCondition();
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m_inst_emulator_up->EvaluateInstruction(
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eEmulateInstructionOptionIgnoreConditions);
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// If the current instruction is a branch forward then save the current
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// CFI information for the offset where we are branching.
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if (m_forward_branch_offset != 0 &&
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range.ContainsFileAddress(inst->GetAddress().GetFileAddress() +
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m_forward_branch_offset)) {
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if (auto [it, inserted] = saved_unwind_states.emplace(
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current_offset + m_forward_branch_offset, m_state);
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inserted)
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it->second.row.SetOffset(current_offset + m_forward_branch_offset);
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}
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// Were there any changes to the CFI while evaluating this instruction?
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if (m_curr_row_modified) {
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// Save the modified row if we don't already have a CFI row in the
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// current address
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if (saved_unwind_states.count(current_offset +
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inst->GetOpcode().GetByteSize()) == 0) {
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m_state.row.SetOffset(current_offset +
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inst->GetOpcode().GetByteSize());
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saved_unwind_states.emplace(
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current_offset + inst->GetOpcode().GetByteSize(), m_state);
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}
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}
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}
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for (auto &[_, state] : saved_unwind_states) {
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unwind_plan.InsertRow(std::move(state.row),
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/*replace_existing=*/true);
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}
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}
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if (log && log->GetVerbose()) {
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StreamString strm;
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lldb::addr_t base_addr = range.GetBaseAddress().GetFileAddress();
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strm.Printf("Resulting unwind rows for [0x%" PRIx64 " - 0x%" PRIx64 "):",
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base_addr, base_addr + range.GetByteSize());
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unwind_plan.Dump(strm, nullptr, base_addr);
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log->PutString(strm.GetString());
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}
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return unwind_plan.GetRowCount() > 0;
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}
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bool UnwindAssemblyInstEmulation::AugmentUnwindPlanFromCallSite(
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AddressRange &func, Thread &thread, UnwindPlan &unwind_plan) {
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return false;
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}
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bool UnwindAssemblyInstEmulation::GetFastUnwindPlan(AddressRange &func,
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Thread &thread,
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UnwindPlan &unwind_plan) {
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return false;
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}
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bool UnwindAssemblyInstEmulation::FirstNonPrologueInsn(
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AddressRange &func, const ExecutionContext &exe_ctx,
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Address &first_non_prologue_insn) {
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return false;
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}
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UnwindAssembly *
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UnwindAssemblyInstEmulation::CreateInstance(const ArchSpec &arch) {
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std::unique_ptr<EmulateInstruction> inst_emulator_up(
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EmulateInstruction::FindPlugin(arch, eInstructionTypePrologueEpilogue,
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nullptr));
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// Make sure that all prologue instructions are handled
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if (inst_emulator_up)
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return new UnwindAssemblyInstEmulation(arch, inst_emulator_up.release());
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return nullptr;
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}
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void UnwindAssemblyInstEmulation::Initialize() {
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PluginManager::RegisterPlugin(GetPluginNameStatic(),
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GetPluginDescriptionStatic(), CreateInstance);
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}
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void UnwindAssemblyInstEmulation::Terminate() {
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PluginManager::UnregisterPlugin(CreateInstance);
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}
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llvm::StringRef UnwindAssemblyInstEmulation::GetPluginDescriptionStatic() {
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return "Instruction emulation based unwind information.";
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}
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uint64_t UnwindAssemblyInstEmulation::MakeRegisterKindValuePair(
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const RegisterInfo ®_info) {
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lldb::RegisterKind reg_kind;
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uint32_t reg_num;
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if (EmulateInstruction::GetBestRegisterKindAndNumber(®_info, reg_kind,
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reg_num))
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return (uint64_t)reg_kind << 24 | reg_num;
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return 0ull;
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}
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void UnwindAssemblyInstEmulation::SetRegisterValue(
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const RegisterInfo ®_info, const RegisterValue ®_value) {
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m_state.register_values[MakeRegisterKindValuePair(reg_info)] = reg_value;
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}
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bool UnwindAssemblyInstEmulation::GetRegisterValue(const RegisterInfo ®_info,
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RegisterValue ®_value) {
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const uint64_t reg_id = MakeRegisterKindValuePair(reg_info);
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RegisterValueMap::const_iterator pos = m_state.register_values.find(reg_id);
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if (pos != m_state.register_values.end()) {
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reg_value = pos->second;
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return true; // We had a real value that comes from an opcode that wrote
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// to it...
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}
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// We are making up a value that is recognizable...
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reg_value.SetUInt(reg_id, reg_info.byte_size);
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return false;
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}
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size_t UnwindAssemblyInstEmulation::ReadMemory(
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EmulateInstruction *instruction, void *baton,
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const EmulateInstruction::Context &context, lldb::addr_t addr, void *dst,
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size_t dst_len) {
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Log *log = GetLog(LLDBLog::Unwind);
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if (log && log->GetVerbose()) {
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StreamString strm;
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strm.Printf(
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"UnwindAssemblyInstEmulation::ReadMemory (addr = 0x%16.16" PRIx64
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", dst = %p, dst_len = %" PRIu64 ", context = ",
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addr, dst, (uint64_t)dst_len);
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context.Dump(strm, instruction);
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log->PutString(strm.GetString());
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}
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memset(dst, 0, dst_len);
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return dst_len;
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}
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size_t UnwindAssemblyInstEmulation::WriteMemory(
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EmulateInstruction *instruction, void *baton,
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const EmulateInstruction::Context &context, lldb::addr_t addr,
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const void *dst, size_t dst_len) {
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if (baton && dst && dst_len)
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return ((UnwindAssemblyInstEmulation *)baton)
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->WriteMemory(instruction, context, addr, dst, dst_len);
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return 0;
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}
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size_t UnwindAssemblyInstEmulation::WriteMemory(
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EmulateInstruction *instruction, const EmulateInstruction::Context &context,
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lldb::addr_t addr, const void *dst, size_t dst_len) {
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DataExtractor data(dst, dst_len,
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instruction->GetArchitecture().GetByteOrder(),
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instruction->GetArchitecture().GetAddressByteSize());
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Log *log = GetLog(LLDBLog::Unwind);
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if (log && log->GetVerbose()) {
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StreamString strm;
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strm.PutCString("UnwindAssemblyInstEmulation::WriteMemory (");
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DumpDataExtractor(data, &strm, 0, eFormatBytes, 1, dst_len, UINT32_MAX,
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addr, 0, 0);
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strm.PutCString(", context = ");
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context.Dump(strm, instruction);
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log->PutString(strm.GetString());
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}
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switch (context.type) {
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default:
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case EmulateInstruction::eContextInvalid:
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case EmulateInstruction::eContextReadOpcode:
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case EmulateInstruction::eContextImmediate:
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case EmulateInstruction::eContextAdjustBaseRegister:
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case EmulateInstruction::eContextRegisterPlusOffset:
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case EmulateInstruction::eContextAdjustPC:
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case EmulateInstruction::eContextRegisterStore:
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case EmulateInstruction::eContextRegisterLoad:
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case EmulateInstruction::eContextRelativeBranchImmediate:
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case EmulateInstruction::eContextAbsoluteBranchRegister:
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case EmulateInstruction::eContextSupervisorCall:
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case EmulateInstruction::eContextTableBranchReadMemory:
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case EmulateInstruction::eContextWriteRegisterRandomBits:
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case EmulateInstruction::eContextWriteMemoryRandomBits:
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case EmulateInstruction::eContextArithmetic:
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case EmulateInstruction::eContextAdvancePC:
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case EmulateInstruction::eContextReturnFromException:
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case EmulateInstruction::eContextPopRegisterOffStack:
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case EmulateInstruction::eContextAdjustStackPointer:
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break;
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case EmulateInstruction::eContextPushRegisterOnStack: {
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uint32_t reg_num = LLDB_INVALID_REGNUM;
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uint32_t generic_regnum = LLDB_INVALID_REGNUM;
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assert(context.GetInfoType() ==
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EmulateInstruction::eInfoTypeRegisterToRegisterPlusOffset &&
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"unhandled case, add code to handle this!");
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const uint32_t unwind_reg_kind = m_unwind_plan_ptr->GetRegisterKind();
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reg_num = context.info.RegisterToRegisterPlusOffset.data_reg
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.kinds[unwind_reg_kind];
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generic_regnum = context.info.RegisterToRegisterPlusOffset.data_reg
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.kinds[eRegisterKindGeneric];
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if (reg_num != LLDB_INVALID_REGNUM &&
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generic_regnum != LLDB_REGNUM_GENERIC_SP) {
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if (m_pushed_regs.try_emplace(reg_num, addr).second) {
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const int32_t offset = addr - m_initial_sp;
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m_state.row.SetRegisterLocationToAtCFAPlusOffset(reg_num, offset,
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/*can_replace=*/true);
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m_curr_row_modified = true;
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}
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}
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} break;
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}
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return dst_len;
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}
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bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction,
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void *baton,
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const RegisterInfo *reg_info,
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RegisterValue ®_value) {
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if (baton && reg_info)
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return ((UnwindAssemblyInstEmulation *)baton)
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->ReadRegister(instruction, reg_info, reg_value);
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return false;
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}
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bool UnwindAssemblyInstEmulation::ReadRegister(EmulateInstruction *instruction,
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const RegisterInfo *reg_info,
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RegisterValue ®_value) {
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bool synthetic = GetRegisterValue(*reg_info, reg_value);
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Log *log = GetLog(LLDBLog::Unwind);
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if (log && log->GetVerbose()) {
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StreamString strm;
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strm.Printf("UnwindAssemblyInstEmulation::ReadRegister (name = \"%s\") => "
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"synthetic_value = %i, value = ",
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reg_info->name, synthetic);
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DumpRegisterValue(reg_value, strm, *reg_info, false, false, eFormatDefault);
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log->PutString(strm.GetString());
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}
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return true;
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}
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bool UnwindAssemblyInstEmulation::WriteRegister(
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EmulateInstruction *instruction, void *baton,
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const EmulateInstruction::Context &context, const RegisterInfo *reg_info,
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const RegisterValue ®_value) {
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if (baton && reg_info)
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return ((UnwindAssemblyInstEmulation *)baton)
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->WriteRegister(instruction, context, reg_info, reg_value);
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return false;
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}
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bool UnwindAssemblyInstEmulation::WriteRegister(
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EmulateInstruction *instruction, const EmulateInstruction::Context &context,
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const RegisterInfo *reg_info, const RegisterValue ®_value) {
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Log *log = GetLog(LLDBLog::Unwind);
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if (log && log->GetVerbose()) {
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StreamString strm;
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strm.Printf(
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"UnwindAssemblyInstEmulation::WriteRegister (name = \"%s\", value = ",
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reg_info->name);
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DumpRegisterValue(reg_value, strm, *reg_info, false, false, eFormatDefault);
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strm.PutCString(", context = ");
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context.Dump(strm, instruction);
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log->PutString(strm.GetString());
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}
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SetRegisterValue(*reg_info, reg_value);
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switch (context.type) {
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case EmulateInstruction::eContextInvalid:
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case EmulateInstruction::eContextReadOpcode:
|
|
case EmulateInstruction::eContextImmediate:
|
|
case EmulateInstruction::eContextAdjustBaseRegister:
|
|
case EmulateInstruction::eContextRegisterPlusOffset:
|
|
case EmulateInstruction::eContextAdjustPC:
|
|
case EmulateInstruction::eContextRegisterStore:
|
|
case EmulateInstruction::eContextSupervisorCall:
|
|
case EmulateInstruction::eContextTableBranchReadMemory:
|
|
case EmulateInstruction::eContextWriteRegisterRandomBits:
|
|
case EmulateInstruction::eContextWriteMemoryRandomBits:
|
|
case EmulateInstruction::eContextAdvancePC:
|
|
case EmulateInstruction::eContextReturnFromException:
|
|
case EmulateInstruction::eContextPushRegisterOnStack:
|
|
case EmulateInstruction::eContextRegisterLoad:
|
|
// {
|
|
// const uint32_t reg_num =
|
|
// reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
|
|
// if (reg_num != LLDB_INVALID_REGNUM)
|
|
// {
|
|
// const bool can_replace_only_if_unspecified = true;
|
|
//
|
|
// m_curr_row.SetRegisterLocationToUndefined (reg_num,
|
|
// can_replace_only_if_unspecified,
|
|
// can_replace_only_if_unspecified);
|
|
// m_curr_row_modified = true;
|
|
// }
|
|
// }
|
|
break;
|
|
|
|
case EmulateInstruction::eContextArithmetic: {
|
|
// If we adjusted the current frame pointer by a constant then adjust the
|
|
// CFA offset
|
|
// with the same amount.
|
|
lldb::RegisterKind kind = m_unwind_plan_ptr->GetRegisterKind();
|
|
if (m_state.fp_is_cfa &&
|
|
reg_info->kinds[kind] == m_state.cfa_reg_info.kinds[kind] &&
|
|
context.GetInfoType() ==
|
|
EmulateInstruction::eInfoTypeRegisterPlusOffset &&
|
|
context.info.RegisterPlusOffset.reg.kinds[kind] ==
|
|
m_state.cfa_reg_info.kinds[kind]) {
|
|
const int64_t offset = context.info.RegisterPlusOffset.signed_offset;
|
|
m_state.row.GetCFAValue().IncOffset(-1 * offset);
|
|
m_curr_row_modified = true;
|
|
}
|
|
} break;
|
|
|
|
case EmulateInstruction::eContextAbsoluteBranchRegister:
|
|
case EmulateInstruction::eContextRelativeBranchImmediate: {
|
|
if (context.GetInfoType() == EmulateInstruction::eInfoTypeISAAndImmediate &&
|
|
context.info.ISAAndImmediate.unsigned_data32 > 0) {
|
|
m_forward_branch_offset =
|
|
context.info.ISAAndImmediateSigned.signed_data32;
|
|
} else if (context.GetInfoType() ==
|
|
EmulateInstruction::eInfoTypeISAAndImmediateSigned &&
|
|
context.info.ISAAndImmediateSigned.signed_data32 > 0) {
|
|
m_forward_branch_offset = context.info.ISAAndImmediate.unsigned_data32;
|
|
} else if (context.GetInfoType() ==
|
|
EmulateInstruction::eInfoTypeImmediate &&
|
|
context.info.unsigned_immediate > 0) {
|
|
m_forward_branch_offset = context.info.unsigned_immediate;
|
|
} else if (context.GetInfoType() ==
|
|
EmulateInstruction::eInfoTypeImmediateSigned &&
|
|
context.info.signed_immediate > 0) {
|
|
m_forward_branch_offset = context.info.signed_immediate;
|
|
}
|
|
} break;
|
|
|
|
case EmulateInstruction::eContextPopRegisterOffStack: {
|
|
const uint32_t reg_num =
|
|
reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
|
|
const uint32_t generic_regnum = reg_info->kinds[eRegisterKindGeneric];
|
|
if (reg_num != LLDB_INVALID_REGNUM &&
|
|
generic_regnum != LLDB_REGNUM_GENERIC_SP) {
|
|
switch (context.GetInfoType()) {
|
|
case EmulateInstruction::eInfoTypeAddress:
|
|
if (auto it = m_pushed_regs.find(reg_num);
|
|
it != m_pushed_regs.end() && context.info.address == it->second) {
|
|
m_state.row.SetRegisterLocationToSame(reg_num,
|
|
false /*must_replace*/);
|
|
m_curr_row_modified = true;
|
|
|
|
// FP has been restored to its original value, we are back
|
|
// to using SP to calculate the CFA.
|
|
if (m_state.fp_is_cfa) {
|
|
m_state.fp_is_cfa = false;
|
|
lldb::RegisterKind sp_reg_kind = eRegisterKindGeneric;
|
|
uint32_t sp_reg_num = LLDB_REGNUM_GENERIC_SP;
|
|
RegisterInfo sp_reg_info =
|
|
*m_inst_emulator_up->GetRegisterInfo(sp_reg_kind, sp_reg_num);
|
|
RegisterValue sp_reg_val;
|
|
if (GetRegisterValue(sp_reg_info, sp_reg_val)) {
|
|
m_state.cfa_reg_info = sp_reg_info;
|
|
const uint32_t cfa_reg_num =
|
|
sp_reg_info.kinds[m_unwind_plan_ptr->GetRegisterKind()];
|
|
assert(cfa_reg_num != LLDB_INVALID_REGNUM);
|
|
m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
|
|
cfa_reg_num, m_initial_sp - sp_reg_val.GetAsUInt64());
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
case EmulateInstruction::eInfoTypeISA:
|
|
assert(
|
|
(generic_regnum == LLDB_REGNUM_GENERIC_PC ||
|
|
generic_regnum == LLDB_REGNUM_GENERIC_FLAGS) &&
|
|
"eInfoTypeISA used for popping a register other the PC/FLAGS");
|
|
if (generic_regnum != LLDB_REGNUM_GENERIC_FLAGS) {
|
|
m_state.row.SetRegisterLocationToSame(reg_num,
|
|
false /*must_replace*/);
|
|
m_curr_row_modified = true;
|
|
}
|
|
break;
|
|
default:
|
|
assert(false && "unhandled case, add code to handle this!");
|
|
break;
|
|
}
|
|
}
|
|
} break;
|
|
|
|
case EmulateInstruction::eContextSetFramePointer:
|
|
if (!m_state.fp_is_cfa) {
|
|
m_state.fp_is_cfa = true;
|
|
m_state.cfa_reg_info = *reg_info;
|
|
const uint32_t cfa_reg_num =
|
|
reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
|
|
assert(cfa_reg_num != LLDB_INVALID_REGNUM);
|
|
m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
|
|
cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64());
|
|
m_curr_row_modified = true;
|
|
}
|
|
break;
|
|
|
|
case EmulateInstruction::eContextRestoreStackPointer:
|
|
if (m_state.fp_is_cfa) {
|
|
m_state.fp_is_cfa = false;
|
|
m_state.cfa_reg_info = *reg_info;
|
|
const uint32_t cfa_reg_num =
|
|
reg_info->kinds[m_unwind_plan_ptr->GetRegisterKind()];
|
|
assert(cfa_reg_num != LLDB_INVALID_REGNUM);
|
|
m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
|
|
cfa_reg_num, m_initial_sp - reg_value.GetAsUInt64());
|
|
m_curr_row_modified = true;
|
|
}
|
|
break;
|
|
|
|
case EmulateInstruction::eContextAdjustStackPointer:
|
|
// If we have created a frame using the frame pointer, don't follow
|
|
// subsequent adjustments to the stack pointer.
|
|
if (!m_state.fp_is_cfa) {
|
|
m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
|
|
m_state.row.GetCFAValue().GetRegisterNumber(),
|
|
m_initial_sp - reg_value.GetAsUInt64());
|
|
m_curr_row_modified = true;
|
|
}
|
|
break;
|
|
}
|
|
return true;
|
|
}
|