caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
5977dfba64099e224cba12f580b6867e7a3d149a
clang-p2996/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
Dmitry Preobrazhensky 5977dfba64 [AMDGPU][MC][NFC] Refactored custom operands handling 
The original design of custom operands support assumed that most GPUs
have the same or very similar operand names end encodings. This is
no longer the case. As a result the support code becomes over-complicated
and difficult to maintain.

This change implements a different design with the following benefits:

- support of aliases;
- support of operands with overlapped encodings;
- identification of defined but unsupported operands.

Differential Revision: https://reviews.llvm.org/D121696
2022-03-16 16:04:55 +03:00

386 lines
11 KiB
C++
Raw Blame History

//===-- AMDGPUAsmUtils.cpp - AsmParser/InstPrinter common -----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include "AMDGPUAsmUtils.h"
#include "AMDGPUBaseInfo.h"
#include "SIDefines.h"
namespace llvm {
namespace AMDGPU {
namespace SendMsg {
// This must be in sync with llvm::AMDGPU::SendMsg::Id enum members, see SIDefines.h.
const char *const IdSymbolic[ID_GAPS_LAST_] = {
nullptr,
"MSG_INTERRUPT",
"MSG_GS",
"MSG_GS_DONE",
"MSG_SAVEWAVE",
"MSG_STALL_WAVE_GEN",
"MSG_HALT_WAVES",
"MSG_ORDERED_PS_DONE",
"MSG_EARLY_PRIM_DEALLOC",
"MSG_GS_ALLOC_REQ",
"MSG_GET_DOORBELL",
"MSG_GET_DDID",
nullptr,
nullptr,
nullptr,
"MSG_SYSMSG"
};
// These two must be in sync with llvm::AMDGPU::SendMsg::Op enum members, see SIDefines.h.
const char *const OpSysSymbolic[OP_SYS_LAST_] = {
nullptr,
"SYSMSG_OP_ECC_ERR_INTERRUPT",
"SYSMSG_OP_REG_RD",
"SYSMSG_OP_HOST_TRAP_ACK",
"SYSMSG_OP_TTRACE_PC"
};
const char *const OpGsSymbolic[OP_GS_LAST_] = {
"GS_OP_NOP",
"GS_OP_CUT",
"GS_OP_EMIT",
"GS_OP_EMIT_CUT"
};
} // namespace SendMsg
namespace Hwreg {
// Disable lint checking for this block since it makes the table unreadable.
// NOLINTBEGIN
const CustomOperand<const MCSubtargetInfo &> Opr[] = {
{},
{{"HW_REG_MODE"}, ID_MODE},
{{"HW_REG_STATUS"}, ID_STATUS},
{{"HW_REG_TRAPSTS"}, ID_TRAPSTS},
{{"HW_REG_HW_ID"}, ID_HW_ID,
[](const MCSubtargetInfo &STI) {
return isSI(STI) || isCI(STI) ||
isVI(STI) || isGFX9(STI);
}},
{{"HW_REG_GPR_ALLOC"}, ID_GPR_ALLOC},
{{"HW_REG_LDS_ALLOC"}, ID_LDS_ALLOC},
{{"HW_REG_IB_STS"}, ID_IB_STS},
{},
{},
{},
{},
{},
{},
{},
{{"HW_REG_SH_MEM_BASES"}, ID_MEM_BASES, isGFX9Plus},
{{"HW_REG_TBA_LO"}, ID_TBA_LO, isGFX9_GFX10},
{{"HW_REG_TBA_HI"}, ID_TBA_HI, isGFX9_GFX10},
{{"HW_REG_TMA_LO"}, ID_TMA_LO, isGFX9_GFX10},
{{"HW_REG_TMA_HI"}, ID_TMA_HI, isGFX9_GFX10},
{{"HW_REG_FLAT_SCR_LO"}, ID_FLAT_SCR_LO, isGFX10Plus},
{{"HW_REG_FLAT_SCR_HI"}, ID_FLAT_SCR_HI, isGFX10Plus},
{{"HW_REG_XNACK_MASK"}, ID_XNACK_MASK,
[](const MCSubtargetInfo &STI) {
return isGFX10(STI) &&
!AMDGPU::isGFX10_BEncoding(STI);
}},
{{"HW_REG_HW_ID1"}, ID_HW_ID1, isGFX10Plus},
{{"HW_REG_HW_ID2"}, ID_HW_ID2, isGFX10Plus},
{{"HW_REG_POPS_PACKER"}, ID_POPS_PACKER, isGFX10},
{},
{},
{},
{{"HW_REG_SHADER_CYCLES"}, ID_SHADER_CYCLES, isGFX10_BEncoding},
// GFX940 specific registers
{{"HW_REG_XCC_ID"}, ID_XCC_ID, isGFX940},
{{"HW_REG_SQ_PERF_SNAPSHOT_DATA"}, ID_SQ_PERF_SNAPSHOT_DATA, isGFX940},
{{"HW_REG_SQ_PERF_SNAPSHOT_DATA1"}, ID_SQ_PERF_SNAPSHOT_DATA1, isGFX940},
{{"HW_REG_SQ_PERF_SNAPSHOT_PC_LO"}, ID_SQ_PERF_SNAPSHOT_PC_LO, isGFX940},
{{"HW_REG_SQ_PERF_SNAPSHOT_PC_HI"}, ID_SQ_PERF_SNAPSHOT_PC_HI, isGFX940},
// Aliases
{{"HW_REG_HW_ID"}, ID_HW_ID1, isGFX10},
};
// NOLINTEND
const int OPR_SIZE = static_cast<int>(
sizeof(Opr) / sizeof(CustomOperand<const MCSubtargetInfo &>));
} // namespace Hwreg
namespace MTBUFFormat {
StringLiteral const DfmtSymbolic[] = {
"BUF_DATA_FORMAT_INVALID",
"BUF_DATA_FORMAT_8",
"BUF_DATA_FORMAT_16",
"BUF_DATA_FORMAT_8_8",
"BUF_DATA_FORMAT_32",
"BUF_DATA_FORMAT_16_16",
"BUF_DATA_FORMAT_10_11_11",
"BUF_DATA_FORMAT_11_11_10",
"BUF_DATA_FORMAT_10_10_10_2",
"BUF_DATA_FORMAT_2_10_10_10",
"BUF_DATA_FORMAT_8_8_8_8",
"BUF_DATA_FORMAT_32_32",
"BUF_DATA_FORMAT_16_16_16_16",
"BUF_DATA_FORMAT_32_32_32",
"BUF_DATA_FORMAT_32_32_32_32",
"BUF_DATA_FORMAT_RESERVED_15"
};
StringLiteral const NfmtSymbolicGFX10[] = {
"BUF_NUM_FORMAT_UNORM",
"BUF_NUM_FORMAT_SNORM",
"BUF_NUM_FORMAT_USCALED",
"BUF_NUM_FORMAT_SSCALED",
"BUF_NUM_FORMAT_UINT",
"BUF_NUM_FORMAT_SINT",
"",
"BUF_NUM_FORMAT_FLOAT"
};
StringLiteral const NfmtSymbolicSICI[] = {
"BUF_NUM_FORMAT_UNORM",
"BUF_NUM_FORMAT_SNORM",
"BUF_NUM_FORMAT_USCALED",
"BUF_NUM_FORMAT_SSCALED",
"BUF_NUM_FORMAT_UINT",
"BUF_NUM_FORMAT_SINT",
"BUF_NUM_FORMAT_SNORM_OGL",
"BUF_NUM_FORMAT_FLOAT"
};
StringLiteral const NfmtSymbolicVI[] = { // VI and GFX9
"BUF_NUM_FORMAT_UNORM",
"BUF_NUM_FORMAT_SNORM",
"BUF_NUM_FORMAT_USCALED",
"BUF_NUM_FORMAT_SSCALED",
"BUF_NUM_FORMAT_UINT",
"BUF_NUM_FORMAT_SINT",
"BUF_NUM_FORMAT_RESERVED_6",
"BUF_NUM_FORMAT_FLOAT"
};
StringLiteral const UfmtSymbolic[] = {
"BUF_FMT_INVALID",
"BUF_FMT_8_UNORM",
"BUF_FMT_8_SNORM",
"BUF_FMT_8_USCALED",
"BUF_FMT_8_SSCALED",
"BUF_FMT_8_UINT",
"BUF_FMT_8_SINT",
"BUF_FMT_16_UNORM",
"BUF_FMT_16_SNORM",
"BUF_FMT_16_USCALED",
"BUF_FMT_16_SSCALED",
"BUF_FMT_16_UINT",
"BUF_FMT_16_SINT",
"BUF_FMT_16_FLOAT",
"BUF_FMT_8_8_UNORM",
"BUF_FMT_8_8_SNORM",
"BUF_FMT_8_8_USCALED",
"BUF_FMT_8_8_SSCALED",
"BUF_FMT_8_8_UINT",
"BUF_FMT_8_8_SINT",
"BUF_FMT_32_UINT",
"BUF_FMT_32_SINT",
"BUF_FMT_32_FLOAT",
"BUF_FMT_16_16_UNORM",
"BUF_FMT_16_16_SNORM",
"BUF_FMT_16_16_USCALED",
"BUF_FMT_16_16_SSCALED",
"BUF_FMT_16_16_UINT",
"BUF_FMT_16_16_SINT",
"BUF_FMT_16_16_FLOAT",
"BUF_FMT_10_11_11_UNORM",
"BUF_FMT_10_11_11_SNORM",
"BUF_FMT_10_11_11_USCALED",
"BUF_FMT_10_11_11_SSCALED",
"BUF_FMT_10_11_11_UINT",
"BUF_FMT_10_11_11_SINT",
"BUF_FMT_10_11_11_FLOAT",
"BUF_FMT_11_11_10_UNORM",
"BUF_FMT_11_11_10_SNORM",
"BUF_FMT_11_11_10_USCALED",
"BUF_FMT_11_11_10_SSCALED",
"BUF_FMT_11_11_10_UINT",
"BUF_FMT_11_11_10_SINT",
"BUF_FMT_11_11_10_FLOAT",
"BUF_FMT_10_10_10_2_UNORM",
"BUF_FMT_10_10_10_2_SNORM",
"BUF_FMT_10_10_10_2_USCALED",
"BUF_FMT_10_10_10_2_SSCALED",
"BUF_FMT_10_10_10_2_UINT",
"BUF_FMT_10_10_10_2_SINT",
"BUF_FMT_2_10_10_10_UNORM",
"BUF_FMT_2_10_10_10_SNORM",
"BUF_FMT_2_10_10_10_USCALED",
"BUF_FMT_2_10_10_10_SSCALED",
"BUF_FMT_2_10_10_10_UINT",
"BUF_FMT_2_10_10_10_SINT",
"BUF_FMT_8_8_8_8_UNORM",
"BUF_FMT_8_8_8_8_SNORM",
"BUF_FMT_8_8_8_8_USCALED",
"BUF_FMT_8_8_8_8_SSCALED",
"BUF_FMT_8_8_8_8_UINT",
"BUF_FMT_8_8_8_8_SINT",
"BUF_FMT_32_32_UINT",
"BUF_FMT_32_32_SINT",
"BUF_FMT_32_32_FLOAT",
"BUF_FMT_16_16_16_16_UNORM",
"BUF_FMT_16_16_16_16_SNORM",
"BUF_FMT_16_16_16_16_USCALED",
"BUF_FMT_16_16_16_16_SSCALED",
"BUF_FMT_16_16_16_16_UINT",
"BUF_FMT_16_16_16_16_SINT",
"BUF_FMT_16_16_16_16_FLOAT",
"BUF_FMT_32_32_32_UINT",
"BUF_FMT_32_32_32_SINT",
"BUF_FMT_32_32_32_FLOAT",
"BUF_FMT_32_32_32_32_UINT",
"BUF_FMT_32_32_32_32_SINT",
"BUF_FMT_32_32_32_32_FLOAT"
};
unsigned const DfmtNfmt2UFmt[] = {
DFMT_INVALID | (NFMT_UNORM << NFMT_SHIFT),
DFMT_8 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_8 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_8 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_8 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_8 | (NFMT_UINT << NFMT_SHIFT),
DFMT_8 | (NFMT_SINT << NFMT_SHIFT),
DFMT_16 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_16 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_16 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_16 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_16 | (NFMT_UINT << NFMT_SHIFT),
DFMT_16 | (NFMT_SINT << NFMT_SHIFT),
DFMT_16 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_8_8 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_8_8 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_8_8 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_8_8 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_8_8 | (NFMT_UINT << NFMT_SHIFT),
DFMT_8_8 | (NFMT_SINT << NFMT_SHIFT),
DFMT_32 | (NFMT_UINT << NFMT_SHIFT),
DFMT_32 | (NFMT_SINT << NFMT_SHIFT),
DFMT_32 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_16_16 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_16_16 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_16_16 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_16_16 | (NFMT_UINT << NFMT_SHIFT),
DFMT_16_16 | (NFMT_SINT << NFMT_SHIFT),
DFMT_16_16 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_UINT << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_SINT << NFMT_SHIFT),
DFMT_10_11_11 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_UINT << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_SINT << NFMT_SHIFT),
DFMT_11_11_10 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_10_10_10_2 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_10_10_10_2 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_10_10_10_2 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_10_10_10_2 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_10_10_10_2 | (NFMT_UINT << NFMT_SHIFT),
DFMT_10_10_10_2 | (NFMT_SINT << NFMT_SHIFT),
DFMT_2_10_10_10 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_2_10_10_10 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_2_10_10_10 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_2_10_10_10 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_2_10_10_10 | (NFMT_UINT << NFMT_SHIFT),
DFMT_2_10_10_10 | (NFMT_SINT << NFMT_SHIFT),
DFMT_8_8_8_8 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_8_8_8_8 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_8_8_8_8 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_8_8_8_8 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_8_8_8_8 | (NFMT_UINT << NFMT_SHIFT),
DFMT_8_8_8_8 | (NFMT_SINT << NFMT_SHIFT),
DFMT_32_32 | (NFMT_UINT << NFMT_SHIFT),
DFMT_32_32 | (NFMT_SINT << NFMT_SHIFT),
DFMT_32_32 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_UNORM << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_SNORM << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_USCALED << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_SSCALED << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_UINT << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_SINT << NFMT_SHIFT),
DFMT_16_16_16_16 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_32_32_32 | (NFMT_UINT << NFMT_SHIFT),
DFMT_32_32_32 | (NFMT_SINT << NFMT_SHIFT),
DFMT_32_32_32 | (NFMT_FLOAT << NFMT_SHIFT),
DFMT_32_32_32_32 | (NFMT_UINT << NFMT_SHIFT),
DFMT_32_32_32_32 | (NFMT_SINT << NFMT_SHIFT),
DFMT_32_32_32_32 | (NFMT_FLOAT << NFMT_SHIFT)
};
} // namespace MTBUFFormat
namespace Swizzle {
// This must be in sync with llvm::AMDGPU::Swizzle::Id enum members, see SIDefines.h.
const char* const IdSymbolic[] = {
"QUAD_PERM",
"BITMASK_PERM",
"SWAP",
"REVERSE",
"BROADCAST",
};
} // namespace Swizzle
namespace VGPRIndexMode {
// This must be in sync with llvm::AMDGPU::VGPRIndexMode::Id enum members, see SIDefines.h.
const char* const IdSymbolic[] = {
"SRC0",
"SRC1",
"SRC2",
"DST",
};
} // namespace VGPRIndexMode
} // namespace AMDGPU
} // namespace llvm
Reference in New Issue View Git Blame Copy Permalink