35845f06a4
r600 uses dummy pointer info for lowering load/store. Since dummy pointer info assumes address space 0, this causes isel failure when temporary load/store SDNodes are generated for amdgiz environment. Since the offest is not constant, FixedStack pseudo source value cannot be used to create the pointer info. This patch creates pointer info using llvm undef value. At least this provides correct address space so that isel can be done correctly. Differential Revision: https://reviews.llvm.org/D39698 llvm-svn: 317862
176 lines
4.1 KiB
LLVM
176 lines
4.1 KiB
LLVM
; RUN: llc -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mtriple=amdgcn---amdgiz -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; RUN: llc -march=r600 -mtriple=r600---amdgiz -mcpu=cayman < %s | FileCheck -check-prefix=CM -check-prefix=FUNC %s
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; FUNC-LABEL: {{^}}store_local_i1:
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; EG: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_i1(i1 addrspace(3)* %out) {
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entry:
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store i1 true, i1 addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i8:
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; EG: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_i8(i8 addrspace(3)* %out, i8 %in) {
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store i8 %in, i8 addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i16:
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; EG: LDS_SHORT_WRITE
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; CM: LDS_SHORT_WRITE
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; GCN: ds_write_b16
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define amdgpu_kernel void @store_local_i16(i16 addrspace(3)* %out, i16 %in) {
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store i16 %in, i16 addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v2i16:
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write_b32
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define amdgpu_kernel void @store_local_v2i16(<2 x i16> addrspace(3)* %out, <2 x i16> %in) {
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entry:
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store <2 x i16> %in, <2 x i16> addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i8:
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write_b32
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define amdgpu_kernel void @store_local_v4i8(<4 x i8> addrspace(3)* %out, <4 x i8> %in) {
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entry:
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store <4 x i8> %in, <4 x i8> addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i8_unaligned:
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; EG: LDS_BYTE_WRITE
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; EG: LDS_BYTE_WRITE
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; EG: LDS_BYTE_WRITE
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; EG: LDS_BYTE_WRITE
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; EG-NOT: LDS_WRITE
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; CM: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; CM: LDS_BYTE_WRITE
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; CM-NOT: LDS_WRITE
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; GCN: ds_write_b8
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; GCN: ds_write_b8
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; GCN: ds_write_b8
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_v4i8_unaligned(<4 x i8> addrspace(3)* %out, <4 x i8> %in) {
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entry:
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store <4 x i8> %in, <4 x i8> addrspace(3)* %out, align 1
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i8_halfaligned:
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; EG: LDS_SHORT_WRITE
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; EG: LDS_SHORT_WRITE
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; EG-NOT: LDS_WRITE
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; CM: LDS_SHORT_WRITE
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; CM: LDS_SHORT_WRITE
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; CM-NOT: LDS_WRITE
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; GCN: ds_write_b16
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; GCN: ds_write_b16
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define amdgpu_kernel void @store_local_v4i8_halfaligned(<4 x i8> addrspace(3)* %out, <4 x i8> %in) {
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entry:
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store <4 x i8> %in, <4 x i8> addrspace(3)* %out, align 2
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v2i32:
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG-NOT: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM-NOT: LDS_WRITE
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; GCN: ds_write_b64
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define amdgpu_kernel void @store_local_v2i32(<2 x i32> addrspace(3)* %out, <2 x i32> %in) {
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entry:
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store <2 x i32> %in, <2 x i32> addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i32:
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write2_b64
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define amdgpu_kernel void @store_local_v4i32(<4 x i32> addrspace(3)* %out, <4 x i32> %in) {
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entry:
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store <4 x i32> %in, <4 x i32> addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_v4i32_align4:
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; EG: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; CM: LDS_WRITE
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; GCN: ds_write2_b32
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; GCN: ds_write2_b32
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define amdgpu_kernel void @store_local_v4i32_align4(<4 x i32> addrspace(3)* %out, <4 x i32> %in) {
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entry:
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store <4 x i32> %in, <4 x i32> addrspace(3)* %out, align 4
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i64_i8:
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; EG: LDS_BYTE_WRITE
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; GCN: ds_write_b8
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define amdgpu_kernel void @store_local_i64_i8(i8 addrspace(3)* %out, i64 %in) {
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entry:
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%0 = trunc i64 %in to i8
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store i8 %0, i8 addrspace(3)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}store_local_i64_i16:
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; EG: LDS_SHORT_WRITE
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; GCN: ds_write_b16
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define amdgpu_kernel void @store_local_i64_i16(i16 addrspace(3)* %out, i64 %in) {
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entry:
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%0 = trunc i64 %in to i16
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store i16 %0, i16 addrspace(3)* %out
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ret void
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}
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