Juneyoung Lee f193bcc701 Revert D105169 due to the two-stage failure in ASAN ...

This reverts the following commits:
37ca7a795b
9aa6c72b92
705387c507
8ca4b3ef19
80dba72a66

2021-10-18 23:52:46 +09:00

..

rvb-intrinsics

[RISCV] [1/2] Add IR intrinsic for Zbe extension

2021-04-25 19:14:34 -07:00

rvv-intrinsics

[RISCV] After reverting _mt builtins, add ta argument for LLVM IR.

2021-10-13 19:41:49 +08:00

rvv-intrinsics-overloaded

[RISCV] After reverting _mt builtins, add ta argument for LLVM IR.

2021-10-13 19:41:49 +08:00

riscv32-ilp32-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv32-ilp32-ilp32f-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv32-ilp32-ilp32f-ilp32d-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv32-ilp32d-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv32-ilp32f-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv32-ilp32f-ilp32d-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv64-lp64-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv64-lp64-lp64f-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv64-lp64-lp64f-lp64d-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv64-lp64d-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv64-lp64f-lp64d-abi.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv-atomics.c

…

riscv-attr-builtin-alias-err.c

[Clang] Add clang attribute clang_builtin_alias.

2021-04-25 08:49:19 +08:00

riscv-attr-builtin-alias.c

[Clang] Add clang attribute clang_builtin_alias.

2021-04-25 08:49:19 +08:00

riscv-inline-asm-rvv.c

[RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.

2021-08-01 05:58:17 +08:00

riscv-inline-asm.c

Revert D105169 due to the two-stage failure in ASAN

2021-10-18 23:52:46 +09:00

riscv-metadata.c

…

riscv-sdata-module-flag.c

…

riscv-v-debuginfo.c

[Clang][RISCV] Define RISC-V V builtin types

2021-02-18 10:17:31 +08:00

riscv-v-lifetime.cpp

[Clang][CodeGen] Set the size of llvm.lifetime to unknown for scalable types.

2021-06-07 23:30:13 +08:00

rvv_errors.c

[RISCV] Validate the SEW and LMUL operands to __builtin_rvv_vsetvli(max)

2021-05-10 12:11:13 -07:00