722b8e0e5a
Previously we assumed all callable functions did not need any implicitly passed inputs, and added attributes to functions to indicate when they were necessary. Requiring attributes for correctness is pretty ugly, and it makes supporting indirect and external calls more complicated. This inverts the direction of the attributes, so an undecorated function is assumed to need all implicit imputs. This enables AMDGPUAttributor by default to mark when functions are proven to not need a given input. This strips the equivalent functionality from the legacy AMDGPUAnnotateKernelFeatures pass. However, AMDGPUAnnotateKernelFeatures is not fully removed at this point although it should be in the future. It is still necessary for the two hacky amdgpu-calls and amdgpu-stack-objects attributes, which would be better served by a trivial analysis on the IR during selection. Additionally, AMDGPUAnnotateKernelFeatures still redundantly handles the uniform-work-group-size attribute to be removed in a future commit. At this point when not using -amdgpu-fixed-function-abi, we are still modifying the ABI based on these newly negated attributes. In the future, this option will be removed and the locations for implicit inputs will always be fixed. We will then use the new attributes to avoid passing the values when unnecessary.
142 lines
4.9 KiB
LLVM
142 lines
4.9 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-fix-function-bitcasts < %s | FileCheck -check-prefix=OPT %s
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; GCN-LABEL: {{^}}test_bitcast_return_type_noinline:
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; GCN: s_getpc_b64
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; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@lo+4
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; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_noinline@rel32@hi+12
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; GCN: s_swappc_b64
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; OPT-LABEL: @test_bitcast_return_type_noinline(
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; OPT: %val = call i32 @ret_i32_noinline()
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; OPT: bitcast i32 %val to float
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define amdgpu_kernel void @test_bitcast_return_type_noinline() #0 {
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%val = call float bitcast (i32()* @ret_i32_noinline to float()*)()
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%op = fadd float %val, 1.0
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store volatile float %op, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}test_bitcast_return_type_alwaysinline:
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; GCN-NOT: s_getpc_b64
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; GCN-NOT: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_alwaysinline@rel32@lo+4
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; GCN-NOT: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ret_i32_alwaysinline@rel32@hi+12
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; GCN-NOT: s_swappc_b64
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; OPT-LABEL: @test_bitcast_return_type_alwaysinline(
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; OPT: %val = call i32 @ret_i32_alwaysinline()
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; OPT: bitcast i32 %val to float
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define amdgpu_kernel void @test_bitcast_return_type_alwaysinline() #0 {
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%val = call float bitcast (i32()* @ret_i32_alwaysinline to float()*)()
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%op = fadd float %val, 1.0
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store volatile float %op, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}test_bitcast_argument_type:
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; GCN: s_getpc_b64
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; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
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; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
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; GCN: s_swappc_b64
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; OPT-LABEL: @test_bitcast_argument_type(
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; OPT: %1 = bitcast float 2.000000e+00 to i32
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; OPT: %val = call i32 @ident_i32(i32 %1)
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; OPT-NOT: bitcast i32 %val to float
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define amdgpu_kernel void @test_bitcast_argument_type() #0 {
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%val = call i32 bitcast (i32(i32)* @ident_i32 to i32(float)*)(float 2.0)
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%op = add i32 %val, 1
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store volatile i32 %op, i32 addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}test_bitcast_argument_and_return_types:
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; GCN: s_getpc_b64
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; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
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; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
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; GCN: s_swappc_b64
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; OPT-LABEL: @test_bitcast_argument_and_return_types(
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; OPT: %1 = bitcast float 2.000000e+00 to i32
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; OPT: %val = call i32 @ident_i32(i32 %1)
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; OPT: bitcast i32 %val to float
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define amdgpu_kernel void @test_bitcast_argument_and_return_types() #0 {
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%val = call float bitcast (i32(i32)* @ident_i32 to float(float)*)(float 2.0)
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%op = fadd float %val, 1.0
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store volatile float %op, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}use_workitem_id_x:
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; GCN: s_waitcnt
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; GCN-NEXT: v_and_b32_e32 v1, 0x3ff, v1
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; GCN-NEXT: v_add_i32_e32 v0, vcc, v1, v0
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; GCN-NEXT: s_setpc_b64
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define hidden i32 @use_workitem_id_x(i32 %arg0) #0 {
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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%op = add i32 %id, %arg0
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ret i32 %op
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}
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; GCN-LABEL: {{^}}test_bitcast_use_workitem_id_x:
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; GCN: v_mov_b32_e32 v1, v0
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; GCN: s_getpc_b64
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; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, use_workitem_id_x@rel32@lo+4
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; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, use_workitem_id_x@rel32@hi+12
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; GCN: v_mov_b32_e32 v0, 9
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; GCN: s_swappc_b64
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; GCN: v_add_f32_e32
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; OPT-LABEL: @use_workitem_id_x(
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; OPT: %val = call i32 @use_workitem_id_x(i32 9)
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; OPT: bitcast i32 %val to float
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define amdgpu_kernel void @test_bitcast_use_workitem_id_x() #0 {
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%val = call float bitcast (i32(i32)* @use_workitem_id_x to float(i32)*)(i32 9)
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%op = fadd float %val, 1.0
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store volatile float %op, float addrspace(1)* undef
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ret void
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}
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; GCN-LABEL: {{^}}test_invoke:
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; GCN: s_getpc_b64
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; GCN: s_add_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@lo+4
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; GCN: s_addc_u32 s{{[0-9]+}}, s{{[0-9]+}}, ident_i32@rel32@hi+12
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; GCN: s_swappc_b64
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; OPT-LABEL: @test_invoke(
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; OPT: %1 = bitcast float 2.000000e+00 to i32
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; OPT: %val = invoke i32 @ident_i32(i32 %1)
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; OPT-NEXT: to label %continue.split unwind label %broken
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; OPT-LABEL: continue.split:
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; OPT: bitcast i32 %val to float
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@_ZTIi = external global i8*
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declare i32 @__gxx_personality_v0(...)
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define amdgpu_kernel void @test_invoke() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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%val = invoke float bitcast (i32(i32)* @ident_i32 to float(float)*)(float 2.0)
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to label %continue unwind label %broken
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broken:
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landingpad { i8*, i32 } catch i8** @_ZTIi
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ret void
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continue:
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%op = fadd float %val, 1.0
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store volatile float %op, float addrspace(1)* undef
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ret void
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}
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; Callees appears last in source file to test that we still lower their
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; arguments before we lower any calls to them.
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define hidden i32 @ret_i32_noinline() #0 {
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ret i32 4
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}
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define hidden i32 @ret_i32_alwaysinline() #1 {
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ret i32 4
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}
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define hidden i32 @ident_i32(i32 %i) #0 {
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ret i32 %i
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #2
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attributes #0 = { nounwind noinline }
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attributes #1 = { alwaysinline nounwind }
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attributes #2 = { nounwind readnone speculatable }
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