f7a96dc664
Prior to this patch, both `pcaddu18i` and `jirl` were marked as scheduling boundaries to prevent instruction reordering that would disrupt their adjacency. However, in certain cases, epilogues were still being inserted between these two instructions, breaking the required proximity. This patch ensures that `pcaddu18i` and `jirl` remain adjacent even in the presence of epilogues, maintaining correct relocation behavior for tail calls on LoongArch.
123 lines
4.3 KiB
LLVM
123 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 -mattr=+d --code-model=small < %s | \
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; RUN: FileCheck --check-prefix=SMALL %s
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; RUN: llc --mtriple=loongarch64 -mattr=+d --code-model=medium < %s | \
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; RUN: FileCheck --check-prefix=MEDIUM %s
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; RUN: llc --mtriple=loongarch64 -mattr=+d --code-model=large < %s | \
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; RUN: FileCheck --check-prefix=LARGE %s
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declare void @llvm.memset.p0.i64(ptr, i8, i64, i1)
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declare i32 @callee(i32)
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define i32 @call_globaladdress(i32 %a) nounwind {
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; SMALL-LABEL: call_globaladdress:
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; SMALL: # %bb.0:
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; SMALL-NEXT: addi.d $sp, $sp, -16
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; SMALL-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; SMALL-NEXT: bl %plt(callee)
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; SMALL-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; SMALL-NEXT: addi.d $sp, $sp, 16
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; SMALL-NEXT: ret
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;
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; MEDIUM-LABEL: call_globaladdress:
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; MEDIUM: # %bb.0:
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; MEDIUM-NEXT: addi.d $sp, $sp, -16
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; MEDIUM-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; MEDIUM-NEXT: pcaddu18i $ra, %call36(callee)
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; MEDIUM-NEXT: jirl $ra, $ra, 0
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; MEDIUM-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; MEDIUM-NEXT: addi.d $sp, $sp, 16
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; MEDIUM-NEXT: ret
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;
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; LARGE-LABEL: call_globaladdress:
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; LARGE: # %bb.0:
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; LARGE-NEXT: addi.d $sp, $sp, -16
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; LARGE-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; LARGE-NEXT: pcalau12i $a1, %got_pc_hi20(callee)
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; LARGE-NEXT: addi.d $ra, $zero, %got_pc_lo12(callee)
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; LARGE-NEXT: lu32i.d $ra, %got64_pc_lo20(callee)
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; LARGE-NEXT: lu52i.d $ra, $ra, %got64_pc_hi12(callee)
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; LARGE-NEXT: ldx.d $ra, $ra, $a1
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; LARGE-NEXT: jirl $ra, $ra, 0
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; LARGE-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; LARGE-NEXT: addi.d $sp, $sp, 16
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; LARGE-NEXT: ret
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%1 = call i32 @callee(i32 %a)
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ret i32 %1
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}
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define void @call_external_sym(ptr %dst) {
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; SMALL-LABEL: call_external_sym:
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; SMALL: # %bb.0: # %entry
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; SMALL-NEXT: addi.d $sp, $sp, -16
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; SMALL-NEXT: .cfi_def_cfa_offset 16
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; SMALL-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; SMALL-NEXT: .cfi_offset 1, -8
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; SMALL-NEXT: ori $a2, $zero, 1000
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; SMALL-NEXT: move $a1, $zero
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; SMALL-NEXT: bl %plt(memset)
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; SMALL-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; SMALL-NEXT: addi.d $sp, $sp, 16
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; SMALL-NEXT: ret
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;
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; MEDIUM-LABEL: call_external_sym:
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; MEDIUM: # %bb.0: # %entry
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; MEDIUM-NEXT: addi.d $sp, $sp, -16
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; MEDIUM-NEXT: .cfi_def_cfa_offset 16
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; MEDIUM-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; MEDIUM-NEXT: .cfi_offset 1, -8
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; MEDIUM-NEXT: ori $a2, $zero, 1000
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; MEDIUM-NEXT: move $a1, $zero
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; MEDIUM-NEXT: pcaddu18i $ra, %call36(memset)
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; MEDIUM-NEXT: jirl $ra, $ra, 0
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; MEDIUM-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; MEDIUM-NEXT: addi.d $sp, $sp, 16
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; MEDIUM-NEXT: ret
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;
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; LARGE-LABEL: call_external_sym:
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; LARGE: # %bb.0: # %entry
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; LARGE-NEXT: addi.d $sp, $sp, -16
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; LARGE-NEXT: .cfi_def_cfa_offset 16
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; LARGE-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; LARGE-NEXT: .cfi_offset 1, -8
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; LARGE-NEXT: ori $a2, $zero, 1000
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; LARGE-NEXT: move $a1, $zero
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; LARGE-NEXT: pcalau12i $a3, %pc_hi20(memset)
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; LARGE-NEXT: addi.d $ra, $zero, %pc_lo12(memset)
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; LARGE-NEXT: lu32i.d $ra, %pc64_lo20(memset)
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; LARGE-NEXT: lu52i.d $ra, $ra, %pc64_hi12(memset)
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; LARGE-NEXT: add.d $ra, $ra, $a3
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; LARGE-NEXT: jirl $ra, $ra, 0
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; LARGE-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; LARGE-NEXT: addi.d $sp, $sp, 16
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; LARGE-NEXT: ret
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entry:
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call void @llvm.memset.p0.i64(ptr %dst, i8 0, i64 1000, i1 false)
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ret void
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}
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;; Tail call with different codemodel.
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declare i32 @callee_tail(i32 %i)
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define i32 @caller_tail(i32 %i) nounwind {
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; SMALL-LABEL: caller_tail:
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; SMALL: # %bb.0: # %entry
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; SMALL-NEXT: b %plt(callee_tail)
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;
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; MEDIUM-LABEL: caller_tail:
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; MEDIUM: # %bb.0: # %entry
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; MEDIUM-NEXT: pcaddu18i $t8, %call36(callee_tail)
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; MEDIUM-NEXT: jr $t8
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;
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; LARGE-LABEL: caller_tail:
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; LARGE: # %bb.0: # %entry
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; LARGE-NEXT: pcalau12i $a1, %got_pc_hi20(callee_tail)
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; LARGE-NEXT: addi.d $a2, $zero, %got_pc_lo12(callee_tail)
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; LARGE-NEXT: lu32i.d $a2, %got64_pc_lo20(callee_tail)
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; LARGE-NEXT: lu52i.d $a2, $a2, %got64_pc_hi12(callee_tail)
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; LARGE-NEXT: ldx.d $a1, $a2, $a1
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; LARGE-NEXT: jr $a1
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entry:
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%r = tail call i32 @callee_tail(i32 %i)
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ret i32 %r
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}
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