Sander de Smalen ae0ab24862 [TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392) ...

TableGen builds up a map of "SubRegIdx -> Subclass" where Subclass is
the largest class where all registers have SubRegIdx as a sub-register.
When SubRegIdx (vis-a-vis the sub-register) is artificial it should
still include it in the map. This map is used in various places,
including in the calculation of the Lanemask of a register class, which
otherwise calculates an incorrect lanemask.

2024-11-04 16:10:50 +00:00

..

Common

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FixedLenDecoderEmitter

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GlobalISelCombinerEmitter

Make a tablegen test match-table.td more robust.

2024-10-08 13:16:06 +01:00

64-bit-int.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

2003-08-03-PassCode.td

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2006-09-18-LargeInt.td

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2010-03-24-PrematureDefaults.td

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AcquireAtCycle.td

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address-space-patfrags.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

AliasAsmString.td

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AllowDuplicateRegisterNames.td

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ambiguous-composition.td

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AnonDefinitionOnDemand.td

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anonymous-location.td

[LIT] Rename substitution %basename_s to %{s:basename} (#111062)

2024-10-03 18:18:10 -07:00

arithmetic.td

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ArtificialSubregs.td

[TableGen] Fix calculation of Lanemask for RCs with artificial subregs. (#114392)

2024-11-04 16:10:50 +00:00

AsmPredicateCombining.td

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AsmPredicateCombiningRISCV.td

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AsmPredicateCondsEmission.td

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AsmVariant.td

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AsmWriterPCRelOp.td

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assert.td

[TableGen] Print assert message inline with assert failure (#111184)

2024-10-04 13:21:50 -07:00

bare-minimum-psets.td

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BigEncoder.td

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BitOffsetDecoder.td

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BitsInit.td

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BitsInitOverflow.td

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cast-list-initializer.td

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cast-multiclass.td

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cast-string.td

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cast-typeerror.td

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cast.td

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check-duplicate-tuple-regs.td

[TableGen] Check for duplicate register tuple definitions. (#95725)

2024-06-25 16:42:29 -05:00

ClassInstanceValue.td

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code.td

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CodeGenSchedule-duplicate-instrw.td

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compare.td

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CompressWriteLatencyEntry.td

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ConcatenatedSubregs.td

[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)

2024-03-27 12:19:28 -07:00

cond-bitlist.td

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cond-default.td

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cond-empty-list-arg.td

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cond-inheritance.td

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cond-let.td

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cond-list.td

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cond-subclass.td

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cond-type.td

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cond-usage.td

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condsbit.td

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ConstraintChecking1.td

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ConstraintChecking2.td

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ConstraintChecking3.td

[TableGen] Fix operand constraint checking problem. (#85859)

2024-03-20 13:32:38 -05:00

ConstraintChecking4.td

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ConstraintChecking5.td

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ConstraintChecking6.td

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ConstraintChecking7.td

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ConstraintChecking8.td

[TableGen] Fix operand constraint checking problem. (#85859)

2024-03-20 13:32:38 -05:00

ConstraintChecking.inc

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ContextlessPredicates.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

CStyleComment.td

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dag-functional.td

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dag-isel-complexpattern.td

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dag-isel-regclass-emit-enum.td

[MVT][TableGen] Extend Machine Value Type to uint16_t (#99657)

2024-08-01 01:19:14 +08:00

dag-isel-res-order.td

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dag-isel-subregs.td

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Dag.td

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DAGDefaultOps.td

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def-multiple-operands.td

[TableGen][InstrInfoEmitter] Count sub-operands on def operands

2024-04-16 20:34:20 -04:00

DefaultOpsGlobalISel.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

defmclass.td

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DefmInherit.td

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DefmInsideMultiClass.td

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defset-typeerror.td

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defset.td

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deftype.td

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defvar.td

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detailed-records.td

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directive1.td

[TableGen] Add explicit symbol visibility macros to code generated (#107873)

2024-09-19 12:42:46 -07:00

directive2.td

[TableGen] Add explicit symbol visibility macros to code generated (#107873)

2024-09-19 12:42:46 -07:00

directive3.td

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dump.td

[TableGen] Resolve References at top level (#104578)

2024-08-19 21:05:39 +05:30

duplicate-include.inc

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duplicate-include.td

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DuplicateFieldValues.td

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empty-psets.td

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empty.td

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eq-unset.td

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eq.td

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eqbit.td

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exists-error-non-string.td

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exists-error-record.td

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exists-error-uninitialized.td

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exists.td

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FastISelEmitter.td

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field-access-initializers.td

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FieldAccess.td

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filter.td

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find.td

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foldl.td

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foreach-eval.td

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foreach-leak.td

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foreach-multiclass.td

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foreach-range-parse-errors0.td

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foreach-range-parse-errors1.td

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foreach-range-parse-errors2.td

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foreach-range-parse-errors3.td

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foreach-range-parse-errors4.td

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foreach-range-parse-errors5.td

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foreach-variable-range.td

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foreach.td

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ForeachList.td

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ForeachLoop.td

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ForwardRef.td

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GeneralList.td

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generic-tables-instruction.td

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generic-tables-return-range.td

[TableGen] Add support for emitting new function definition to return a range of results for Primary Key (#96174)

2024-07-11 10:54:31 -07:00

generic-tables.td

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GenTags.td

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get-operand-type-no-expand.td

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get-operand-type.td

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getsetop.td

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gisel-physreg-input.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-atomic_store.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-frameindex.td

[TableGen][GISel] Handle frameindex/tframeindex (#90475)

2024-04-29 12:06:26 -04:00

GlobalISelEmitter-immAllZeroOne.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-immarg-literal-pattern.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-implicit-defs.td

[llvm][TableGen] Count implicit defs as well as explicit ones in the GlobalISel TableGen emitter (#112673)

2024-10-18 10:50:44 +01:00

GlobalISelEmitter-input-discard.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-multiple-output-discard.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-multiple-output.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-nested-subregs.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-notype-output-pattern.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-output-discard.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter-PR39045.td

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GlobalISelEmitter-SDNodeXForm-timm.td

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GlobalISelEmitter-setcc.td

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GlobalISelEmitter-zero-instr.td

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GlobalISelEmitter-zero-reg.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitter.td

[GlobalISel][AArch64] Add G_FPTOSI_SAT/G_FPTOUI_SAT (#96297)

2024-09-16 10:33:59 +01:00

GlobalISelEmitterCustomPredicate.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterFlags.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterHwModes.td

[GlobalISel] Refactor Combiner MatchData & Apply C++ Code Handling (#92239)

2024-05-16 13:39:00 +02:00

GlobalISelEmitterMatchTableOptimizer.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterMatchTableOptimizerSameOperand.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterOverloadedPtr.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterRegSequence.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterSkippedPatterns.td

[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)

2024-04-25 16:42:48 -04:00

GlobalISelEmitterSubreg.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

GlobalISelEmitterVariadic.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

HasNoUse.td

DAG: Replace bitwidth with type in suffix in atomic tablegen ops (#94845)

2024-06-13 11:52:22 +02:00

HwModeBitSet.td

[TableGen] Use bitwise operations to access HwMode ID. (#88377)

2024-05-04 20:08:26 -05:00

HwModeEncodeAPInt.td

[TableGen] Use bitwise operations to access HwMode ID. (#88377)

2024-05-04 20:08:26 -05:00

HwModeEncodeDecode2.td

[TableGen] Introduce a less aggressive suppression for HwMode Decoder… (#86060)

2024-04-01 17:19:46 +08:00

HwModeEncodeDecode3.td

[TableGen] Use bitwise operations to access HwMode ID. (#88377)

2024-05-04 20:08:26 -05:00

HwModeEncodeDecode.td

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HwModeSelect.td

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HwModeSubRegs.td

[Target][RISCV] Add HwMode support to subregister index size/offset. (#86368)

2024-03-27 12:19:28 -07:00

if-empty-list-arg.td

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if-type.td

…

if-unresolved-cast.td

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if.td

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ifbit.td

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ifstmt.td

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immarg-predicated.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

immarg.td

[TableGen][GlobalISel] Specialize more MatchTable Opcodes (#89736)

2024-04-24 09:19:18 +02:00

Include.inc

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Include.td

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inhibit-pset.td

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IntBitInit.td

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interleave.td

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intrinsic-attrs.td

[LLVM][TableGen] Decrease code size of Intrinsic::getAttributes (#110573)

2024-10-01 09:08:47 -07:00

intrinsic-duplicate-name.td

[LLVM][TableGen] Add error check for duplicate intrinsic names (#109226)

2024-09-19 05:21:00 -07:00

intrinsic-long-name.td

[TableGen] Refactor Intrinsics record (#106986)

2024-09-04 15:04:10 -07:00

intrinsic-overload-conflict.td

[LLVM][TableGen] Check overloaded intrinsic mangling suffix conflicts (#110324)

2024-10-15 08:15:57 -07:00

intrinsic-prefix-error.td

[TableGen] Add PrintError family overload that take a print function (#107333)

2024-09-07 05:13:54 -07:00

intrinsic-struct.td

[TableGen] Add check for number of intrinsic return values (#107326)

2024-09-05 14:52:30 -07:00

intrinsic-target-prefix-for-target-independent.td

[LLVM][TableGen] Check name conflicts between target dep and independent intrinsics (#109826)

2024-09-25 12:01:17 -07:00

intrinsic-varargs.td

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IntSpecialValues.td

…

invalid-macro-name-command-line.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

invalid-type-cast-patfrags.td

[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)

2024-10-01 11:17:00 +04:00

InvalidMCSchedClassDesc.td

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isa.td

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JSON-check.py

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JSON-locs.td

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JSON.td

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LazyChange.td

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LetInsideMultiClasses.td

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lisp.td

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list-element-bitref.td

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ListArgs.td

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ListArgsSimple.td

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listconcat.td

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ListConversion.td

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listflatten-error.td

[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)

2024-09-24 12:24:17 -07:00

listflatten.td

[NFC] Fix line endings for OptionStrCmp.h and .td test files (#109806)

2024-09-24 12:24:17 -07:00

ListManip.td

…

ListOfList.td

…

listpaste.td

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listremove.td

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ListSlices-fail.td

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ListSlices.td

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listsplat.td

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lit.local.cfg

[AIX] Use internal lit shell for TableGen instead of a global setting (#113627)

2024-10-25 13:06:02 -04:00

LoLoL.td

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MacroFusion.td

[TableGen] Fix MacroFusion.td

2024-04-01 18:32:55 +08:00

math.td

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MissingOperandField.td

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MixedCasedMnemonic.td

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MnemonicAlias.td

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MultiClass-def-fail.td

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MultiClass-defm-fail.td

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MultiClass-defm.td

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MultiClass.td

…

MultiClassDefName.td

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MultiClassInherit.td

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MultiPat.td

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multiple-type-casts-patfrags.td

[LLVM][TableGen] Support type casts of nodes with multiple results (#109728)

2024-10-01 11:17:00 +04:00

name-resolution-consistency.td

…

named-arguments.td

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nested_ifdef2.inc

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nested_ifdef_main.td

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nested_ifdef.inc

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nested-comment.td

…

NestedForeach.td

…

nul-char.td

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paste-reserved.td

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Paste.td

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pr8330.td

…

predicate-patfags.td

[TableGen] HasOneUse builtin predicate on PatFrags (#91578)

2024-05-20 06:18:49 -08:00

prep-diag1.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag2.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag3.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag4.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag5.td

…

prep-diag6.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag7.td

…

prep-diag8.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag9.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag10.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag11-include.inc

…

prep-diag11.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag12-include.inc

…

prep-diag12.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag13.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-diag14.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-ifndef-diag-1.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-ifndef-diag-2.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

prep-ifndef.td

…

prep-region-include.inc

…

prep-region-processing.td

…

ProcessorUniqueNames.td

[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)

2024-08-08 02:00:36 +03:00

pset-enum.td

…

pseudo-inst-expansion.td

…

range-lists.td

…

range-op-fail.td

…

range-op.td

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rc-weight-override.td

…

ReadAdvanceInvalidWrite.td

…

RegBankFromRegClass.td

[GISel][TableGen] Generate getRegBankFromRegClass (#99896)

2024-07-25 09:41:55 -04:00

RegisterBankEmitter.td

…

RegisterClass.td

…

RegisterEncoder.td

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RegisterInfoEmitter-BaseClassOrder.td

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RegisterInfoEmitter-regcost-list.td

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RegisterInfoEmitter-regcost-tuple.td

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RegisterInfoEmitter-regcost.td

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RegisterInfoEmitter-tsflags.td

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RelTest.td

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repr.td

…

riscv-target-def.td

[RISCV] Add groupid/bitmask for RISC-V extension (#94440)

2024-07-22 14:18:05 +08:00

SchedModelError.td

…

searchabletables-intrinsic.td

[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)

2024-09-07 15:11:34 -07:00

self-reference-recursion.td

…

self-reference-typeerror.td

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self-reference.td

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SetTheory.td

…

SiblingForeach.td

…

simplify-patfrag.td

[TableGen] ShouldIgnore Pattern bit to disable DAG pattern imports during GISel (#88382)

2024-04-25 16:42:48 -04:00

size.td

…

Slice.td

…

spurious-semi.td

…

strconcat.td

…

string_ops.td

…

String.td

…

subst2.td

…

subst.td

…

substr.td

…

SubtargetFeatureUniqueNames.td

[TableGen] Rework error reporting for duplicate Feature/Processor (#102257)

2024-08-08 02:00:36 +03:00

SuperSubclassSameName.td

…

TargetInstrInfo.td

…

TargetInstrSpec.td

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template-arg-dependency.td

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template-args.td

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TemplateArgRename.td

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Tree.td

…

TreeNames.td

…

true-false.td

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trydecode-emission2.td

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trydecode-emission3.td

…

trydecode-emission4.td

…

trydecode-emission.td

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TwoLevelName.td

…

UnsetBitInit.td

…

unsetop.td

…

unterminated-c-comment-include.inc

…

unterminated-c-comment.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

unterminated-code-block-include.inc

…

unterminated-code-block.td

[LLVM] Change error messages to start with lower case (#113748)

2024-10-29 12:26:33 -07:00

UnterminatedComment.td

…

usevalname.td

…

ValidIdentifiers.td

…

VarLenDecoder.td

…

VarLenEncoder.td

…

VarLenEncoderHwModes.td

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warn-unused-template-arg.td

…

x86-fold-tables.inc

[X86][AVX512] Use comx for compare (#113567)

2024-10-30 16:17:25 +08:00

x86-fold-tables.td

[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)

2024-10-21 09:58:59 -07:00