Chandler Carruth c1e8ebc259 [x86] Add an SSE4.1 mode to this test. ...

llvm-svn: 217072

2014-09-03 20:39:06 +00:00

..

AArch64

Reapply r216805 "[MachineCombiner][AArch64] Use the correct register class for MADD, SUB, and OR.""

2014-09-03 07:07:10 +00:00

ARM

Missing test from r216989

2014-09-02 22:46:18 +00:00

CPP

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Generic

Add a regression test to sanity check the PBQP allocator.

2014-09-03 18:04:10 +00:00

Hexagon

DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.

2014-08-06 00:21:25 +00:00

Inputs

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Mips

Replace -use-init-array with -use-ctors.

2014-09-02 13:54:53 +00:00

MSP430

Do not assume the value passed to memset is an i32.

2014-08-29 08:23:53 +00:00

NVPTX

[MachineSink] Use the real post dominator tree

2014-09-01 03:47:25 +00:00

PowerPC

Enable splitting indexing from loads with TargetConstants

2014-09-02 16:05:23 +00:00

R600

R600/SI: Add a pattern for i64 and in a branch

2014-09-03 15:22:41 +00:00

SPARC

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SystemZ

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Thumb

Check-label a bit more specific

2014-09-03 13:32:08 +00:00

Thumb2

ARM / x86_64 varargs: Don't save regparms in prologue without va_start

2014-08-22 21:59:26 +00:00

X86

[x86] Add an SSE4.1 mode to this test.

2014-09-03 20:39:06 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00