clang-p2996

GlobalISel

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

32-bit-local-address-space.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

add_i64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

add_i128.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

add-debug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

add.i16.ll

Allow target to decide when to cluster loads/stores in misched

2017-09-13 22:20:47 +00:00

add.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

add.v2i16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

addrspacecast-captured.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

addrspacecast-constantexpr.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

addrspacecast.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

adjust-writemask-invalid-copy.ll

AMDGPU: image_getlod and image_getresinfo do not read memory

2017-12-08 20:00:57 +00:00

alignbit-pat.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

alloca.ll

LLParser: add an argument for overriding data layout and do not check alloca addr space

2018-01-30 22:32:39 +00:00

always-uniform.ll

DivergencyAnalysis patch for review

2017-06-15 19:33:10 +00:00

amdgcn.bitcast.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

amdgcn.private-memory.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

amdgpu-alias-analysis.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

amdgpu-codegenprepare-fdiv.ll

[AMDGPU] Always use rcp + mul with fast math

2017-07-06 20:34:21 +00:00

amdgpu-codegenprepare-i16-to-i32.ll

AMDGPU: Change DivergenceAnalysis for function arguments

2017-04-19 17:42:34 +00:00

amdgpu-inline.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

amdgpu-shader-calling-convention.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

amdgpu.private-memory.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

amdgpu.work-item-intrinsics.deprecated.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

amdpal-cs.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal-es.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal-gs.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal-hs.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal-ls.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal-ps.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal-psenable.ll

[AMDGPU] For amdpal, widen interpolation mode workaround

2017-10-12 16:16:41 +00:00

amdpal-vs.ll

AMDGPU/NFC: Minor clean ups in PAL metadata

2017-10-11 22:41:09 +00:00

amdpal.ll

[AMDGPU] do not generate .AMDGPU.config for amdpal os type

2018-02-06 13:39:38 +00:00

and-gcn.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

and.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

annotate-kernel-features-hsa-call.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

annotate-kernel-features-hsa.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

annotate-kernel-features.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

anonymous-gv.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

any_extend_vector_inreg.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

anyext.ll

AMDGPU: Set v2i32 any_extend to expand

2017-10-05 17:38:30 +00:00

array-ptr-calc-i32.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

array-ptr-calc-i64.ll

AMDGPU: Implement computeKnownBitsForTargetNode for mbcnt

2017-11-13 22:55:05 +00:00

ashr.v2i16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

atomic_cmp_swap_local.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

atomic_load_add.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

atomic_load_sub.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

attr-amdgpu-flat-work-group-size.ll

AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency

2017-10-18 17:31:09 +00:00

attr-amdgpu-num-sgpr.ll

RegScavenging: Add scavengeRegisterBackwards()

2017-06-17 02:08:18 +00:00

attr-amdgpu-num-vgpr.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

attr-amdgpu-waves-per-eu.ll

AMDGPU: Fix amdgpu-flat-work-group-size/amdgpu-waves-per-eu check

2017-07-16 19:38:47 +00:00

attr-unparseable.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

barrier-elimination.ll

[AMDGPU] Eliminate barrier if workgroup size is not greater than wavefront size

2017-04-06 16:48:30 +00:00

basic-branch.ll

[AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests.

2017-06-02 14:19:25 +00:00

basic-call-return.ll

AMDGPU: Remove error on calls for amdgcn

2017-08-03 23:24:05 +00:00

basic-loop.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

bfe_uint.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

bfe-combine.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

bfe-patterns.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

bfi_int.ll

AMDGPU: Select BFI patterns with 64-bit ints

2018-02-07 00:21:34 +00:00

bfm.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

big_alu.ll

…

bitcast-vector-extract.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

bitreverse-inline-immediates.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

bitreverse.ll

DAG: Fix not truncating when promoting bswap/bitreverse

2018-01-31 23:54:16 +00:00

br_cc.f16.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

branch-condition-and.ll

[AMDGPU] Eliminate no effect instructions before s_endpgm

2017-08-16 04:43:49 +00:00

branch-relax-bundle.ll

AMDGPU: Fix not accounting for instruction size in bundles

2017-10-04 22:59:12 +00:00

branch-relax-spill.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

branch-relaxation.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

branch-uniformity.ll

…

break-smem-soft-clauses.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

break-vmem-soft-clauses.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

bswap.ll

DAG: Fix not truncating when promoting bswap/bitreverse

2018-01-31 23:54:16 +00:00

buffer-schedule.ll

[AMDGPU] stop buffer_store being moved illegally

2018-02-20 10:03:38 +00:00

bug-vopc-commute.ll

AMDGPU: Remove SITypeRewriter

2017-06-28 21:38:50 +00:00

build_vector.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

byval-frame-setup.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

call_fs.ll

…

call-argument-types.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

call-encoding.ll

AMDGPU: Remove error on calls for amdgcn

2017-08-03 23:24:05 +00:00

call-graph-register-usage.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

call-preserved-registers.ll

AMDGPU: Enable IPRA

2017-11-28 23:40:12 +00:00

call-return-types.ll

CodeGen: Fix TargetLowering::LowerCallTo for sret value type

2017-11-14 18:46:52 +00:00

callee-frame-setup.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

callee-special-input-sgprs.ll

[AMDGPU] Return true in enableMultipleCopyHints().

2018-02-17 10:00:28 +00:00

callee-special-input-vgprs.ll

[AMDGPU] Return true in enableMultipleCopyHints().

2018-02-17 10:00:28 +00:00

calling-conventions.ll

[AMDGPU] calling conventions for AMDPAL OS type

2017-09-29 09:51:22 +00:00

captured-frame-index.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

cayman-loop-bug.ll

…

cf_end.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

cf-loop-on-constant.ll

[AMDGPU] Fixed incorrect uniform branch condition

2018-01-09 21:34:43 +00:00

cf-stack-bug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

cgp-addressing-modes-flat.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

cgp-addressing-modes.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

cgp-bitfield-extract.ll

[AMDGPU] Add pattern for v_alignbit_b32 with immediate

2017-06-28 02:52:39 +00:00

clamp-modifier.ll

AMDGPU: Fold clamp modifier for packed instructions

2017-08-31 23:53:50 +00:00

clamp-omod-special-case.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

clamp.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

cluster-flat-loads-postra.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

cluster-flat-loads.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

cndmask-no-def-vcc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

coalescer_distribute.ll

AMDGPU: Remove old intrinsic uses

2017-05-17 21:38:21 +00:00

coalescer_remat.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

coalescer-subrange-crash.ll

…

coalescer-subreg-join.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

codegen-prepare-addrmode-sext.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

collapse-endcf.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

combine_vloads.ll

[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment

2017-11-10 02:03:28 +00:00

combine-and-sext-bool.ll

[AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0

2017-06-27 18:25:26 +00:00

combine-cond-add-sub.ll

[AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0

2017-06-27 18:25:26 +00:00

combine-ftrunc.ll

Eliminate ftrunc if source is know to be rounded

2017-10-02 16:57:07 +00:00

commute_modifiers.ll

[AMDGPU] Allow SDWA in instructions with immediates and SGPRs

2017-05-30 16:49:24 +00:00

commute-compares.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

commute-shifts.ll

…

complex-folding.ll

…

concat_vectors.ll

[DAGCombiner] Bail out if vector size is not a multiple

2018-01-24 09:53:47 +00:00

constant-address-space-32bit.ll

Reapply "AMDGPU: Add 32-bit constant address space"

2018-02-09 16:57:57 +00:00

constant-fold-imm-immreg.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

constant-fold-mi-operands.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

control-flow-fastregalloc.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

control-flow-optnone.ll

AMDGPU: Fix missing skipFunction calls

2017-10-10 20:48:36 +00:00

convergent-inlineasm.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

copy-illegal-type.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

copy-to-reg.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

ctlz_zero_undef.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

ctlz.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

ctpop64.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

ctpop.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

cttz_zero_undef.ll

[DAGCombiner][AMDGPU][X86] Turn cttz/ctlz into cttz_zero_undef/ctlz_zero_undef if we can prove the input is never zero

2018-02-06 23:54:37 +00:00

cube.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

cvt_f32_ubyte.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

cvt_flr_i32_f32.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

cvt_rpi_i32_f32.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

dagcomb-shuffle-vecextend-non2.ll

[DAGCombine] Fix for shuffle to vector extend for non power 2 vectors

2017-10-10 12:45:45 +00:00

dagcombine-reassociate-bug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

dagcombiner-bug-illegal-vec4-int-to-fp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

dead_copy.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

debug-value2.ll

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

debug-value.ll

Recommit CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value

2017-12-15 03:56:57 +00:00

debug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

debugger-emit-prologue.ll

Fix APInt bit size in processDbgDeclares

2017-11-16 02:54:49 +00:00

debugger-insert-nops.ll

Fix APInt bit size in processDbgDeclares

2017-11-16 02:54:49 +00:00

debugger-reserve-regs.ll

Fix APInt bit size in processDbgDeclares

2017-11-16 02:54:49 +00:00

default-fp-mode.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

detect-dead-lanes.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

disconnected-predset-break-bug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

drop-mem-operand-move-smrd.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

ds_read2_offset_order.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

ds_read2_superreg.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

ds_read2.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

ds_read2st64.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

ds_write2.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

ds_write2st64.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

ds-combine-large-stride.ll

[AMDGPU] SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64

2018-01-22 21:46:43 +00:00

ds-negative-offset-addressing-mode-loop.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

ds-sub-offset.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

dynamic_stackalloc.ll

Fix pointer EVT in SelectionDAGBuilder::visitAlloca

2017-11-16 12:22:19 +00:00

early-if-convert-cost.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

early-if-convert.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

early-inline-alias.ll

…

early-inline.ll

[PassManager] Run global optimizations after the inliner.

2017-10-05 18:06:37 +00:00

elf-header-flags-mach.ll

AMDGPU: Bring elf flags in sync with the spec

2018-02-16 22:33:59 +00:00

elf-header-flags-xnack.ll

AMDGPU: Bring elf flags in sync with the spec

2018-02-16 22:33:59 +00:00

elf-header-osabi.ll

AMDGPU: Bring elf flags in sync with the spec

2018-02-16 22:33:59 +00:00

elf-notes.ll

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

elf.ll

AMDGPU: Correctly set EI_OSABI based on the os

2017-10-04 22:44:13 +00:00

elf.r600.ll

AMDGPU: Correctly set EI_OSABI based on the os

2017-10-04 22:44:13 +00:00

else.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

empty-function.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

enable-no-signed-zeros-fp-math.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

endcf-loop-header.ll

AMDGPU: Remove old intrinsic uses

2017-05-17 21:38:21 +00:00

endpgm-dce.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

enqueue-kernel.ll

Make internal/private GVs implicitly dso_local.

2018-01-11 22:15:05 +00:00

env-amdgiz.ll

[AMDGPU] Add A5 to data layout for amdgiz environment

2017-04-11 17:18:13 +00:00

env-amdgizcl.ll

[AMDGPU] Add A5 to data layout for amdgiz environment

2017-04-11 17:18:13 +00:00

exceed-max-sgprs.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

extend-bit-ops-i16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

extload-align.ll

[CodeGen] Don't print register classes in -debug output

2018-01-09 15:39:44 +00:00

extload-private.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

extload.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

extract_vector_elt-f16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

extract_vector_elt-f64.ll

CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT

2017-12-02 22:13:22 +00:00

extract_vector_elt-i8.ll

CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT

2017-12-02 22:13:22 +00:00

extract_vector_elt-i16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

extract_vector_elt-i64.ll

CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT

2017-12-02 22:13:22 +00:00

extract-vector-elt-build-vector-combine.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

extractelt-to-trunc.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fabs.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fabs.f64.ll

[AMDGPU] Allow SDWA in instructions with immediates and SGPRs

2017-05-30 16:49:24 +00:00

fabs.ll

AMDGPU: Implement hasBitPreservingFPLogic

2017-10-13 21:10:22 +00:00

fadd64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fadd-fma-fmul-combine.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

fadd.f16.ll

Allow target to decide when to cluster loads/stores in misched

2017-09-13 22:20:47 +00:00

fadd.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

fcanonicalize-elimination.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fcanonicalize.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fcanonicalize.ll

[AMDGPU] Use v_pk_max_f16 for fcanonicalize

2017-09-06 22:27:29 +00:00

fceil64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fceil.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fcmp64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fcmp-cnd.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fcmp-cnde-int-args.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fcmp.f16.ll

AMDGPU: Add macro fusion schedule DAG mutation

2017-07-06 20:57:05 +00:00

fcmp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fconst64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fcopysign.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fcopysign.f32.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fcopysign.f64.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

fdiv.f16.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

fdiv.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fdiv.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

fence-amdgiz.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

fence-barrier.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

fetch-limits.r600.ll

…

fetch-limits.r700+.ll

…

ffloor.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

ffloor.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fix-vgpr-copies.mir

Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-17 03:05:33 +00:00

fix-wwm-liveness.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

flat_atomics_i64.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

flat_atomics.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

flat-address-space.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

flat-for-global-subtarget-feature.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

flat-load-clustering.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

flat-scratch-reg.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

floor.ll

…

fma-combine.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

fma.f64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fma.ll

AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction

2017-12-04 23:07:28 +00:00

fmad.ll

…

fmax3.f64.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

fmax3.ll

AMDGPU: Fix min3/max3 combines for f16/i16

2017-05-17 19:25:06 +00:00

fmax_legacy.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmax_legacy.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

fmax.ll

…

fmaxnum.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmaxnum.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmed3.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fmin3.ll

AMDGPU: Fix min3/max3 combines for f16/i16

2017-05-17 19:25:06 +00:00

fmin_fmax_legacy.amdgcn.ll

…

fmin_legacy.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmin_legacy.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

fmin.ll

…

fminnum.f64.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

fminnum.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmul64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fmul-2-combine-multi-use.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmul.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

fmul.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fmuladd.f16.ll

[AMDGPU] Removed redundant run lines for fmuladd.f16 test. NFC.

2018-02-20 19:19:56 +00:00

fmuladd.f32.ll

DAG: Fold fma (fneg x), K, y -> fma x, -K, y

2017-10-27 09:06:07 +00:00

fmuladd.f64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fmuladd.v2f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fnearbyint.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fneg-combines.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

fneg-fabs.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fneg-fabs.f64.ll

[AMDGPU] Allow SDWA in instructions with immediates and SGPRs

2017-05-30 16:49:24 +00:00

fneg-fabs.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fneg.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fneg.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fneg.ll

AMDGPU: Implement hasBitPreservingFPLogic

2017-10-13 21:10:22 +00:00

fold-cndmask.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fold-fmul-to-neg-abs.ll

Fold fneg and fabs like multiplications

2017-06-28 20:25:50 +00:00

fold-imm-f16-f32.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fold-immediate-output-mods.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fold-implicit-operand.mir

AMDGPU: Don't crash when trying to fold implicit operands

2018-02-08 01:12:46 +00:00

fold-multiple.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fold-operands-order.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

fp16_to_fp32.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fp16_to_fp64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fp32_to_fp16.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fp_to_sint.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fp_to_sint.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fp_to_uint.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fp_to_uint.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fp-classify.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fpext-free.ll

AMDGPU: Look for src mods before fp_extend

2017-10-13 20:45:49 +00:00

fpext.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fpext.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fptosi.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

fptoui.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

fptrunc.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fptrunc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

fract.f64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fract.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

frame-index-amdgiz.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

frame-index-elimination.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

frem.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

fsqrt.f64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fsqrt.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fsub64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

fsub.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

fsub.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

ftrunc.f64.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

ftrunc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

function-args.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

function-returns.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

gep-address-space.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

global_atomics_i64.ll

AMDGPU: Start selecting global instructions

2017-07-29 01:03:53 +00:00

global_atomics.ll

AMDGPU: Start selecting global instructions

2017-07-29 01:03:53 +00:00

global_smrd_cfg.ll

DivergencyAnalysis patch for review

2017-06-15 19:33:10 +00:00

global_smrd.ll

…

global-constant.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

global-directive.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

global-extload-i16.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

global-smrd-unknown.ll

AMDGPU: Fix converting unanalyzable global loads to SMRD

2017-07-12 23:06:18 +00:00

global-variable-relocs.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

gv-const-addrspace.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

gv-offset-folding.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

half.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

hazard-inlineasm.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

hazard.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

hoist-cond.ll

…

hsa-default-device.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

hsa-fp-mode.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

hsa-func-align.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

hsa-func.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

hsa-globals.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

hsa-group-segment.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

hsa-metadata-deduce-ro-arg.ll

AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available

2017-12-08 19:22:12 +00:00

hsa-metadata-enqueu-kernel.ll

AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available

2017-12-08 19:22:12 +00:00

hsa-metadata-from-llvm-ir-full.ll

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

hsa-metadata-images.ll

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

hsa-metadata-invalid-ocl-version-1.ll

llvm-readobj: Print AMDGPU note contents

2017-10-14 18:21:42 +00:00

hsa-metadata-invalid-ocl-version-2.ll

llvm-readobj: Print AMDGPU note contents

2017-10-14 18:21:42 +00:00

hsa-metadata-invalid-ocl-version-3.ll

llvm-readobj: Print AMDGPU note contents

2017-10-14 18:21:42 +00:00

hsa-metadata-kernel-code-props.ll

AMDGPU: Add num spilled s/vgprs to metadata

2017-11-28 17:51:08 +00:00

hsa-metadata-kernel-debug-props.ll

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

hsa-note-no-func.ll

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

hsa.ll

AMDGPU: Detect kernarg segment pointer

2017-07-14 00:11:13 +00:00

huge-private-buffer.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

i1-copy-implicit-def.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

i1-copy-phi.ll

[AMDGPU] Optimize SI_IF lowering for simple if regions

2017-07-26 21:29:15 +00:00

i8-to-double-to-float.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

icmp64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

icmp-select-sete-reverse-args.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

icmp.i16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

illegal-sgpr-to-vgpr-copy.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

image-attributes.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

image-resource-id.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

image-schedule.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

imm16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

imm.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

immv216.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

indirect-addressing-si-noopt.ll

AMDGPU Tests: Change a case to be run with -O0

2017-12-06 17:40:09 +00:00

indirect-addressing-si.ll

AMDGPU/SI: Turn off GPR Indexing Mode immediately after the interested instruction.

2018-02-16 16:31:30 +00:00

indirect-private-64.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

infer-addrpace-pipeline.ll

[AMDGPU] Add infer address spaces pass before SROA

2017-06-19 23:17:36 +00:00

infinite-loop-evergreen.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

infinite-loop.ll

[AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests.

2017-06-02 14:19:25 +00:00

inline-asm.ll

AMDGPU: Fix assert on n inline asm constraint

2017-08-09 20:09:35 +00:00

inline-attr.ll

[AMDGPU] Set fast-math flags on functions given the options

2017-09-29 23:40:19 +00:00

inline-calls.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

inline-constraints.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

inlineasm-16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

inlineasm-illegal-type.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

inlineasm-packed.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

InlineAsmCrash.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

input-mods.ll

…

insert_subreg.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

insert_vector_elt.ll

CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT

2017-12-02 22:13:22 +00:00

insert_vector_elt.v2i16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

insert-skips-kill-uncond.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

insert-waits-callee.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

insert-waits-exp.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

inserted-wait-states.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

internalize.ll

[AMDGPU] Port of HSAIL inliner

2017-09-20 04:25:58 +00:00

invalid-addrspacecast.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

invalid-alloca.ll

LLParser: add an argument for overriding data layout and do not check alloca addr space

2018-01-30 22:32:39 +00:00

invariant-load-no-alias-store.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

invert-br-undef-vcc.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

ipra.ll

AMDGPU: Enable IPRA

2017-11-28 23:40:12 +00:00

jump-address.ll

…

kcache-fold.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

kernarg-stack-alignment.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

kernel-args.ll

[AMDGPU] Remove non-temporal flag from argument loads

2018-02-14 18:05:14 +00:00

knownbits-recursion.ll

[AMDGPU] Testcase for computeKnownBits recursion. NFC.

2017-09-01 22:25:22 +00:00

large-alloca-compute.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

large-alloca-graphics.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

large-constant-initializer.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

large-work-group-promote-alloca.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

lds_atomic_f32.ll

[AMDGPU] fix LDS f32 intrinsics

2018-01-26 11:09:38 +00:00

lds-alignment.ll

[NFC] fix trivial typos in comments and documents

2018-01-29 05:17:03 +00:00

lds-initializer.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

lds-m0-init-in-loop.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

lds-oqap-crash.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

lds-output-queue.ll

[CodeGen] Print "%vreg0" as "%0" in both MIR and debug output

2017-11-30 12:12:19 +00:00

lds-size.ll

AMDGPU/AMDHSA: Set COMPUTE_PGM_RSRC2:LDS_SIZE to 0

2017-05-05 20:13:55 +00:00

lds-zero-initializer.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

legalizedag-bug-expand-setcc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

limit-coalesce.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

lit.local.cfg

…

literals.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

liveness.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

llvm.amdgcn.alignb.ll

[AMDGPU] Add intrinsics for alignbit and alignbyte instructions

2017-06-09 19:03:00 +00:00

llvm.amdgcn.atomic.dec.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

llvm.amdgcn.atomic.inc.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

llvm.amdgcn.buffer.atomic.ll

AMDGPU: Lower buffer store and atomic intrinsics manually

2017-11-09 01:52:48 +00:00

llvm.amdgcn.buffer.load.format.d16.ll

AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the target has UnpackedD16VMem feature.

2018-02-01 18:41:33 +00:00

llvm.amdgcn.buffer.load.format.ll

AMDGPU: Split MUBUF offset into aligned components

2017-10-10 12:22:23 +00:00

llvm.amdgcn.buffer.load.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.buffer.store.format.d16.ll

[AMDGPU] Remove non-temporal flag from argument loads

2018-02-14 18:05:14 +00:00

llvm.amdgcn.buffer.store.format.ll

AMDGPU: Lower buffer store and atomic intrinsics manually

2017-11-09 01:52:48 +00:00

llvm.amdgcn.buffer.store.ll

AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4

2017-11-09 01:52:55 +00:00

llvm.amdgcn.buffer.wbinvl1.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.buffer.wbinvl1.sc.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.buffer.wbinvl1.vol.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.class.f16.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

llvm.amdgcn.class.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

llvm.amdgcn.cos.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.cos.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.cubeid.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.cubema.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.cubesc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.cubetc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.cvt.pk.i16.ll

AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}

2018-01-31 20:18:04 +00:00

llvm.amdgcn.cvt.pk.u16.ll

AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}

2018-01-31 20:18:04 +00:00

llvm.amdgcn.cvt.pknorm.i16.ll

AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}

2018-01-31 20:18:04 +00:00

llvm.amdgcn.cvt.pknorm.u16.ll

AMDGPU: Add intrinsics llvm.amdgcn.cvt.{pknorm.i16, pknorm.u16, pk.i16, pk.u16}

2018-01-31 20:18:04 +00:00

llvm.amdgcn.cvt.pkrtz.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

llvm.amdgcn.dispatch.id.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.dispatch.ptr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.amdgcn.div.fixup.f16.ll

AMDGPU: Fix breaking SMEM clauses

2017-11-17 04:18:24 +00:00

llvm.amdgcn.div.fixup.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.div.fmas.ll

[AMDGPU] Optimize SI_IF lowering for simple if regions

2017-07-26 21:29:15 +00:00

llvm.amdgcn.div.scale.ll

AMDGPU: Fix handling of div_scale with undef inputs

2017-08-01 20:49:41 +00:00

llvm.amdgcn.ds.bpermute.ll

[DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2)

2017-09-14 10:38:30 +00:00

llvm.amdgcn.ds.permute.ll

[AMDGPU] Add a new pass to insert waitcnts. Leave under an option for testing.

2017-04-12 03:25:12 +00:00

llvm.amdgcn.ds.swizzle.ll

[AMDGPU] Turn on the new waitcnt insertion pass. Adjust tests.

2017-06-02 14:19:25 +00:00

llvm.amdgcn.exp.compr.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

llvm.amdgcn.exp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.fcmp.ll

[AMDGPU] Allow SDWA in instructions with immediates and SGPRs

2017-05-30 16:49:24 +00:00

llvm.amdgcn.fdiv.fast.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.fmed3.f16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

llvm.amdgcn.fmed3.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.fmul.legacy.ll

[AMDGPU] Allow SDWA in instructions with immediates and SGPRs

2017-05-30 16:49:24 +00:00

llvm.amdgcn.fract.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.fract.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.frexp.exp.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.frexp.exp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.frexp.mant.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.frexp.mant.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.groupstaticsize.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.icmp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.image.atomic.ll

AMDGPU: Lower buffer store and atomic intrinsics manually

2017-11-09 01:52:48 +00:00

llvm.amdgcn.image.d16.ll

[AMDGPU] Remove non-temporal flag from argument loads

2018-02-14 18:05:14 +00:00

llvm.amdgcn.image.gather4.d16.ll

AMDGPU/SI: Add d16 support for image intrinsics.

2018-01-18 22:08:53 +00:00

llvm.amdgcn.image.gather4.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.image.getlod.ll

AMDGPU: image_getlod and image_getresinfo do not read memory

2017-12-08 20:00:57 +00:00

llvm.amdgcn.image.ll

[AMDGPU] stop image_store being moved illegally

2018-01-12 22:57:24 +00:00

llvm.amdgcn.image.sample.d16.ll

AMDGPU/SI: Add d16 support for image intrinsics.

2018-01-18 22:08:53 +00:00

llvm.amdgcn.image.sample.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.image.sample.o.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.implicit.buffer.ptr.hsa.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.amdgcn.implicit.buffer.ptr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.amdgcn.implicitarg.ptr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.amdgcn.init.exec.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

llvm.amdgcn.interp.ll

…

llvm.amdgcn.kernarg.segment.ptr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.amdgcn.kill.ll

AMDGPU: Allow a SGPR for the conditional KILL operand

2018-01-29 23:19:10 +00:00

llvm.amdgcn.ldexp.f16.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

llvm.amdgcn.ldexp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.lerp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.log.clamp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.mbcnt.ll

AMDGPU: Implement computeKnownBitsForTargetNode for mbcnt

2017-11-13 22:55:05 +00:00

llvm.amdgcn.mov.dpp.ll

[AMDGPU] Add pseudo "old" source to all DPP instructions

2017-08-07 19:10:56 +00:00

llvm.amdgcn.mqsad.pk.u16.u8.ll

[AMDGPU] Eliminate SGPR to VGPR copy when possible

2017-06-20 18:32:42 +00:00

llvm.amdgcn.mqsad.u32.u8.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

llvm.amdgcn.msad.u8.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.ps.live.ll

AMDGPU: VALU carry-in and v_cndmask condition cannot be EXEC

2017-09-29 15:37:31 +00:00

llvm.amdgcn.qsad.pk.u16.u8.ll

[AMDGPU] Eliminate SGPR to VGPR copy when possible

2017-06-20 18:32:42 +00:00

llvm.amdgcn.queue.ptr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.amdgcn.rcp.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.rcp.legacy.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.rcp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.readfirstlane.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.readlane.ll

AMDGPU: Move v_readlane lane select from VGPR to SGPR

2017-04-24 17:17:36 +00:00

llvm.amdgcn.rsq.clamp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.rsq.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.rsq.legacy.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.rsq.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.barrier.ll

AMDGPU: Start selecting global instructions

2017-07-29 01:03:53 +00:00

llvm.amdgcn.s.dcache.inv.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.s.dcache.inv.vol.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.s.dcache.wb.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.s.dcache.wb.vol.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

llvm.amdgcn.s.decperflevel.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.getpc.ll

Resubmit r303859 with test fixed.

2017-05-26 20:38:26 +00:00

llvm.amdgcn.s.getreg.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.incperflevel.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.memrealtime.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.memtime.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.sleep.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.s.waitcnt.ll

[AMDGPU] Combine adjacent waitcounts in a single strongest wait

2018-02-15 22:03:55 +00:00

llvm.amdgcn.sad.hi.u8.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.sad.u8.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.sad.u16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.sbfe.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

llvm.amdgcn.sendmsg.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.set.inactive.ll

[AMDGPU] Implement llvm.amdgcn.set.inactive intrinsic

2017-08-04 18:36:54 +00:00

llvm.amdgcn.sffbh.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

llvm.amdgcn.sin.f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.sin.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.tbuffer.load.d16.ll

AMDGPU/SI: Adjust the encoding family for D16 buffer instructions when the target has UnpackedD16VMem feature.

2018-02-01 18:41:33 +00:00

llvm.amdgcn.tbuffer.load.ll

[AMDGPU] Add intrinsics for tbuffer load and store

2017-06-22 16:29:22 +00:00

llvm.amdgcn.tbuffer.store.d16.ll

[AMDGPU] Remove non-temporal flag from argument loads

2018-02-14 18:05:14 +00:00

llvm.amdgcn.tbuffer.store.ll

[AMDGPU] Add intrinsics for tbuffer load and store

2017-06-22 16:29:22 +00:00

llvm.amdgcn.trig.preop.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

llvm.amdgcn.ubfe.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

llvm.amdgcn.unreachable.ll

Fix test from polluting the source tree

2017-04-22 07:53:40 +00:00

llvm.amdgcn.update.dpp.ll

[AMDGPU] Add llvm.amdgpu.update.dpp intrinsic

2017-08-08 18:52:22 +00:00

llvm.amdgcn.wave.barrier.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.workgroup.id.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.workitem.id.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.amdgcn.wqm.vote.ll

AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic

2017-10-24 10:26:59 +00:00

llvm.AMDGPU.kill.ll

…

llvm.amdgpu.kilp.ll

…

llvm.ceil.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.cos.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.cos.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.dbg.value.ll

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

llvm.exp2.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.exp2.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.floor.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.fma.f16.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

llvm.fmuladd.f16.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

llvm.log2.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.log2.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

llvm.log10.f16.ll

[AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsics

2017-11-27 13:26:38 +00:00

llvm.log10.ll

[AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsics

2017-11-27 13:26:38 +00:00

llvm.log.f16.ll

[AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsics

2017-11-27 13:26:38 +00:00

llvm.log.ll

[AMDGPU] Add custom lowering for llvm.log{,10}.{f16,f32} intrinsics

2017-11-27 13:26:38 +00:00

llvm.maxnum.f16.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

llvm.memcpy.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.minnum.f16.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

llvm.pow.ll

…

llvm.r600.cube.ll

…

llvm.r600.dot4.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.r600.group.barrier.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.r600.read.local.size.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.r600.recipsqrt.clamped.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.r600.recipsqrt.ieee.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.r600.tex.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.rint.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.rint.f64.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

llvm.rint.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.round.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.round.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.SI.load.dword.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

llvm.SI.tbuffer.store.ll

AMDGPU: Remove SITypeRewriter

2017-06-28 21:38:50 +00:00

llvm.sin.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.sin.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

llvm.sqrt.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

llvm.trunc.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

load-constant-f64.ll

Revert "[AMDGPU] Increased vector length for global/constant loads."

2018-02-20 23:30:21 +00:00

load-constant-i1.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-constant-i8.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-constant-i16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-constant-i32.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-constant-i64.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-global-f32.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

load-global-f64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

load-global-i1.ll

[AMDGPU] Fix pointer info for pseudo source for r600

2017-11-10 01:53:24 +00:00

load-global-i8.ll

Re-land MachineInstr: Reason locally about some memory objects before going to AA.

2017-08-30 14:57:12 +00:00

load-global-i16.ll

Re-land MachineInstr: Reason locally about some memory objects before going to AA.

2017-08-30 14:57:12 +00:00

load-global-i32.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

load-global-i64.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

load-hi16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-input-fold.ll

…

load-lo16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

load-local-f32.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-local-f64.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-local-i1.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-local-i8.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-local-i16.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-local-i32.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-local-i64.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

load-private-double16-amdgiz.ll

CodeGen: Fix pointer info in expandUnalignedLoad/Store

2017-09-29 23:31:14 +00:00

load-weird-sizes.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

local-64.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

local-atomics64.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

local-atomics.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

local-memory.amdgcn.ll

[AMDGPU] Generate range metadata for workitem id

2017-04-12 20:48:56 +00:00

local-memory.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

local-memory.r600.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

local-stack-slot-offset.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

loop_break.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

loop-address.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

loop-idiom.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

lower-mem-intrinsics.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

lower-range-metadata-intrinsic-call.ll

[AMDGPU] Generate range metadata for workitem id

2017-04-12 20:48:56 +00:00

lshl64-to-32.ll

[AMDGPU] computeKnownBitsForTargetNode for 24 bit mul

2017-08-28 16:35:37 +00:00

lshr.v2i16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

macro-fusion-cluster-vcc-uses.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

mad24-get-global-id.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

mad_64_32.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

mad_int24.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

mad_uint24.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

mad-combine.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

mad-mix-hi.ll

[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*

2017-11-17 15:15:40 +00:00

mad-mix-lo.ll

[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*

2017-11-17 15:15:40 +00:00

mad-mix.ll

[AMDGPU][MC][GFX9][disassembler] Corrected decoding of op_sel_hi for v_mad_mix*

2017-11-17 15:15:40 +00:00

madak.ll

[AMDGPU] Produce madak and madmk from the two-address pass

2017-09-11 17:13:57 +00:00

madmk.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

max3.ll

AMDGPU: Fix min3/max3 combines for f16/i16

2017-05-17 19:25:06 +00:00

max-literals.ll

…

max.i16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

max.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

mem-builtins.ll

AMDGPU: Remove error on calls for amdgcn

2017-08-03 23:24:05 +00:00

memory-legalizer-atomic-cmpxchg.ll

[AMDGPU] Cleanup in memory legalizer tests. NFC.

2018-02-13 20:03:32 +00:00

memory-legalizer-atomic-fence.ll

[AMDGPU] Cleanup in memory legalizer tests. NFC.

2018-02-13 20:03:32 +00:00

memory-legalizer-atomic-insert-end.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

memory-legalizer-atomic-rmw.ll

[AMDGPU] Cleanup in memory legalizer tests. NFC.

2018-02-13 20:03:32 +00:00

memory-legalizer-invalid-syncscope.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

memory-legalizer-load.ll

[AMDGPU] Cleanup in memory legalizer tests. NFC.

2018-02-13 20:03:32 +00:00

memory-legalizer-multiple-mem-operands-atomics.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

memory-legalizer-multiple-mem-operands-nontemporal-1.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

memory-legalizer-multiple-mem-operands-nontemporal-2.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

memory-legalizer-store-infinite-loop.ll

[AMDGPU] Turn off MergeConsecutiveStores() before Instruction Selection for AMDGPU. Commit dbbb6c5fc3642987430866dffdf710df4f616ac7 turned on MergeConsecutiveStores() before Instruction Selection for all targets. Enough AMDGPU compiles go into an infinite loop ( MergeConsecutiveStores() merges two stores; LegalizeStoreOps() un-merges; MergeConsecutiveStores() re-merges, etc. ) to warrant turning it off until the issues can be addressed.

2017-12-19 19:26:23 +00:00

memory-legalizer-store.ll

[AMDGPU] Cleanup in memory legalizer tests. NFC.

2018-02-13 20:03:32 +00:00

merge-load-store-vreg.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

merge-load-store.mir

AMDGPU: Fix incorrect reordering when inline asm defines LDS address

2018-02-08 01:56:14 +00:00

merge-m0.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

merge-store-crash.ll

[AMDGPU] Add intrinsics for tbuffer load and store

2017-06-22 16:29:22 +00:00

merge-store-usedef.ll

[AMDGPU] Add intrinsics for tbuffer load and store

2017-06-22 16:29:22 +00:00

merge-stores.ll

AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4

2017-11-09 01:52:55 +00:00

mesa_regression.ll

…

min3.ll

AMDGPU: Fix min3/max3 combines for f16/i16

2017-05-17 19:25:06 +00:00

min.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

misched-killflags.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

missing-store.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

move-addr64-rsrc-dead-subreg-writes.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

move-to-valu-atomicrmw.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

move-to-valu-worklist.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

movreld-bug.ll

…

movrels-bug.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

mubuf-offset-private.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

mubuf-shader-vgpr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

mubuf.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

mul_int24.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

mul_uint24-amdgcn.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

mul_uint24-r600.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

mul.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

multi-divergent-exit-region.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

multilevel-break.ll

Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding"

2018-02-17 03:05:33 +00:00

nested-calls.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

nested-loop-conditions.ll

Revert r321751, "StructurizeCFG: Fix broken backedge detection"

2018-01-24 18:02:05 +00:00

no-hsa-graphics-shaders.ll

…

no-initializer-constant-addrspace.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

no-shrink-extloads.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

nop-data.ll

AMDGPU: Actually write nops for writeNopData

2017-04-08 21:28:38 +00:00

not-scalarize-volatile-load.ll

AMDGPUAnnotateUniformValue should always treat volatile loads as divergent

2017-06-02 15:25:52 +00:00

nullptr.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

omod.ll

…

opencl-image-metadata.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

operand-folding.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

operand-spacing.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

opt-sgpr-to-vgpr-copy.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

optimize-if-exec-masking.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

or.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

over-max-lds-size.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

pack.v2f16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

pack.v2i16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

packed-op-sel.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

packetizer.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

parallelandifcollapse.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

parallelorifcollapse.ll

fix typos in comments; NFC

2017-07-16 08:11:56 +00:00

partial-sgpr-to-vgpr-spills.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

partially-dead-super-register-immediate.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

predicate-dp4.ll

…

predicates.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

private-access-no-objects.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

private-element-size.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

private-memory-atomics.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

private-memory-r600.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

promote-alloca-addrspacecast.ll

…

promote-alloca-array-aggregate.ll

AMDGPU: Fix assert on alloca of array of struct

2017-09-14 18:02:29 +00:00

promote-alloca-array-allocation.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

promote-alloca-bitcast-function.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

promote-alloca-calling-conv.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

promote-alloca-globals.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

promote-alloca-invariant-markers.ll

Let llvm.invariant.group.barrier accepts pointer to any address space

2017-11-16 16:32:16 +00:00

promote-alloca-lifetime.ll

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

promote-alloca-mem-intrinsics.ll

Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)

2018-01-19 17:13:12 +00:00

promote-alloca-no-opts.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

promote-alloca-padding-size-estimate.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

promote-alloca-stored-pointer-value.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

promote-alloca-to-lds-icmp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

promote-alloca-to-lds-phi.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

promote-alloca-to-lds-select.ll

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

promote-alloca-unhandled-intrinsic.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

promote-alloca-volatile.ll

AMDGPU/SI: Don't promote to vector if the load/store is volatile.

2017-05-12 20:31:12 +00:00

pv-packing.ll

…

pv.ll

…

r600-constant-array-fixup.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

r600-encoding.ll

…

r600-export-fix.ll

…

r600-infinite-loop-bug-while-reorganizing-vector.ll

…

r600-legalize-umax-bug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

r600.alu-limits.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

r600.amdgpu-alias-analysis.ll

[AMDGPU] Update test r600.amdgpu-alias-analysis.ll

2017-11-20 16:53:13 +00:00

r600.bitcast.ll

[AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)

2017-05-23 21:27:15 +00:00

r600.global_atomics.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

r600.private-memory.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

r600.work-item-intrinsics.ll

[SelectionDAG] Provide adequate register class for RegisterSDNode

2018-02-09 13:55:25 +00:00

r600cfg.ll

…

rcp-pattern.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

read_register.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

read-register-invalid-subtarget.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

read-register-invalid-type-i32.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

read-register-invalid-type-i64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

readcyclecounter.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

readlane_exec0.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

README

…

reduce-load-width-alignment.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

reduce-saveexec.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

reduce-store-width-alignment.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

reg-coalescer-sched-crash.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

regcoal-subrange-join.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

regcoalesce-dbg.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

regcoalesce-prune.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

register-count-comments.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

rename-disconnected-bug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

rename-independent-subregs-mac-operands.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

rename-independent-subregs.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

reorder-stores.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

ret_jump.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

ret.ll

[AMDGPU] Return true in enableMultipleCopyHints().

2018-02-17 10:00:28 +00:00

rewrite-out-arguments-address-space.ll

AMDGPU: Look through a bitcast user of an out argument

2017-07-28 19:06:16 +00:00

rewrite-out-arguments.ll

AMDGPU: Look through a bitcast user of an out argument

2017-07-28 19:06:16 +00:00

rotl.i64.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

rotl.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

rotr.i64.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

rotr.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

rsq.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

rv7x0_count3.ll

…

s_addk_i32.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

s_movk_i32.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

s_mulk_i32.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

sad.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

saddo.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

salu-to-valu.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

sampler-resource-id.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

scalar_to_vector.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

scalar-branch-missing-and-exec.ll

AMDGPU: Bring processors and features in sync with the spec

2018-02-16 21:26:25 +00:00

scalar-store-cache-flush.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sched-crash-dbg-value.mir

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

schedule-fs-loop-nested-if.ll

…

schedule-fs-loop-nested.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

schedule-fs-loop.ll

…

schedule-global-loads.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

schedule-if-2.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

schedule-if.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

schedule-ilp.ll

AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)

2017-11-20 14:35:53 +00:00

schedule-kernel-arg-loads.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

schedule-regpressure-limit2.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

schedule-regpressure-limit.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

schedule-regpressure.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

schedule-vs-if-nested-loop-failure.ll

…

schedule-vs-if-nested-loop.ll

…

scheduler-subrange-crash.ll

AMDGPU: Remove SITypeRewriter

2017-06-28 21:38:50 +00:00

scratch-buffer.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

scratch-simple.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

sdiv.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

sdivrem24.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sdivrem64.ll

[AMDGPU] New 64 bit div/rem expansion

2017-10-06 17:24:45 +00:00

sdwa-gfx9.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sdwa-peephole-instr.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sdwa-peephole.ll

AMDGPU: Minor cleanups

2018-02-08 22:46:38 +00:00

sdwa-preserve.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sdwa-scalar-ops.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sdwa-vop2-64bit.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

select64.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

select-fabs-fneg-extract-legacy.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

select-fabs-fneg-extract.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

select-i1.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

select-opt.ll

[AMDGPU] Fixed incorrect uniform branch condition

2018-01-09 21:34:43 +00:00

select-vectors.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

select.f16.ll

[AMDGPU] Prevent post-RA scheduler from breaking memory clauses

2017-09-19 20:54:38 +00:00

select.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

selectcc-cnd.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

selectcc-cnde-int.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

selectcc-icmp-select-float.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

selectcc-opt.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

selectcc.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

selected-stack-object.ll

…

sendmsg-m0-hazard.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

set-dx10.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

setcc64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

setcc-equivalent.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

setcc-fneg-constant.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

setcc-opt.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

setcc-sext.ll

[AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc

2017-06-27 18:53:03 +00:00

setcc.ll

[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment

2017-11-10 02:03:28 +00:00

seto.ll

…

setuo.ll

…

sext-eliminate.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sext-in-reg-failure-r600.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sext-in-reg.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

sgpr-control-flow.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

sgpr-copy-duplicate-operand.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

sgpr-copy.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

sgprcopies.ll

AMDGPU : Fix common dominator of two incoming blocks terminates with uniform branch issue.

2017-04-12 23:51:47 +00:00

shared-op-cycle.ll

…

shift-and-i64-ubfe.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

shift-and-i128-ubfe.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

shift-i64-opts.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

shl_add_constant.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

shl_add_ptr.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

shl-add-to-add-shl.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

shl.ll

[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment

2017-11-10 02:03:28 +00:00

shl.v2i16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

shrink-add-sub-constant.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

shrink-carry.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

shrink-vop3-carry-out.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

si-annotate-cf-noloop.ll

[AMDGPU] Eliminate no effect instructions before s_endpgm

2017-08-16 04:43:49 +00:00

si-annotate-cf-unreachable.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

si-annotate-cf.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

si-annotate-cfg-loop-assert.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

si-fix-sgpr-copies.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

si-instr-info-correct-implicit-operands.ll

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

si-lod-bias.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

si-lower-control-flow-kill.ll

[AMDGPU] Preserve inverted bit in SI_IF in presence of SI_KILL

2017-08-04 06:58:42 +00:00

si-lower-control-flow-unreachable-block.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

si-scheduler.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

si-sgpr-spill.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

si-spill-cf.ll

AMDGPU: Remove SITypeRewriter

2017-06-28 21:38:50 +00:00

si-spill-sgpr-stack.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

si-triv-disjoint-mem-access.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

si-vector-hang.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sibling-call.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

sign_extend.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

simplify-libcalls.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

simplifydemandedbits-recursion.ll

Use the return value of UpdateNodeOperands(); in some cases, UpdateNodeOperands() modifies the node in-place and using the return value isn’t strictly necessary. However, it does not necessarily modify the node, but may return a resultant node if it already exists in the DAG. See comments in UpdateNodeOperands(). In that case, the return value must be used to avoid such scenarios as an infinite loop (node is assumed to have been updated, so added back to the worklist, and re-processed; however, node hasn’t changed so it is once again passed to UpdateNodeOperands(), assumed modified, added back to worklist; cycle infinitely repeats).

2017-10-16 23:38:53 +00:00

sint_to_fp.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sint_to_fp.i64.ll

[AMDGPU] Eliminate SGPR to VGPR copy when possible

2017-06-20 18:32:42 +00:00

sint_to_fp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sitofp.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

skip-if-dead.ll

[AMDGPU] Fixed incorrect uniform branch condition

2018-01-09 21:34:43 +00:00

smed3.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

sminmax.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

sminmax.v2i16.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

smrd-vccz-bug.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

smrd.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

sopk-compares.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

spill-alloc-sgpr-init-bug.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

spill-cfg-position.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

spill-empty-live-interval.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

spill-m0.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

spill-scavenge-offset.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

spill-to-smem-m0.ll

AMDGPU: M0 operands to spill/restore opcodes are dead

2017-06-27 08:04:13 +00:00

spill-wide-sgpr.ll

…

split-scalar-i64-add.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

split-smrd.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

split-vector-memoperand-offsets.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

splitkit.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

sra.ll

[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment

2017-11-10 02:03:28 +00:00

srem.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

srl.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

ssubo.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

stack-size-overflow.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

stack-slot-color-sgpr-vgpr-spills.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

store_typed.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

store-barrier.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

store-global.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

store-hi16.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

store-local.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

store-private.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

store-v3i64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

store-vector-ptrs.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

store-weird-sizes.ll

AMDGPU: Select DS insts without m0 initialization

2017-11-29 00:55:57 +00:00

stress-calls.ll

AMDGPU: Add option to stress calls

2017-09-21 07:00:48 +00:00

structurize1.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

structurize.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

sub.i16.ll

AMDGPU: Replace i64 add/sub lowering

2017-11-15 21:51:43 +00:00

sub.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

sub.v2i16.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

subreg_interference.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

subreg-coalescer-crash.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

subreg-coalescer-undef-use.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

subreg-eliminate-dead.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

subreg-intervals.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

swizzle-export.ll

…

syncscopes.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

tail-call-cgp.ll

AMDGPU: Start adding tail call support

2017-08-11 20:42:08 +00:00

target-cpu.ll

AMDGPU/SI: Extend promoting alloca to vector to arrays of up to 16 elements

2018-02-16 19:14:17 +00:00

tex-clause-antidep.ll

…

texture-input-merge.ll

…

trap.ll

AMDGPU: Detect kernarg segment pointer

2017-07-14 00:11:13 +00:00

trunc-bitcast-vector.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

trunc-cmp-constant.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

trunc-store-f64-to-f16.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

trunc-store-i1.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

trunc-store.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

trunc-vector-store-assertion-failure.ll

[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment

2017-11-10 02:03:28 +00:00

trunc.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

tti-unroll-prefs.ll

AMDGPU: Remove -mcpu=SI

2017-08-07 18:30:35 +00:00

twoaddr-mad.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

uaddo.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

udiv.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

udivrem24.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

udivrem64.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

udivrem.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

uint_to_fp.f64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

uint_to_fp.i64.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

uint_to_fp.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

uitofp.f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

umed3.ll

AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

2017-12-08 20:52:28 +00:00

unaligned-load-store.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

undefined-physreg-sgpr-spill.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

undefined-subreg-liverange.ll

AMDGPU: Use correct register names in inline assembly

2017-06-08 19:03:20 +00:00

unhandled-loop-condition-assertion.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

uniform-branch-intrinsic-cond.ll

…

uniform-cfg.ll

[AMDGPU] Fixed incorrect uniform branch condition

2018-01-09 21:34:43 +00:00

uniform-crash.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

uniform-loop-inside-nonuniform.ll

[AMDGPU] SiFixSGPRCopies should not modify non-divergent PHI

2017-12-01 11:56:34 +00:00

uniform-PHI.ll

[AMDGPU] SiFixSGPRCopies should not modify non-divergent PHI

2017-12-01 11:56:34 +00:00

unify-metadata.ll

…

unigine-liveness-crash.ll

…

unknown-processor.ll

[AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment

2017-11-06 14:32:33 +00:00

unpack-half.ll

[SelectionDAG] Fixed f16-from-vector promotion problem

2018-01-09 21:36:25 +00:00

unroll.ll

[AMDGPU] Unroll more to eliminate phis and conditions

2017-04-07 16:26:28 +00:00

unsupported-calls.ll

[AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit

2017-11-06 13:01:33 +00:00

unsupported-cc.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

urem.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

use-sgpr-multiple-times.ll

AMDGPU: Fix breaking SMEM clauses

2017-11-17 04:18:24 +00:00

usubo.ll

AMDGPU: Use gfx9 carry-less add/sub instructions

2017-11-30 22:51:26 +00:00

v1i64-kernel-arg.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

v_cndmask.ll

AMDGPU: Fix -enable-var-scope violations

2017-11-12 23:53:44 +00:00

v_cvt_pk_u8_f32.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

v_mac_f16.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

v_mac.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

v_madak_f16.ll

[AMDGPU] Produce madak and madmk from the two-address pass

2017-09-11 17:13:57 +00:00

valu-i1.ll

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

vccz-corrupt-bug-workaround.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

vector-alloca.ll

[AMDGPU] Fix pointer info for pseudo source for r600

2017-11-10 01:53:24 +00:00

vector-extract-insert.ll

AMDGPU: Cleanup subtarget features

2017-08-07 14:58:04 +00:00

vectorize-global-local.ll

[AMDGPU] Switch scalarize global loads ON by default

2017-07-04 17:32:00 +00:00

vertex-fetch-encoding.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

vgpr-spill-emergency-stack-slot-compute.ll

CodeGen: Fix pointer info in SplitVecOp_EXTRACT_VECTOR_ELT/SplitVecRes_INSERT_VECTOR_ELT

2017-12-02 22:13:22 +00:00

vgpr-spill-emergency-stack-slot.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

vi-removed-intrinsics.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

vop-shrink-frame-index.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

vop-shrink-non-ssa.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

vop-shrink.ll

[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}

2017-11-20 18:24:21 +00:00

vselect64.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

vselect.ll

AMDGPU: Add macro fusion schedule DAG mutation

2017-07-06 20:57:05 +00:00

vtx-fetch-branch.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

vtx-schedule.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

wait.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

waitcnt-flat.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

waitcnt-looptest.ll

Revert "[AMDGPU] Increased vector length for global/constant loads."

2018-02-20 23:30:21 +00:00

waitcnt-no-redundant.mir

[AMDGPU] Make note of existing waitcnt instrs; this is add-on work related to suppression of redundant waitcnt instrs. It is necessary to make note of these existing waitcnt instrs so that we do not fall into an infinite loop when handling loops. Also, [NFC] some minor code clean-up.

2018-02-19 19:19:59 +00:00

waitcnt-permute.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

waitcnt.mir

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

widen_extending_scalar_loads.ll

[AMDGPU] Change constant addr space to 4

2018-02-13 18:00:25 +00:00

widen-vselect-and-mask.ll

DAG: Fix creating select with wrong condition type

2017-10-25 07:14:07 +00:00

wqm.ll

[AMDGPU] Switch to the new addr space mapping by default

2018-02-02 16:07:16 +00:00

wqm.mir

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

write_register.ll

[AMDGPU] Eliminate no effect instructions before s_endpgm

2017-08-16 04:43:49 +00:00

write-register-vgpr-into-sgpr.ll

[AMDGPU] Eliminate no effect instructions before s_endpgm

2017-08-16 04:43:49 +00:00

wrong-transalu-pos-fix.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

xfail.r600.bitcast.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

xnor.ll

AMDGPU: Start selecting s_xnor_{b32, b64}

2017-09-18 21:22:45 +00:00

xor.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

zero_extend.ll

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

2017-03-21 21:39:51 +00:00

zext-i64-bit-operand.ll

AMDGPU: Allow SIShrinkInstructions to work in non-SSA

2017-07-10 19:53:57 +00:00

zext-lid.ll

AMDGPU: Fix default range in non-kernel functions

2017-10-23 17:09:35 +00:00