Marek Olsak 5cec64195c AMDGPU: Lower buffer store and atomic intrinsics manually ...

Summary:
Without this, SIMemoryLegalizer inserts s_waitcnt vmcnt(0) before every
buffer store and atomic instruction.

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D39060

llvm-svn: 317754

2017-11-09 01:52:48 +00:00

..

AArch64

[GlobalISel] Enable legalizing non-power-of-2 sized types.

2017-11-07 10:34:34 +00:00

AMDGPU

AMDGPU: Lower buffer store and atomic intrinsics manually

2017-11-09 01:52:48 +00:00

ARC

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ARM

[GlobalISel] Enable legalizing non-power-of-2 sized types.

2017-11-07 10:34:34 +00:00

AVR

[AVR] Fix the select-mbb-placement-bug.ll

2017-10-20 04:17:14 +00:00

BPF

bpf: fix bug on silently truncating 64-bit immediate

2017-10-16 04:14:53 +00:00

Generic

Add an @llvm.sideeffect intrinsic

2017-11-08 21:59:51 +00:00

Hexagon

[Hexagon] Prefer L2_loadrub_io over L4_loadrub_rr

2017-11-02 21:56:59 +00:00

Inputs

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Lanai

MIR: Print the register class or bank in vreg defs

2017-10-24 18:04:54 +00:00

Mips

[mips] Guard indirect and tailcall pseudo instructions correctly.

2017-11-08 11:13:44 +00:00

MIR

[MIRPrinter] Use %subreg.xxx syntax for subregister index operands

2017-11-06 21:46:06 +00:00

MSP430

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Nios2

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NVPTX

[NVPTX] Implement __nvvm_atom_add_gen_d builtin.

2017-11-07 22:10:54 +00:00

PowerPC

Use new vector insert half-word and byte instructions when we see insertelement on '8 x i16' and '16 x i8' types. Also extended existing lit testcase to cover these cases.

2017-11-07 20:55:43 +00:00

RISCV

[RISCV] Initial support for function calls

2017-11-08 13:41:21 +00:00

SPARC

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SystemZ

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Thumb

[ARM] Dynamic stack alignment for 16-bit Thumb

2017-10-22 11:56:35 +00:00

Thumb2

[ARM] Honor -mfloat-abi for libcall calling convention

2017-10-26 21:42:32 +00:00

WebAssembly

[WebAssembly] Add a test for inline-asm "m" constraints.

2017-11-08 19:37:24 +00:00

WinEH

Make x86 __ehhandler comdat if parent function is

2017-10-20 17:04:43 +00:00

X86

[X86] Make sure we don't read too many operands from X86ISD::FMADDS1/FMADDS3 nodes when doing FNEG combine.

2017-11-09 01:06:47 +00:00

XCore

[MC] Suppress .Lcfi labels when emitting textual assembly

2017-10-10 00:57:36 +00:00