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Roman Lebedev 676594305a [CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case) 
Summary:
This implements an optimization described in Hacker's Delight 10-17:
when `C` is constant, the result of `X % C == 0` can be computed
more cheaply without actually calculating the remainder.
The motivation is discussed here: https://bugs.llvm.org/show_bug.cgi?id=35479.

One huge caveat: this signed case is only valid for positive divisors.

While we can freely negate negative divisors, we can't negate `INT_MIN`,
so for now if `INT_MIN` is encountered, we bailout.
As a follow-up, it should be possible to handle that more gracefully
via extra `and`+`setcc`+`select`.

This passes llvm's test-suite, and from cursory(!) cross-examination
the folds (the assembly) match those of GCC, and manual checking via alive
did not reveal any issues (other than the `INT_MIN` case)

Reviewers: RKSimon, spatel, hermord, craig.topper, xbolva00

Reviewed By: RKSimon, xbolva00

Subscribers: xbolva00, thakis, javed.absar, hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65366

llvm-svn: 368702
2019-08-13 14:57:37 +00:00
..
avx512-shuffles
[X86][AVX] Combine vpermi(bitcast(x)) -> bitcast(vpermi(x))
2019-07-03 14:34:16 +00:00
GC
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
GlobalISel
[globalisel] Add G_SEXT_INREG
2019-08-09 21:11:20 +00:00
3addr-16bit.ll
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3addr-or.ll
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3dnow-intrinsics.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
4char-promote.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
…
2011-10-11-SpillDead.ll
…
2011-10-11-srl.ll
…
2011-10-12-MachineCSE.ll
…
2011-10-18-FastISel-VectorParams.ll
…
2011-10-19-LegelizeLoad.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2011-10-19-widen_vselect.ll
…
2011-10-21-widen-cmp.ll
…
2011-10-27-tstore.ll
…
2011-10-30-padd.ll
…
2011-11-07-LegalizeBuildVector.ll
…
2011-11-22-AVX2-Domains.ll
…
2011-11-30-or.ll
…
2011-12-8-bitcastintprom.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2011-12-06-AVXVectorExtractCombine.ll
…
2011-12-06-BitcastVectorGlobal.ll
…
2011-12-08-AVXISelBugs.ll
…
2011-12-15-vec_shift.ll
…
2011-12-26-extractelement-duplicate-load.ll
…
2011-12-28-vselecti8.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2011-20-21-zext-ui2fp.ll
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2012-1-10-buildvector.ll
…
2012-01-10-UndefExceptionEdge.ll
…
2012-01-11-split-cv.ll
…
2012-01-12-extract-sv.ll
…
2012-01-16-mfence-nosse-flags.ll
…
2012-01-18-vbitcast.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2012-02-12-dagco.ll
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2012-02-14-scalar.ll
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2012-02-23-mmx-inlineasm.ll
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2012-02-29-CoalescerBug.ll
…
2012-03-15-build_vector_wl.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2012-03-20-LargeConstantExpr.ll
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2012-03-26-PostRALICMBug.ll
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2012-04-09-TwoAddrPassBug.ll
…
2012-04-26-sdglue.ll
…
2012-05-17-TwoAddressBug.ll
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2012-05-19-CoalescerCrash.ll
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2012-07-10-extload64.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
2012-07-10-shufnorm.ll
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2012-07-15-broadcastfold.ll
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2012-07-15-BuildVectorPromote.ll
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2012-07-15-tconst_shl.ll
…
2012-07-15-vshl.ll
…
2012-07-16-fp2ui-i1.ll
…
2012-07-16-LeaUndef.ll
…
2012-07-17-vtrunc.ll
…
2012-07-23-select_cc.ll
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2012-08-07-CmpISelBug.ll
[TargetLowering] Add SimplifyMultipleUseDemandedBits
2019-07-23 12:39:08 +00:00
2012-08-16-setcc.ll
…
2012-08-17-legalizer-crash.ll
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2012-08-28-UnsafeMathCrash.ll
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2012-09-13-dagco-fneg.ll
…
2012-09-28-CGPBug.ll
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2012-10-02-DAGCycle.ll
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2012-10-03-DAGCycle.ll
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2012-10-18-crash-dagco.ll
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2012-11-28-merge-store-alias.ll
…
2012-12-1-merge-multiple.ll
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2012-12-12-DAGCombineCrash.ll
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2012-12-14-v8fp80-crash.ll
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2012-12-19-NoImplicitFloat.ll
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2013-01-09-DAGCombineBug.ll
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2013-03-13-VEX-DestReg.ll
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2013-05-06-ConactVectorCrash.ll
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2013-10-14-FastISel-incorrect-vreg.ll
…
2014-05-29-factorial.ll
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2014-08-29-CompactUnwind.ll
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9601.ll
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20090313-signext.ll
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abi-isel.ll
[X86] Fix linux32 pic tests to use correct relocation model (PR39684)
2019-01-29 10:41:48 +00:00
absolute-bit-mask-fastisel.ll
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absolute-bit-mask.ll
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absolute-bt.ll
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absolute-cmp.ll
X86: Introduce relocImm-based patterns for cmp.
2017-02-09 22:02:28 +00:00
absolute-constant.ll
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absolute-rotate.ll
…
add32ri8.ll
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add_shl_constant.ll
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add-ext.ll
…
add-i64.ll
…
add-of-carry.ll
[DAGCombiner] Don't combine (addcarry (uaddo X, Y), 0, Carry) -> (addcarry X, Y, Carry) if the Carry comes from the uaddo.
2019-07-04 18:18:46 +00:00
add-sub-nsw-nuw.ll
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add.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
addcarry2.ll
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addcarry.ll
[DAGCombiner] fold (addcarry (xor a, -1), b, c) -> (subcarry b, a, !c) and flip carry.
2019-07-16 15:17:00 +00:00
addr-label-difference.ll
Convert all tests using TCL-style quoting to use shell-style quoting.
2012-07-02 12:47:22 +00:00
addr-mode-matcher-2.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
addr-mode-matcher.ll
…
addr-of-ret-addr.ll
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address-type-promotion-constantexpr.ll
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addrsig.ll
…
addsub-constant-folding.ll
[NFC][Codegen] Add/sub constant-folding: add scalar tests too
2019-05-31 08:23:48 +00:00
adx-commute.mir
…
adx-intrinsics-upgrade.ll
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adx-intrinsics.ll
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aes_intrinsics.ll
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alias-gep.ll
…
alias-static-alloca.ll
[X86] Regenerate alias-static-alloca test checks to make D65354 diff easier
2019-07-31 12:27:47 +00:00
aliases.ll
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aligned-comm.ll
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aligned-variadic.ll
[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.
2019-03-13 17:07:09 +00:00
alignment-2.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
alignment.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
all-ones-vector.ll
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alldiv-divdi3.ll
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alloca-align-rounding-32.ll
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alloca-align-rounding.ll
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alloca-overaligned.ll
[Tests] Add a test showing how we handle overaligned allocas w/ no-realign-stack
2019-07-18 00:26:03 +00:00
allrem-moddi3.ll
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and-encoding.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
and-load-fold.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
and-or-fold.ll
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and-sink.ll
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and-su.ll
…
andimm8.ll
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anyext.ll
…
anyregcc-crash.ll
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anyregcc.ll
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apm.ll
…
AppendingLinkage.ll
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arg_returned_bitcast.ll
[SelectionDAG][FIX] Allow "returned" arguments to be bit-casted
2019-06-04 20:34:43 +00:00
arg-cast.ll
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arg-copy-elide-win64.ll
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arg-copy-elide.ll
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asm-block-labels.ll
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asm-global-imm.ll
…
asm-indirect-mem.ll
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asm-invalid-register-class-crasher.ll
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asm-label2.ll
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asm-label.ll
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asm-mismatched-types.ll
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asm-modifier-P.ll
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asm-modifier.ll
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
2013-07-13 20:38:47 +00:00
asm-reg-type-mismatch-avx512.ll
[X86] Add test case that was supposed to go with r360102.
2019-05-24 04:46:56 +00:00
asm-reg-type-mismatch.ll
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asm-reject-reg-type-mismatch.ll
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asm-reject-rex.ll
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asm-reject-vk32-vk64.ll
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asm-reject-xmm16.ll
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atom-call-reg-indirect-foldedreload32.ll
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atom-call-reg-indirect-foldedreload64.ll
…
atom-call-reg-indirect.ll
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atom-cmpb.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atom-fixup-lea1.ll
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atom-fixup-lea2.ll
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atom-fixup-lea3.ll
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atom-fixup-lea4.ll
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atom-lea-addw-bug.ll
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atom-lea-sp.ll
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atom-pad-short-functions.ll
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atom-sched.ll
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atom-shuf.ll
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atomic8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
atomic16.ll
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atomic32.ll
Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block"
2019-05-03 19:06:57 +00:00
atomic64.ll
Reapply r359906, "RegAllocFast: Add heuristic to detect values not live-out of a block"
2019-05-03 19:06:57 +00:00
atomic128.ll
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atomic6432.ll
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atomic-add.ll
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atomic-dagsched.ll
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atomic-eflags-reuse.ll
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atomic-flags.ll
x86: preserve flags when folding atomic operations
2015-10-15 18:24:52 +00:00
atomic-fp.ll
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atomic-idempotent.ll
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atomic-load-store-wide.ll
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atomic-load-store.ll
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atomic-mi.ll
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atomic-minmax-i6432.ll
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atomic-monotonic.ll
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atomic-non-integer.ll
[X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets
2019-05-14 04:43:37 +00:00
atomic-op.ll
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atomic-ops-ancient-64.ll
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atomic-or.ll
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atomic-pointer.ll
IR: Support parsing numeric block ids, and emit them in textual output.
2019-03-22 18:27:13 +00:00
atomic-unordered.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
atomicf128.ll
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Atomics-64.ll
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attribute-sections.ll
Be nice to Xcore and the XMOS assembler and avoid quoting section names
2011-03-04 20:03:14 +00:00
avg-mask.ll
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avg.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avoid_complex_am.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
avoid-lea-scale2.ll
test/CodeGen/X86: FileCheck-ize and add actions for x86_64-linux and x86_64-win32.
2011-03-16 13:53:07 +00:00
avoid-loop-align-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
avoid-loop-align.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
avoid-sfb-g-no-change2.mir
[X86] Avoid SFB - Fix inconsistent codegen with/without debug info(2)
2019-07-01 18:28:21 +00:00
avoid-sfb-g-no-change3.mir
[X86] Avoid SFB - Fix inconsistent codegen with/without debug info(2)
2019-07-01 18:28:21 +00:00
avoid-sfb-g-no-change.mir
Resubmit r360436 "[X86] Avoid SFB - Fix inconsistent codegen with/without debug info"
2019-05-23 18:15:12 +00:00
avoid-sfb-kill-flags.mir
[X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153
2018-04-26 13:16:11 +00:00
avoid-sfb-offset.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
avoid-sfb-overlaps.ll
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avoid-sfb.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
avx1-logical-load-folding.ll
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avx2-arith.ll
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avx2-cmp.ll
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avx2-conversions.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx2-fma-fneg-combine.ll
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avx2-gather.ll
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avx2-intrinsics-canonical.ll
[X86] Regenerate tests. NFCI.
2019-07-10 17:22:31 +00:00
avx2-intrinsics-fast-isel.ll
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avx2-intrinsics-x86-upgrade.ll
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avx2-intrinsics-x86.ll
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avx2-logic.ll
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avx2-masked-gather.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx2-nontemporal.ll
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avx2-phaddsub.ll
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avx2-pmovxrm.ll
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avx2-shift.ll
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avx2-vbroadcast.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx2-vbroadcasti128.ll
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avx2-vector-shifts.ll
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avx2-vperm.ll
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avx512-adc-sbb.ll
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avx512-any_extend_load.ll
[X86] Remove some code from combineShuffle that seems largely unnecessary with widening legalization.
2019-08-11 02:08:38 +00:00
avx512-arith.ll
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avx512-bugfix-23634.ll
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avx512-bugfix-25270.ll
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avx512-bugfix-26264.ll
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avx512-build-vector.ll
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avx512-calling-conv.ll
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avx512-cmp-kor-sequence.ll
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avx512-cmp.ll
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avx512-cvt.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-cvttp2i.ll
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avx512-ext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-extract-subvector-load-store.ll
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avx512-extract-subvector.ll
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avx512-fma-commute.ll
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avx512-fma-intrinsics-upgrade.ll
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avx512-fma-intrinsics.ll
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avx512-fma.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
avx512-fsel.ll
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avx512-gather-scatter-intrin-deprecated.ll
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avx512-gather-scatter-intrin.ll
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avx512-gfni-intrinsics.ll
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avx512-hadd-hsub.ll
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avx512-i1test.ll
…
avx512-inc-dec.ll
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avx512-insert-extract_i1.ll
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avx512-insert-extract.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
avx512-intel-ocl.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
avx512-intrinsics-canonical.ll
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avx512-intrinsics-fast-isel.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (reapplied)
2019-08-13 10:51:39 +00:00
avx512-intrinsics-upgrade.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-intrinsics-x86_64.ll
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avx512-intrinsics.ll
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avx512-load-store.ll
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avx512-load-trunc-store-i1.ll
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avx512-logic.ll
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avx512-mask-op.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-mask-spills.ll
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avx512-mask-zext-bugfix.ll
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avx512-masked_memop-16-8.ll
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches.
2019-07-31 22:58:15 +00:00
avx512-masked-memop-64-32.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
avx512-memfold.ll
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avx512-mov.ll
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avx512-nontemporal.ll
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avx512-pmovxrm.ll
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avx512-regcall-Mask.ll
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avx512-regcall-NoMask.ll
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avx512-rndscale.ll
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avx512-rotate.ll
…
avx512-scalar_mask.ll
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avx512-scalar.ll
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avx512-scalarIntrinsics.ll
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avx512-select.ll
[x86] remove whitespace; NFC
2019-06-27 20:37:12 +00:00
avx512-shift.ll
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avx512-skx-insert-subvec.ll
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avx512-trunc.ll
[X86] Allow combineTruncateWithSat to use pack instructions for i16->i8 without AVX512BW.
2019-08-12 22:18:23 +00:00
avx512-unsafe-fp-math.ll
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avx512-vbroadcast.ll
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avx512-vbroadcasti128.ll
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avx512-vbroadcasti256.ll
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avx512-vec3-crash.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-vec-cmp.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512-vpclmulqdq.ll
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avx512-vpermv3-commute.ll
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avx512-vpternlog-commute.ll
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avx512-vselect-crash.ll
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avx512-vselect.ll
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avx512bf16-intrinsics.ll
[X86] Regenerate intrinsics tests. NFCI.
2019-07-11 10:40:23 +00:00
avx512bf16-vl-intrinsics.ll
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avx512bw-arith.ll
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avx512bw-intrinsics-canonical.ll
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avx512bw-intrinsics-fast-isel.ll
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avx512bw-intrinsics-upgrade.ll
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avx512bw-intrinsics.ll
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avx512bw-mask-op.ll
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avx512bw-mov.ll
…
avx512bw-vec-cmp.ll
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avx512bw-vec-test-testn.ll
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avx512bwvl-arith.ll
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avx512bwvl-intrinsics-canonical.ll
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avx512bwvl-intrinsics-fast-isel.ll
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avx512bwvl-intrinsics-upgrade.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512bwvl-intrinsics.ll
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avx512bwvl-mov.ll
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avx512bwvl-vec-cmp.ll
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avx512bwvl-vec-test-testn.ll
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avx512cd-intrinsics-fast-isel.ll
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avx512cd-intrinsics-upgrade.ll
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avx512cd-intrinsics.ll
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avx512cdvl-intrinsics-upgrade.ll
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avx512cdvl-intrinsics.ll
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avx512dq-intrinsics-fast-isel.ll
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avx512dq-intrinsics-upgrade.ll
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avx512dq-intrinsics.ll
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avx512dq-mask-op.ll
…
avx512dqvl-intrinsics-fast-isel.ll
…
avx512dqvl-intrinsics-upgrade.ll
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avx512dqvl-intrinsics.ll
[X86] Correct v4f32->v2i64 cvt(t)ps2(u)qq memory isel patterns
2019-07-01 19:01:37 +00:00
avx512er-intrinsics.ll
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avx512f-256-set0.mir
[X86] Fix machineverifier error on avx512f-256-set0.mir
2019-05-29 17:02:27 +00:00
avx512f-vec-test-testn.ll
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avx512ifma-intrinsics-fast-isel.ll
…
avx512ifma-intrinsics-upgrade.ll
…
avx512ifma-intrinsics.ll
…
avx512ifmavl-intrinsics-fast-isel.ll
…
avx512ifmavl-intrinsics-upgrade.ll
…
avx512ifmavl-intrinsics.ll
…
avx512vbmi2-intrinsics-fast-isel.ll
…
avx512vbmi2-intrinsics-upgrade.ll
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avx512vbmi2-intrinsics.ll
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avx512vbmi2vl-intrinsics-fast-isel.ll
…
avx512vbmi2vl-intrinsics-upgrade.ll
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avx512vbmi2vl-intrinsics.ll
…
avx512vbmi-intrinsics-fast-isel.ll
…
avx512vbmi-intrinsics-upgrade.ll
…
avx512vbmi-intrinsics.ll
…
avx512vbmivl-intrinsics-fast-isel.ll
…
avx512vbmivl-intrinsics-upgrade.ll
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avx512vbmivl-intrinsics.ll
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avx512vl_vnni-intrinsics-upgrade.ll
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avx512vl_vnni-intrinsics.ll
…
avx512vl-arith.ll
…
avx512vl-intrinsics-canonical.ll
…
avx512vl-intrinsics-fast-isel.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512vl-intrinsics-upgrade.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx512vl-intrinsics.ll
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avx512vl-logic.ll
…
avx512vl-mov.ll
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avx512vl-nontemporal.ll
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avx512vl-vbroadcast.ll
…
avx512vl-vec-cmp.ll
…
avx512vl-vec-masked-cmp.ll
…
avx512vl-vec-test-testn.ll
…
avx512vl-vpclmulqdq.ll
…
avx512vlcd-intrinsics-fast-isel.ll
…
avx512vlvp2intersect-intrinsics.ll
[X86] Regenerate intrinsics tests. NFCI.
2019-07-11 10:40:23 +00:00
avx512vnni-intrinsics-upgrade.ll
…
avx512vnni-intrinsics.ll
…
avx512vp2intersect-intrinsics.ll
[X86] Regenerate intrinsics tests. NFCI.
2019-07-11 10:40:23 +00:00
avx512vpopcntdq-intrinsics.ll
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avx-arith.ll
…
avx-basic.ll
[X86] Force floating point values in constant pool decoding to print in scientific notation so they can't be confused with integers.
2018-10-29 04:52:04 +00:00
avx-bitcast.ll
…
avx-brcond.ll
…
avx-cast.ll
…
avx-cmp.ll
…
avx-cvt-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx-cvt-3.ll
…
avx-cvt.ll
…
avx-cvttp2si.ll
…
avx-fp2int.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
avx-gfni-intrinsics.ll
…
avx-insertelt.ll
…
avx-intel-ocl.ll
…
avx-intrinsics-fast-isel.ll
…
avx-intrinsics-x86_64.ll
…
avx-intrinsics-x86-upgrade.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
avx-intrinsics-x86.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
avx-isa-check.ll
…
avx-load-store.ll
[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)
2019-06-21 19:10:21 +00:00
avx-logic.ll
…
avx-minmax.ll
…
avx-select.ll
…
avx-shift.ll
…
avx-shuffle-x86_32.ll
…
avx-splat.ll
…
avx-trunc.ll
…
avx-unpack.ll
…
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
…
avx-vbroadcastf128.ll
…
avx-vextractf128.ll
…
avx-vinsertf128.ll
…
avx-vpclmulqdq.ll
…
avx-vperm2x128.ll
…
avx-vzeroupper.ll
…
avx-win64-args.ll
…
avx-win64.ll
…
avx.ll
…
backpropmask.ll
[x86] restore test comment; NFC
2018-06-08 13:53:13 +00:00
bad-tls-fold.mir
…
barrier-sse.ll
…
barrier.ll
…
base-pointer-and-cmpxchg.ll
…
basic-promote-integers.ll
…
bb_rotate.ll
…
bc-extract.ll
…
bigstructret2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bigstructret.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bit-piece-comment.ll
…
bit-test-shift.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
bitcast2.ll
…
bitcast-and-setcc-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bitcast-and-setcc-256.ll
[X86][AVX] combineBitcastvxi1 - peek through bitops to determine size of original vector
2019-05-26 10:54:23 +00:00
bitcast-and-setcc-512.ll
…
bitcast-i256.ll
…
bitcast-int-to-vector-bool-sext.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
bitcast-int-to-vector-bool-zext.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
bitcast-int-to-vector-bool.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
bitcast-int-to-vector.ll
…
bitcast-mmx.ll
…
bitcast-setcc-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bitcast-setcc-256.ll
…
bitcast-setcc-512.ll
[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles
2019-06-26 09:50:11 +00:00
bitcast-vector-bool.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::TRUNCATE
2019-08-12 10:56:05 +00:00
bitcast.ll
…
bitcnt-false-dep.ll
…
bitreverse.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
block-placement.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
block-placement.mir
…
bmi2-x86_64.ll
…
bmi2.ll
…
bmi-intrinsics-fast-isel-x86_64.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
bmi-intrinsics-fast-isel.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
bmi-x86_64.ll
…
bmi.ll
[X86] Add patterns with and_flag_nocf for BLSI and TBM instructions.
2019-07-10 22:44:32 +00:00
bool-ext-inc.ll
…
bool-math.ll
[X86] Enable 8-bit OR with disjoint bits to convert to LEA
2019-03-05 18:37:33 +00:00
bool-simplify.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
bool-vector.ll
[X86][SSE] Extract i1 elements from vXi1 bool vectors
2019-05-01 10:02:22 +00:00
bool-zext.ll
…
br-fold.ll
…
branchfolding-catchpads.ll
…
branchfolding-debugloc.ll
…
branchfolding-landingpads.ll
…
branchfolding-undef.mir
…
brcond.ll
…
break-anti-dependencies.ll
…
break-false-dep.ll
…
broadcast-elm-cross-splat-vec.ll
…
broadcastm-lowering.ll
…
bss_pagealigned.ll
…
bswap_tree2.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
bswap_tree.ll
…
bswap-inline-asm.ll
…
bswap-rotate.ll
…
bswap-vector.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
bswap-wide-int.ll
…
bswap.ll
…
bt.ll
…
btc_bts_btr.ll
…
btq.ll
…
bug26810.ll
…
bug37521.ll
…
build-vector-128.ll
…
build-vector-256.ll
…
build-vector-512.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
buildvec-extract.ll
…
buildvec-insertvec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
bypass-slow-division-32.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
bypass-slow-division-64.ll
…
bypass-slow-division-tune.ll
…
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval-align.ll
…
byval-callee-cleanup.ll
…
byval.ll
…
cache-intrinsic.ll
…
call-imm.ll
…
call-push.ll
…
call-site-info-output.ll
[ISEL][X86] Tracking of registers that forward call arguments
2019-06-27 10:51:15 +00:00
callbr-asm-bb-exports.ll
[X86] Add test case for r361177.
2019-05-20 17:37:52 +00:00
callbr-asm-blockplacement.ll
…
callbr-asm-branch-folding.ll
…
callbr-asm-destinations.ll
…
callbr-asm-errors.ll
Implementation of asm-goto support in LLVM
2019-02-08 20:48:56 +00:00
callbr-asm-label-addr.ll
[MC] Don't recreate a label if it's already used
2019-08-09 20:16:31 +00:00
callbr-asm-obj-file.ll
[CodeGen] Require a name for a block addr target
2019-08-09 20:18:30 +00:00
callbr-asm-outputs.ll
…
callbr-asm.ll
[MC] Don't recreate a label if it's already used
2019-08-09 20:16:31 +00:00
cas.ll
…
cast-vsel.ll
[x86] split 256-bit vector selects if operands are vector concats
2019-06-16 14:04:49 +00:00
catch.ll
Align stubs for external and common global variables to pointer size.
2018-04-02 23:20:30 +00:00
catchpad-dynamic-alloca.ll
…
catchpad-lifetime.ll
…
catchpad-realign-savexmm.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
catchpad-regmask.ll
…
catchpad-reuse.ll
…
catchpad-weight.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
catchret-empty-fallthrough.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
catchret-fallthrough.ll
…
catchret-regmask.ll
…
cfi-inserter-cfg-with-merge.mir
…
cfi-inserter-check-order.ll
…
cfi-inserter-noreturnblock.mir
…
cfi-inserter-verify-inconsistent-offset.mir
…
cfi-inserter-verify-inconsistent-register.mir
…
cfi-xmm.ll
…
cfi.ll
…
cfstring.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
cgp-usubo.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
chain_order.ll
…
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
…
change-compare-stride-trickiness-1.ll
…
change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
…
cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
…
cleanuppad-realign.ll
…
clear_upper_vector_element_bits.ll
[X86] EltsFromConsecutiveLoads - support common source loads (REAPPLIED)
2019-07-22 12:44:10 +00:00
clear-highbits.ll
…
clear-lowbits.ll
…
clflushopt.ll
…
clwb.ll
…
clz.ll
…
clzero.ll
[X86] Remove CustomInserter pseudos for MONITOR/MONITORX/CLZERO. Use custom instruction selection instead.
2019-04-03 23:28:30 +00:00
cmov-double.ll
…
cmov-fp.ll
…
cmov-into-branch.ll
…
cmov-promotion.ll
Teach the DAGCombine to fold this pattern(c1 and c2 is constant).
2019-06-26 05:12:53 +00:00
cmov.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
cmovcmov.ll
…
cmp-fast-isel.ll
Use the i8 immediate cmp instructions when possible.
2015-03-16 14:25:08 +00:00
cmp.ll
[X86] When promoting i16 compare with immediate to i32, try to use sign_extend for eq/ne if the input is truncated from a type with enough sign its.
2019-06-10 04:50:12 +00:00
cmpxchg8b_alloca_regalloc_handling.ll
…
cmpxchg8b.ll
[X86] Make CMPXCHG16B feature imply CMPXCHG8B feature.
2019-08-08 18:11:17 +00:00
cmpxchg16b.ll
…
cmpxchg-clobber-flags.ll
…
cmpxchg-i1.ll
…
cmpxchg-i128-i1.ll
…
coal-sections.ll
…
coalesce_commute_movsd.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
coalesce_commute_subreg.ll
…
coalesce-dbg-value-subreg-rewrite.mir
…
coalesce-dead-lanes.mir
…
coalesce-esp.ll
…
coalesce-implicitdef.ll
…
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-cross.ll
…
coalescer-dce2.ll
…
coalescer-dce.ll
…
coalescer-identity.ll
…
coalescer-remat.ll
…
coalescer-subreg.ll
…
coalescer-win64.ll
…
code_placement_align_all.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
code_placement_cold_loop_blocks.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
code_placement_eh.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
code_placement_ignore_succ_in_inner_loop.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
code_placement_loop_rotation2.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
code_placement_loop_rotation3.ll
[llvm] Remove redundant --check-prefix=CHECK from tests
2016-10-24 18:57:55 +00:00
code_placement_loop_rotation.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
code_placement_no_header_change.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
code_placement.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
code-model-elf-memset.ll
Bias physical register immediate assignments
2018-11-14 21:11:53 +00:00
code-model-elf.ll
[X86] Fix tls variable lowering issue with large code model
2019-02-24 19:33:37 +00:00
code-model-kernel.ll
Restore correct x86_64 EH encodings in kernel code model
2018-08-13 06:06:53 +00:00
codegen-prepare-addrmode-sext.ll
…
codegen-prepare-cast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
codegen-prepare-crash.ll
…
codegen-prepare-extload.ll
[CodeGenPrep]Restructure promoting Ext to form ExtLoad
2017-03-17 19:05:21 +00:00
codegen-prepare-replacephi.mir
…
codegen-prepare-uaddo.ll
…
codegen-prepare.ll
Turn on -addr-sink-using-gep by default.
2017-04-06 22:42:18 +00:00
codemodel.ll
[X86] Use PC-relative mode for the kernel code model
2019-04-13 21:39:28 +00:00
coff-comdat2.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
coff-comdat3.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
coff-comdat.ll
Use .set instead of = when printing assignment in assembly output
2018-03-27 16:44:41 +00:00
coff-feat00.ll
…
coff-no-dead-strip.ll
…
coff-weak.ll
…
coldcc64.ll
Fix test by matching movaps instead of AVX-only vmovaps
2013-02-22 19:53:30 +00:00
combine-64bit-vec-binop.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
combine-abs.ll
…
combine-adc.ll
…
combine-add-ssat.ll
…
combine-add-usat.ll
…
combine-add.ll
[DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y) + C fold. Try 3
2019-05-30 20:36:54 +00:00
combine-addo.ll
…
combine-adx.ll
…
combine-and.ll
…
combine-avx2-intrinsics.ll
…
combine-avx-intrinsics.ll
…
combine-bitreverse.ll
[SelectionDAG] computeKnownBits - support constant pool values from target
2019-05-24 10:03:11 +00:00
combine-bitselect.ll
…
combine-bswap.ll
…
combine-concatvectors.ll
…
combine-fabs.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll"
2019-06-13 19:24:34 +00:00
combine-fcopysign.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
combine-lds.ll
…
combine-mul.ll
[DAGCombine] visitMUL - allow shift by zero in MulByConstant.
2019-06-24 12:47:17 +00:00
combine-mulo.ll
…
combine-multiplies.ll
…
combine-or.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
combine-pmuldq.ll
[TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ANY_EXTEND_VECTOR_INREG
2019-06-25 12:57:43 +00:00
combine-rotates.ll
…
combine-sbb.ll
[x86] try harder to form LEA from ADD to avoid flag conflicts (PR40483)
2019-07-18 12:48:01 +00:00
combine-sdiv.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
combine-select.ll
…
combine-sext-in-reg.ll
…
combine-shl.ll
[DAGCombiner] Support (shl (zext (srl x, C)), C) -> (zext (shl (srl x, C), C)) non-uniform folds.
2019-06-20 14:42:27 +00:00
combine-smax.ll
…
combine-smin.ll
…
combine-sra.ll
…
combine-srem.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
combine-srl.ll
…
combine-sse41-intrinsics.ll
[X86][SSE] Swap X86ISD::BLENDV inputs with an inverted selection mask (PR42825)
2019-08-09 12:44:20 +00:00
combine-sub-ssat.ll
…
combine-sub-usat.ll
…
combine-sub.ll
…
combine-subo.ll
…
combine-testm-and.ll
…
combine-udiv.ll
[TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
2019-06-27 14:25:54 +00:00
combine-umax.ll
…
combine-umin.ll
…
combine-urem.ll
…
commandline-metadata.ll
Implement -frecord-command-line (-frecord-gcc-switches)
2018-12-14 15:38:15 +00:00
commute-3dnow.ll
…
commute-blend-avx2.ll
…
commute-blend-sse41.ll
…
commute-clmul.ll
…
commute-fcmp.ll
…
commute-intrinsic.ll
…
commute-two-addr.ll
…
commute-vpclmulqdq-avx512.ll
…
commute-vpclmulqdq-avx.ll
…
commute-xop.ll
…
commuted-blend-mask.ll
…
compact-unwind.ll
…
compare_folding.ll
…
compare-add.ll
…
compare-global.ll
…
compare-inf.ll
…
compiler_used.ll
…
complex-asm.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
complex-fastmath.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
complex-fca.ll
…
computeKnownBits_urem.ll
…
condbr_if.ll
…
condbr_switch.ll
…
conditional-indecrement.ll
…
conditional-tailcall-samedest.mir
…
conditional-tailcall.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
consecutive-load-shuffle.ll
…
const-base-addr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
const-shift-of-constmasked.ll
…
constant-combines.ll
…
constant-hoisting-and.ll
…
constant-hoisting-bfi.ll
…
constant-hoisting-cmp.ll
…
constant-hoisting-optnone.ll
…
constant-hoisting-shift-immediate.ll
…
constant-pool-remat-0.ll
…
constant-pool-sharing.ll
…
constpool.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
constrained-fp80-trunc-ext.ll
[FPEnv] Lower STRICT_FP_EXTEND and STRICT_FP_ROUND nodes in preprocess phase of ISelLowering to mirror non-strict nodes on x86.
2019-06-14 16:28:55 +00:00
constructor.ll
[COFF] Implement constructor priorities
2017-11-28 08:07:18 +00:00
convert-2-addr-3-addr-inc64.ll
…
copy-eflags.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
copy-propagation.ll
…
copysign-constant-magnitude.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
cpus-amd-no-x86_64.ll
…
cpus-amd.ll
…
cpus-intel-no-x86_64.ll
…
cpus-intel.ll
[X86] Support -march=tigerlake
2019-08-12 01:29:46 +00:00
cpus-no-x86_64.ll
…
cpus-other.ll
…
crash-lre-eliminate-dead-def.ll
…
crash-nosse.ll
…
crash-O0.ll
…
crash.ll
…
critical-anti-dep-breaker.ll
…
critical-edge-split-2.ll
…
cse-add-with-overflow.ll
…
cstring.ll
…
ctor-priority-coff.ll
…
ctpop-combine.ll
[SDAG] expand ctpop != 1
2019-06-25 14:46:52 +00:00
cvt16.ll
…
cvtv2f32.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
cxx_tlscc64.ll
…
dag-fmf-cse.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
dag-merge-fast-accesses.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
dag-optnone.ll
…
dag-rauw-cse.ll
…
dag-update-nodetomatch.ll
…
dagcombine-and-setcc.ll
…
dagcombine-buildvector.ll
…
dagcombine-cse.ll
…
dagcombine-select.ll
…
dagcombine-shifts.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
dagcombine-tokenfactor-limit-crash.ll
Recommit r360171: [DAGCombiner] Avoid creating large tokenfactors in visitTokenFactor.
2019-06-03 01:30:19 +00:00
dagcombine-unsafe-math.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
darwin-bzero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
darwin-no-dead-strip.ll
…
darwin-preemption.ll
…
darwin-quote.ll
…
darwin-tls.ll
…
dbg-baseptr.ll
…
dbg-changes-codegen-branch-folding2.mir
…
dbg-changes-codegen-branch-folding.ll
…
dbg-changes-codegen.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dbg-combine.ll
…
dbg-line-0-no-discriminator.ll
…
dbg-value-superreg-copy.mir
…
DbgValueOtherTargets.test
…
debug-loclists.ll
[DWARF v5] Fix DWARF emitter and consumer to produce/expect a uleb for a location description's length.
2019-02-01 17:11:58 +00:00
debug-nodebug-crash.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
debuginfo-locations-dce.ll
…
debugloc-argsize.ll
…
debugloc-no-line-0.ll
…
deopt-bundles.ll
…
deopt-intrinsic-cconv.ll
…
deopt-intrinsic.ll
…
disable-tail-calls.ll
…
discontiguous-loops.ll
…
discriminate-mem-ops-missing-info.ll
…
discriminate-mem-ops-skip-pfetch.ll
…
discriminate-mem-ops.ll
…
div8.ll
…
div-rem-pair-recomposition-signed.ll
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
2019-07-25 16:39:57 +00:00
div-rem-pair-recomposition-unsigned.ll
[NFC][CodeGen][X86][AArch64] div-rem pair reconstruction tests (PR42673)
2019-07-25 16:39:57 +00:00
div-rem-simplify.ll
…
divide-by-constant.ll
…
divide-windows-itanium.ll
…
divrem8_ext.ll
…
divrem.ll
…
dllexport-x86_64.ll
…
dllexport.ll
…
dllimport-x86_64.ll
…
dllimport.ll
…
dollar-name.ll
…
domain-reassignment-implicit-def.ll
…
domain-reassignment-test.ll
…
domain-reassignment.mir
…
dont-trunc-store-double-to-float.ll
…
dropped_constructor.ll
Don't create a comdat group for a dropped def with initializer
2017-01-18 16:58:43 +00:00
dwarf-comp-dir.ll
…
dwarf-eh-prepare.ll
…
dwarf-headers.ll
[DWARFv5] Emit split type units in .debug_info.dwo.
2018-11-12 16:55:11 +00:00
dwarf-split-line-1.ll
…
dwarf-split-line-2.ll
…
dyn_alloca_aligned.ll
…
dyn-stackalloc.ll
…
dynamic-alloca-in-entry.ll
…
dynamic-alloca-lifetime.ll
…
dynamic-allocas-VLAs.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
dynamic-regmask.ll
…
DynamicCalleeSavedRegisters.ll
[X86] Regenerate callee-saved test checks to make D65354 diff easier
2019-07-31 12:29:07 +00:00
early-cfi-sections.ll
…
early-ifcvt-crash.ll
…
early-ifcvt.ll
…
eh_frame.ll
…
eh-frame-unreachable.ll
…
eh-label.ll
…
eh-nolandingpads.ll
…
eh-null-personality.ll
…
eh-unknown.ll
…
eip-addressing-i386.ll
…
element-wise-atomic-memory-intrinsics.ll
…
elf-associated.ll
Revert r367501 "Create unique, but identically-named ELF sections..."
2019-08-07 20:45:23 +00:00
elf-comdat2.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
elf-comdat.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
emit-big-cst.ll
…
empty-function.ll
Re-commit r301040 "X86: Don't emit zero-byte functions on Windows"
2017-04-21 21:48:41 +00:00
empty-functions.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
empty-struct-return-type.ll
…
emutls_generic.ll
…
emutls-pic.ll
…
emutls-pie.ll
…
emutls.ll
…
enqcmd-intrinsics.ll
[X86] Add ENQCMD instructions
2019-05-30 03:59:16 +00:00
epilogue-cfi-fp.ll
…
epilogue-cfi-no-fp.ll
…
epilogue.ll
…
equiv_with_fndef.ll
…
equiv_with_vardef.ll
…
evex-to-vex-compress.mir
[X86] Remove MOVDI2SSrm/MOV64toSDrm/MOVSS2DImr/MOVSDto64mr CodeGenOnly instructions.
2019-06-18 03:23:15 +00:00
exception-label.ll
…
exedeps-movq.ll
…
exedepsfix-broadcast.ll
…
expand-integer-x86_64-intrinsic-error.ll
…
expand-opaque-const.ll
…
expand-post-ra-pseudo.mir
…
expand-vr64-gr64-copy.mir
…
extend-set-cc-uses-dbg.ll
…
extend.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
extended-fma-contraction.ll
…
extern_weak.ll
[COFF] Use COFF stubs for extern_weak functions
2019-05-07 23:06:21 +00:00
extmul64.ll
…
extmul128.ll
…
extract-bits.ll
[X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness
2019-06-26 12:19:47 +00:00
extract-combine.ll
…
extract-concat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
extract-extract.ll
…
extract-fp.ll
[X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax
2019-05-25 16:44:29 +00:00
extract-insert.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
extract-lowbits.ll
[X86] X86DAGToDAGISel::matchBitExtract(): pattern c: truncation awareness
2019-06-26 12:19:47 +00:00
extract-store.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
extractelement-fp.ll
[DAGCombiner] try to move bitcast after extract_subvector
2019-05-12 14:43:20 +00:00
extractelement-from-arg.ll
…
extractelement-index.ll
…
extractelement-legalization-cycle.ll
…
extractelement-legalization-store-ordering.ll
…
extractelement-load.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
extractelement-shuffle.ll
…
extractps.ll
…
f16c-intrinsics-fast-isel.ll
…
f16c-intrinsics.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
fabs.ll
…
fadd-combines.ll
[DAGCombiner] exclude x*2.0 from normal negation profitability rules
2019-08-09 21:37:32 +00:00
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-abort-warm.ll
…
fast-isel-agg-constant.ll
…
fast-isel-args-fail2.ll
Fix the test for r231201. We don't crash anymore.
2015-03-04 02:09:40 +00:00
fast-isel-args-fail.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fast-isel-args.ll
Change the fast-isel-abort option from bool to int to enable "levels"
2015-02-27 18:32:11 +00:00
fast-isel-atomic.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fast-isel-avoid-unnecessary-pic-base.ll
…
fast-isel-bail.ll
…
fast-isel-bc.ll
[X86][MMX] Improve handling of 64-bit MMX constants
2018-03-01 22:22:31 +00:00
fast-isel-bitcasts-avx512.ll
…
fast-isel-bitcasts-avx.ll
…
fast-isel-bitcasts.ll
Reapply r249121 : "[FastISel][x86] Teach how to select SSE2/AVX bitcasts between 128/256-bit vector types."
2015-10-02 16:08:05 +00:00
fast-isel-branch_weights.ll
…
fast-isel-call-bool.ll
…
fast-isel-call-cleanup.ll
…
fast-isel-call.ll
…
fast-isel-cmp-branch2.ll
…
fast-isel-cmp-branch3.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
fast-isel-constant.ll
…
fast-isel-constpool.ll
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
2018-06-28 17:56:43 +00:00
fast-isel-constrain-store-indexreg.ll
…
fast-isel-deadcode.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
fast-isel-divrem-x86-64.ll
…
fast-isel-divrem.ll
…
fast-isel-double-half-convertion.ll
…
fast-isel-emutls.ll
…
fast-isel-expect.ll
…
fast-isel-extract.ll
…
fast-isel-float-half-convertion.ll
…
fast-isel-fneg-kill.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
fast-isel-fneg.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
fast-isel-fold-mem.ll
…
fast-isel-fptrunc-fpext.ll
…
fast-isel-gc-intrinsics.ll
…
fast-isel-gep.ll
…
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-int-float-conversion-x86-64.ll
…
fast-isel-int-float-conversion.ll
[X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing.
2019-05-06 21:39:51 +00:00
fast-isel-load-i1.ll
…
fast-isel-mem.ll
…
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
…
fast-isel-noplt-pic.ll
…
fast-isel-ret-ext.ll
…
fast-isel-select-cmov2.ll
…
fast-isel-select-cmov.ll
…
fast-isel-select-cmp.ll
AsmPrinter: mark the beginning and the end of a function in verbose mode
2017-05-23 21:22:16 +00:00
fast-isel-select-pseudo-cmov.ll
…
fast-isel-select-sse.ll
…
fast-isel-select.ll
RegAllocFast: Improve hinting heuristic
2019-05-16 12:50:39 +00:00
fast-isel-sext-zext.ll
…
fast-isel-sext.ll
…
fast-isel-shift.ll
[X86] Enable 8-bit SHL to convert to LEA
2019-03-05 18:37:41 +00:00
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
[SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARD
2016-04-19 19:40:37 +00:00
fast-isel-store.ll
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
2019-07-11 14:45:03 +00:00
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-trunc-kill-subreg.ll
…
fast-isel-uint-float-conversion-x86-64.ll
…
fast-isel-uint-float-conversion.ll
[X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing.
2019-05-06 21:39:51 +00:00
fast-isel-vecload.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fast-isel-x32.ll
…
fast-isel-x86-64.ll
…
fast-isel-x86.ll
…
fast-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcall-correct-mangling.ll
…
fastcc3struct.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-softfloat.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fastmath-float-half-conversion.ll
[X86] Don't force Nearest-Even rounding for VCVTPS2PH, use MXCSR.
2016-02-02 01:32:50 +00:00
fcmove.ll
…
fcmp-constant.ll
…
fdiv-combine-vec.ll
…
fdiv-combine.ll
adding more fmf propagation for selects plus updated tests
2019-06-15 04:53:51 +00:00
fdiv.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
2019-06-13 19:24:38 +00:00
fentry-insertion.ll
[CodeGen] Remove operands from FENTRY_CALL
2018-10-25 21:12:15 +00:00
field-extract-use-trunc.ll
…
fildll.ll
…
file-directive.ll
…
file-source-filename.ll
…
finite-libcalls.ll
…
fixed-stack-di-mir.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
fixup-bw-copy.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
fixup-bw-copy.mir
…
fixup-bw-inst.ll
…
fixup-bw-inst.mir
…
fixup-lea.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
flags-copy-lowering.mir
…
float-asmprint.ll
IR: Allow vectors of halfs to be ConstantDataVectors
2015-12-08 03:01:16 +00:00
float-conv-elim.ll
…
floor-soft-float.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fltused_function_pointer.ll
Fix emission of _fltused for MSVC.
2019-01-24 18:34:00 +00:00
fltused_math.ll
…
fltused.ll
…
fma4-commute-x86.ll
…
fma4-fneg-combine.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll"
2019-06-13 19:25:03 +00:00
fma4-intrinsics-x86_64-folded-load.ll
…
fma4-intrinsics-x86-upgrade.ll
…
fma4-intrinsics-x86.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll"
2019-06-13 19:24:54 +00:00
fma4-scalar-memfold.ll
…
fma_patterns_wide.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll"
2019-06-13 19:25:09 +00:00
fma_patterns.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll"
2019-06-13 19:25:06 +00:00
fma-commute-x86.ll
…
fma-do-not-commute.ll
…
fma-fneg-combine.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll"
2019-06-13 19:24:41 +00:00
fma-intrinsics-canonical.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll"
2019-06-13 19:24:47 +00:00
fma-intrinsics-fast-isel.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
fma-intrinsics-phi-213-to-231.ll
…
fma-intrinsics-x86-upgrade.ll
…
fma-intrinsics-x86.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll"
2019-06-13 19:24:57 +00:00
fma-phi-213-to-231.ll
…
fma-scalar-combine.ll
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll"
2019-06-13 19:25:00 +00:00
fma-scalar-memfold.ll
…
fma.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
fmaddsub-combine.ll
…
fmaxnum.ll
[X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax
2019-05-25 16:44:29 +00:00
fmf-flags.ll
…
fmf-propagation.ll
Propagate fmf for setcc in SDAG for select folds
2019-06-03 21:53:26 +00:00
fminnum.ll
[X86] Combine fminnum/fmaxnum with non-nan operand to fmin/fmax
2019-05-25 16:44:29 +00:00
fmsubadd-combine.ll
…
fmul-combines.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
fnabs.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll"
2019-06-13 19:25:12 +00:00
fold-add.ll
…
fold-and-shift-x86_64.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call-oper.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-load-binops.ll
[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.
2019-06-11 04:30:53 +00:00
fold-load-unops.ll
[X86] Teach selectScalarSSELoad to not narrow volatile loads.
2019-06-27 05:51:56 +00:00
fold-load-vec.ll
…
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
fold-push.ll
…
fold-rmw-ops.ll
…
fold-sext-trunc.ll
…
fold-tied-op.ll
…
fold-vector-bv-crash.ll
…
fold-vector-sext-crash2.ll
…
fold-vector-sext-crash.ll
…
fold-vector-sext-zext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
fold-vector-shl-crash.ll
…
fold-vector-shuffle-crash.ll
…
fold-vector-trunc-sitofp.ll
…
fold-vex.ll
…
fold-xmm-zero.ll
…
fold-zext-trunc.ll
…
fops-windows-itanium.ll
…
force-align-stack-alloca.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
force-align-stack.ll
Use function attribute "stackrealign" to decide whether stack
2015-09-11 18:54:38 +00:00
fp2sint.ll
…
fp128-calling-conv.ll
…
fp128-cast.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
fp128-compare.ll
…
fp128-extract.ll
…
fp128-g.ll
…
fp128-i128.ll
…
fp128-libcalls.ll
…
fp128-load.ll
…
fp128-select.ll
…
fp128-store.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-arith.ll
…
fp-cvt.ll
…
fp-double-rounding.ll
…
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
…
fp-fast.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
fp-fold.ll
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control
2019-07-31 21:57:28 +00:00
fp-immediate-shorten.ll
…
fp-in-intregs.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
fp-intrinsics.ll
…
fp-load-trunc.ll
…
fp-logic-replace.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
fp-logic.ll
…
fp-select-cmp-and.ll
…
fp-stack-2results.ll
[NFC] This is a test for the commit access.
2019-05-06 08:31:18 +00:00
fp-stack-compare-cmov.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
fp-stack-compare.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
fp-stack-direct-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-O0-crash.ll
…
fp-stack-O0.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
fp-stack-ret.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-retcopy.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack-set-st1.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
fp-stack.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
fp-trunc.ll
…
fp-undef.ll
…
fp-une-cmp.ll
…
fpcmp-soft-fp.ll
…
fpstack-debuginstr-kill.ll
Remove irrelevant references to legacy git repositories from
2019-01-15 16:18:52 +00:00
fptosi-constant.ll
…
frame-base.ll
…
frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
…
frameaddr.ll
…
frameregister.ll
…
frem-msvc32.ll
…
fsgsbase.ll
…
fshl.ll
…
fshr.ll
…
fsxor-alignment.ll
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
2019-06-13 19:25:16 +00:00
ftrunc.ll
…
full-lsr.ll
…
funclet-layout.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
function-alias.ll
Move llvm/test/CodeGen/Generic/function-alias.ll to X86. It is incompatible to PECOFF.
2015-12-04 02:00:12 +00:00
function-subtarget-features-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
function-subtarget-features.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
funnel-shift-rot.ll
…
funnel-shift.ll
…
ga-offset2.ll
…
ga-offset.ll
…
gather-addresses.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
gcc_except_table_functions.ll
Move the personality function from LandingPadInst to Function
2015-06-17 20:52:32 +00:00
gcc_except_table.ll
…
gep-expanded-vector.ll
…
getelementptr.ll
[CGP] Fix GEP issue with out of range APInt constant values not fitting in int64_t
2018-08-13 12:10:09 +00:00
gfni-intrinsics.ll
…
ghc-cc64.ll
…
ghc-cc.ll
…
global-access-pie-copyrelocs.ll
…
global-access-pie.ll
…
global-fill.ll
…
global-sections-comdat.ll
Implement unique sections with an unique ID.
2015-04-04 18:02:01 +00:00
global-sections-tls.ll
…
global-sections.ll
…
gnu-seh-nolpads.ll
…
gpr-to-mask.ll
…
greedy_regalloc_bad_eviction_sequence.ll
…
gs-fold.ll
…
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub-2.ll
…
haddsub-3.ll
…
haddsub-shuf.ll
[X86][AVX] Add broadcast(v4f64 hadd) test
2019-06-13 11:42:32 +00:00
haddsub-undef.ll
…
haddsub.ll
[x86] add tests for reductions that might be better with more horizontal ops; NFC
2019-07-15 16:59:38 +00:00
half.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
handle-move.ll
…
hhvm-cc.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
…
hipe-cc64.ll
…
hipe-cc.ll
…
hipe-prologue.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
2019-07-24 22:57:22 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[Codegen] (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0 fold
2019-07-24 22:57:22 +00:00
hoist-common.ll
…
hoist-invariant-load.ll
…
hoist-spill-lpad.ll
…
hoist-spill.ll
…
horizontal-reduce-smax.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-reduce-smin.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-reduce-umax.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-reduce-umin.ll
[X86][SSE] Enable min/max partial reduction
2019-08-06 11:00:34 +00:00
horizontal-shuffle-demanded.ll
…
horizontal-shuffle.ll
…
huge-stack-offset2.ll
[X86] Emit fewer instructions to allocate >16GB stack frames
2017-03-17 20:25:49 +00:00
huge-stack-offset.ll
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
2015-02-27 19:29:02 +00:00
i1narrowfail.ll
…
i2k.ll
…
i16lshr8pat.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
i64-mem-copy.ll
…
i64-to-float.ll
…
i128-add.ll
[X86] getTargetConstantBitsFromNode - remove unnecessary getZExtValue() (PR42486)
2019-07-02 18:20:38 +00:00
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i128-sdiv.ll
…
i256-add.ll
…
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
…
i686-win-shrink-wrapping.ll
…
iabs.ll
…
icall-branch-funnel.ll
[CodeGen] Make branch funnels pass the machine verifier
2019-07-03 17:16:45 +00:00
icmp-opt.ll
…
ident-metadata.ll
…
ifunc-asm.ll
…
illegal-bitfield-loadstore.ll
…
illegal-insert.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
illegal-vector-args-return.ll
…
immediate_merging64.ll
…
immediate_merging.ll
…
implicit-faultmap.ll
…
implicit-null-check-negative.ll
Fix implicit null check with negative offset
2017-10-17 11:47:36 +00:00
implicit-null-check.ll
[ImplicitNullChecks] Support unordered atomic accesses
2019-03-13 03:25:20 +00:00
implicit-null-checks.mir
…
implicit-null-chk-reg-rewrite.mir
…
implicit-use-spill.mir
…
imul-lea-2.ll
…
imul-lea.ll
…
imul.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
inalloca-ctor.ll
…
inalloca-invoke.ll
…
inalloca-regparm.ll
…
inalloca-stdcall.ll
…
inalloca.ll
…
inc-of-add.ll
[NFC][Codegen][X86][AArch64][ARM][PowerPC] Recommit: Add test coverage for "add-of-inc" vs "sub-of-not"
2019-07-02 16:48:49 +00:00
inconsistent_landingpad.ll
…
indirect-branch-tracking-r2.ll
[X86] [CET] Deal with return-twice function such as vfork, setjmp when
2019-05-22 00:50:21 +00:00
indirect-branch-tracking.ll
…
indirect-hidden.ll
…
init-priority.ll
[IR] Disallow llvm.global_ctors and llvm.global_dtors of the 2-field form in textual format
2019-05-15 02:35:32 +00:00
inline-0bh.ll
…
inline-asm-2addr.ll
Specify triple so 'make check' passes on darwin x86-64
2015-12-28 18:28:44 +00:00
inline-asm-A-constraint.ll
…
inline-asm-avx512f-v-constraint.ll
…
inline-asm-avx512f-x-constraint.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
inline-asm-avx512vl-v-constraint-32bit.ll
…
inline-asm-avx512vl-v-constraint.ll
…
inline-asm-avx-v-constraint-32bit.ll
…
inline-asm-avx-v-constraint.ll
…
inline-asm-bad-constraint-n.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-bad-modifier.ll
…
inline-asm-default-clobbers.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
inline-asm-duplicated-constraint.ll
…
inline-asm-e-constraint.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-error.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-flag-clobber.ll
…
inline-asm-flag-output.ll
…
inline-asm-fpstack.ll
[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion
2019-02-15 21:59:33 +00:00
inline-asm-h.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-imm-out-of-range.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-modifier-c.ll
[AsmPrinter] refactor to support %c w/ GlobalAddress'
2019-04-26 18:45:04 +00:00
inline-asm-modifier-n.ll
…
inline-asm-modifier-q.ll
…
inline-asm-modifier-V.ll
…
inline-asm-mrv.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-n-constraint.ll
Emit diagnostic if an inline asm constraint requires an immediate
2019-08-03 05:52:47 +00:00
inline-asm-out-regs.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
…
inline-asm-R-constraint.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
inline-asm-stack-realign3.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-asm-stack-realign.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
inline-asm-tied.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
inline-sse.ll
…
inlineasm-sched-bug.ll
Stricter check for the memory access.
2019-07-27 18:57:59 +00:00
inreg.ll
…
ins_split_regalloc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insert-into-constant-vector.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
insert-loaded-scalar.ll
…
insert-positions.ll
…
insert-prefetch-inline.afdo
Revert "Revert r347596 "Support for inserting profile-directed cache prefetches""
2018-11-30 01:01:52 +00:00
insert-prefetch-inline.ll
[llvm] Opt-in flag for X86DiscriminateMemOps
2019-01-25 21:49:54 +00:00
insert-prefetch-invalid-instr.afdo
…
insert-prefetch-invalid-instr.ll
…
insert-prefetch-other.afdo
…
insert-prefetch.afdo
Revert "Revert r347596 "Support for inserting profile-directed cache prefetches""
2018-11-30 01:01:52 +00:00
insert-prefetch.ll
[llvm] Opt-in flag for X86DiscriminateMemOps
2019-01-25 21:49:54 +00:00
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
…
insertelement-ones.ll
[X86] Remove patterns from MOVLPSmr and MOVHPSmr instructions.
2019-07-06 17:59:51 +00:00
insertelement-shuffle.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
insertelement-var-index.ll
…
insertelement-zero.ll
…
insertps-combine.ll
[X86] XFormVExtractWithShuffleIntoLoad - handle shuffle mask scaling
2019-08-13 11:11:42 +00:00
insertps-from-constantpool.ll
…
insertps-O0-bug.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
insertps-unfold-load-bug.ll
…
instr-symbols.mir
…
int-intrinsic.ll
…
intersect-fma-fmf.ll
…
interval-update-remat.ll
…
invalid-liveness.mir
…
invalid-shift-immediate.ll
…
invpcid-intrinsic.ll
…
ipra-inline-asm.ll
RegUsageInfoCollector: Skip AMDGPU entry point functions
2019-07-05 23:33:43 +00:00
ipra-local-linkage.ll
…
ipra-reg-alias.ll
…
ipra-reg-usage.ll
RegUsageInfoCollector: Skip AMDGPU entry point functions
2019-07-05 23:33:43 +00:00
ipra-transform.ll
Move CodeGen test from Generic to X86 specific directory
2016-06-10 19:14:01 +00:00
is-constant.ll
…
isel-optnone.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
jump_sign.ll
[X86] Merge negated ISD::SUB nodes into X86ISD::SUB equivalent (PR40483)
2019-07-11 15:56:33 +00:00
known-bits-vector.ll
[x86] try to keep FP casted+truncated+extracted vector element out of GPRs
2019-07-15 18:17:23 +00:00
known-bits.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
known-signbits-vector.ll
[x86] try to keep FP casted+truncated+extracted vector element out of GPRs
2019-07-15 18:17:23 +00:00
kshift.ll
[X86][SSE] X86TargetLowering::isCommutativeBinOp - add PCMPEQ
2019-06-26 14:40:49 +00:00
label-annotation.ll
…
label-heapallocsite.ll
Recommit "[MS] Emit S_HEAPALLOCSITE debug info in Selection DAG"
2019-08-07 22:49:40 +00:00
label-redefinition.ll
…
lack-of-signed-truncation-check.ll
…
lakemont.ll
…
large-code-model-isel.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
large-constants.ll
…
large-gep-chain.ll
…
large-gep-scale.ll
…
large-global.ll
…
large-pic-string.ll
[ELF] Fix large code model MIR verifier errors
2018-10-24 22:57:28 +00:00
late-address-taken.ll
…
late-remat-update-2.mir
…
late-remat-update.mir
…
ldzero.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
lea-2.ll
…
lea-3.ll
…
lea-4.ll
…
lea-5.ll
…
lea-dagdag.ll
…
lea-opt-cse1.ll
…
lea-opt-cse2.ll
…
lea-opt-cse3.ll
…
lea-opt-cse4.ll
…
lea-opt-memop-check-1.ll
…
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
…
lea-opt.ll
…
lea-recursion.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
lea.ll
…
leaf-fp-elim.ll
…
leaFixup32.mir
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
leaFixup64.mir
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
legalize-fmp-oeq-vector-select.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-shift.ll
…
legalize-shl-vec.ll
…
legalize-sub-zero-2.ll
…
legalize-sub-zero.ll
…
legalize-types-remapid.ll
…
legalize-vaarg.ll
[SelectionDAG] Legalize vaargs that require vector splitting
2019-06-18 12:24:02 +00:00
legalizedag_vec.ll
…
libcall-sret.ll
…
licm-dominance.ll
…
licm-nested.ll
[X86] Change the MOV32ri64 pseudo instruction to def a GR64 directly instead of wrapping it in a SUBREG_TO_REG.
2018-08-11 05:33:00 +00:00
licm-regpressure.ll
…
licm-symbol.ll
…
lifetime-alias.ll
…
limit-split-cost.mir
…
limited-prec.ll
…
linux-preemption.ll
Represent runtime preemption in the IR.
2017-10-26 15:00:26 +00:00
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
live-out-reg-info.ll
…
live-range-nosubreg.ll
…
liveness-local-regalloc.ll
…
llc-override-mcpu-mattr.ll
…
llc-print-machineinstrs.mir
…
llc-start-stop-instance.ll
…
llrint-conv-i32.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
llrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
llround-conv-i32.ll
…
llround-conv.ll
…
load-combine-dbg.ll
…
load-combine.ll
…
load-local-v3i1.ll
…
load-partial.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
load-scalar-as-vector.ll
…
load-slice.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
loadStore_vectorizer.ll
Reapply "[LSV] Refactoring + supporting bitcasts to a type of different size"
2018-07-20 20:10:04 +00:00
loc-remat.ll
…
local_stack_symbol_ordering.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
localescape.ll
…
log2_not_readnone.ll
…
logical-load-fold.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-blocks.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
loop-hoist.ll
…
loop-rotate.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
loop-search.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
…
loop-strength-reduce-3.ll
…
loop-strength-reduce-crash.ll
…
loop-strength-reduce.ll
…
lower-bitcast.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
lower-vec-shift-2.ll
…
lower-vec-shift.ll
[X86] Prefer VPBLENDD for v2i64/v4i64 blends with AVX2.
2019-03-03 00:18:07 +00:00
lower-vec-shuffle-bug.ll
…
lrint-conv-i32.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
lrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
lround-conv-i32.ll
…
lround-conv.ll
…
lrshrink.ll
[X86] Regenerate lrshrink test checks to make D65354 diff easier
2019-07-31 12:30:24 +00:00
lsr-crash-empty-uses.ll
…
lsr-delayed-fold.ll
…
lsr-i386.ll
…
lsr-interesting-step.ll
…
lsr-loop-exit-cond.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
lsr-negative-stride.ll
…
lsr-nonaffine.ll
…
lsr-normalization.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
lsr-overflow.ll
…
lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
…
lsr-reuse-trunc.ll
…
lsr-reuse.ll
…
lsr-sort.ll
…
lsr-static-addr.ll
…
lsr-wrap.ll
…
lwp-intrinsics-x86_64.ll
…
lwp-intrinsics.ll
…
lzcnt-tzcnt.ll
…
lzcnt-zext-cmp.ll
…
lzcnt.ll
[X86] Regenerate LZCNT tests on x86/x32/x64 targets
2019-05-23 13:30:10 +00:00
macCatalyst.ll
[macCatalyst] Use macCatalyst pretty name in .build_version darwin
2019-07-12 22:06:08 +00:00
machine-combiner-int-vec.ll
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
2019-07-11 14:45:03 +00:00
machine-combiner-int.ll
…
machine-combiner.ll
[X86] Add avx512 command lines and test cases to machine-combiner.ll
2019-06-02 00:07:48 +00:00
machine-copy-prop.mir
…
machine-cp-debug.mir
MachineOperand/MIParser: Do not print debug-use flag, infer it
2018-10-30 23:28:27 +00:00
machine-cp.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
machine-cse.ll
…
machine-outliner-debuginfo.ll
…
machine-outliner-disubprogram.ll
…
machine-outliner-noredzone.ll
…
machine-outliner-tailcalls.ll
…
machine-outliner.ll
…
machine-region-info.mir
…
machine-sink-and-implicit-null-checks.ll
…
machine-sink.ll
…
machine-trace-metrics-crash.ll
…
MachineBranchProb.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
MachineSink-CritEdge.ll
X86: Stop LEA64_32r doing unspeakable things to its arguments.
2013-06-10 20:43:49 +00:00
MachineSink-DbgValue.ll
…
MachineSink-eflags.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
machinesink-merge-debuginfo.ll
[debug-info] Make a couple of tests more robust.
2019-06-27 15:53:07 +00:00
machinesink-null-debuginfo.ll
[debug-info] Make a couple of tests more robust.
2019-06-27 15:53:07 +00:00
MachineSink-PHIUse.ll
Revert the test moves from 176733. Use "REQUIRES: asserts" instead.
2013-03-12 16:27:52 +00:00
MachineSink-SubReg.ll
Recommit 'Remove the restriction that MachineSinking is now stopped by
2016-08-12 03:33:22 +00:00
macho-comdat.ll
Change the .ll syntax for comdats and add a syntactic sugar.
2015-01-06 22:55:16 +00:00
macho-trap.ll
…
madd.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mangle-question-mark.ll
…
mask-negated-bool.ll
…
masked_compressstore.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_expandload.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_gather_scatter_widen.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
masked_gather_scatter.ll
[SelectionDAG][X86] Move setcc mask splitting for mload/mstore/mgather/mscatter from DAGCombiner to the type legalizer.
2019-08-08 21:14:08 +00:00
masked_gather.ll
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches.
2019-07-31 22:58:15 +00:00
masked_load.ll
[SelectionDAG][X86] Move setcc mask splitting for mload/mstore/mgather/mscatter from DAGCombiner to the type legalizer.
2019-08-08 21:14:08 +00:00
masked_store_trunc_ssat.ll
[X86] Allow combineTruncateWithSat to use pack instructions for i16->i8 without AVX512BW.
2019-08-12 22:18:23 +00:00
masked_store_trunc_usat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_store_trunc.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked_store.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
materialize.ll
VirtRegMap: Replace some identity copies with KILL instructions.
2016-07-09 00:19:07 +00:00
mature-mc-support.ll
…
mbp-false-cfg-break.ll
…
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
…
mcu-abi.ll
…
mem-intrin-base-reg.ll
…
mem-promote-integers.ll
…
membarrier.ll
…
memcmp-mergeexpand.ll
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
2019-06-26 12:13:13 +00:00
memcmp-minsize.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
memcmp-optsize.ll
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
2019-06-26 12:13:13 +00:00
memcmp.ll
Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline."
2019-06-26 12:13:13 +00:00
memcpy-2.ll
…
memcpy-from-string.ll
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
2018-12-13 09:56:19 +00:00
memcpy-struct-by-value.ll
…
memcpy.ll
…
mempcpy-32.ll
…
mempcpy.ll
[TLI] Robustize SDAG LibFunc proto checking by merging it into TLI.
2017-02-03 19:11:19 +00:00
memset64-on-x86-32.ll
…
memset-2.ll
…
memset-3.ll
…
memset-nonzero.ll
[x86] split more 256-bit stores of concatenated vectors
2019-06-05 16:40:57 +00:00
memset-sse-stack-realignment.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
memset-zero.ll
[Tests] Expand coverage of small memset zero idioms
2019-05-07 23:48:42 +00:00
memset.ll
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merge_store_duplicated_loads.ll
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merge_store.ll
…
merge-consecutive-loads-128.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
merge-consecutive-loads-256.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
merge-consecutive-loads-512.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
merge-consecutive-stores-i1.ll
…
merge-consecutive-stores-nt.ll
[X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCastBeneficial/isStoreBitCastBeneficial to allow X86 to bypass it
2019-07-09 19:55:28 +00:00
merge-consecutive-stores.ll
…
merge-sp-update-lea.ll
…
merge-sp-updates-cfi.ll
…
merge-store-constants.ll
…
merge-store-partially-alias-loads.ll
…
merge-vector-stores-scale-idx-crash.ll
…
MergeConsecutiveStores.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
mfence.ll
…
midpoint-int-vec-128.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
midpoint-int-vec-256.ll
[x86] narrow extract subvector of vector select
2019-06-07 13:17:46 +00:00
midpoint-int-vec-512.ll
…
midpoint-int.ll
…
min-legal-vector-width.ll
[X86] Improve codegen of v8i64->v8i16 and v16i32->v16i8 truncate with avx512vl, avx512bw, min-legal-vector-width<=256 and prefer-vector-width=256
2019-08-08 21:36:47 +00:00
mingw-alloca.ll
…
mingw-comdats-xdata.ll
…
mingw-comdats.ll
…
mingw-refptr.ll
…
misaligned-memset.ll
…
misched_phys_reg_assign_order.ll
…
misched-aa-colored.ll
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misched-aa-mmos.ll
…
misched-balance.ll
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misched-code-difference-with-debug.ll
Bias physical register immediate assignments
2018-11-14 21:11:53 +00:00
misched-copy.ll
…
misched-crash.ll
…
misched-fusion.ll
…
misched-ilp.ll
…
misched-matmul.ll
…
misched-matrix.ll
…
misched-new.ll
…
mmx-arg-passing-x86-64.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mmx-arg-passing.ll
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mmx-arith.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mmx-bitcast-fold.ll
…
mmx-bitcast.ll
…
mmx-build-vector.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
mmx-coalescing.ll
…
mmx-copy-gprs.ll
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mmx-cvt.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mmx-fold-load.ll
…
mmx-fold-zero.ll
…
mmx-intrinsics.ll
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mmx-only.ll
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mod128.ll
…
movbe.ll
…
movddup-load-fold.ll
…
movdir-intrinsic-x86_64.ll
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movdir-intrinsic-x86.ll
…
move_latch_to_loop_top.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
movfs.ll
…
movgs.ll
…
movmsk-cmp.ll
[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles
2019-06-26 09:50:11 +00:00
movmsk.ll
…
movntdq-no-avx.ll
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movpc32-check.ll
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movtopush64.ll
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movtopush.ll
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movtopush.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
ms-inline-asm-avx512.ll
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ms-inline-asm-redundant-clobber.ll
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ms-inline-asm.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
mul64.ll
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mul128_sext_loop.ll
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mul128.ll
…
mul-constant-i8.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
mul-constant-i16.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
mul-constant-i32.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
mul-constant-i64.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
mul-constant-result.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
mul-i256.ll
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mul-i512.ll
…
mul-i1024.ll
…
mul-legalize.ll
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mul-remat.ll
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mul-shift-reassoc.ll
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mulo-pow2.ll
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muloti.ll
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mult-alt-generic-i686.ll
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mult-alt-generic-x86_64.ll
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mult-alt-x86.ll
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multiple-loop-post-inc.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
multiple-return-values-cross-block.ll
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mulvi32.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
mulx32.ll
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mulx64.ll
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musttail-fastcall.ll
[X86] Disable use of zmm registers for varargs musttail calls under prefer-vector-width=256 and min-legal-vector-width=256.
2019-08-12 17:43:26 +00:00
musttail-indirect.ll
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musttail-thiscall.ll
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musttail-varargs.ll
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musttail.ll
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mwaitx.ll
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named-reg-alloc.ll
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named-reg-notareg.ll
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nancvt.ll
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narrow_op-1.ll
…
narrow-shl-cst.ll
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narrow-shl-load.ll
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neg_cmp.ll
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neg_fp.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
neg-of-3ops-lea.ll
[X86][Codegen] Add missed pattern that may be a lea+neg
2019-06-08 19:38:14 +00:00
neg-shl-add.ll
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negate-add-zero.ll
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negate-i1.ll
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negate-shift.ll
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negate.ll
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negative_zero.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
negative-offset.ll
[NFC][X86] Autogenerate negative-offset.ll test
2019-05-22 15:34:43 +00:00
negative-sin.ll
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negative-stride-fptosi-user.ll
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negative-subscript.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
new-remat.ll
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newline-and-quote.ll
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no-and8ri8.ll
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no-cmov.ll
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no-plt-libcalls.ll
Add, and infer, a nofree function attribute
2019-07-08 15:57:56 +00:00
no-plt.ll
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no-prolog-kill.ll
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no-sse2-avg.ll
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no-stack-arg-probe.ll
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nobt.ll
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nocf_check.ll
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nocx16.ll
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nomovtopush.ll
[X86] Fix stack probe issue on windows32.
2019-08-10 02:49:02 +00:00
non-lazy-bind.ll
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non-unique-sections.ll
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non-value-mem-operand.mir
[X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.
2019-06-18 03:23:11 +00:00
nonconst-static-ev.ll
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nonconst-static-iv.ll
…
nontemporal-2.ll
[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
2019-07-11 14:45:03 +00:00
nontemporal-3.ll
[X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026)
2019-06-17 18:20:04 +00:00
nontemporal-loads-2.ll
[X86][SSE] Add tests for underaligned nt loads
2019-06-17 14:38:17 +00:00
nontemporal-loads.ll
[X86][SSE] Swap X86ISD::BLENDV inputs with an inverted selection mask (PR42825)
2019-08-09 12:44:20 +00:00
nontemporal.ll
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noreturn-call.ll
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norex-subreg.ll
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nosse-error1.ll
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nosse-error2.ll
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nosse-varargs.ll
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nosse-vector.ll
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not-and-simplify.ll
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note-cet-property.ll
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note-sections.ll
Mark ELF sections whose name start with .note as note
2016-09-20 20:21:13 +00:00
null-streamer.ll
[X86] Fix MCNullStreamer support for modules with a CodeView flag
2018-11-15 15:17:15 +00:00
O0-pipeline.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
O3-pipeline.ll
[MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.
2019-07-19 12:58:16 +00:00
objc-gc-module-flags.ll
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object-size.ll
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oddshuffles.ll
[X86][SSE] matchBinaryPermuteShuffle - split INSERTPS combines
2019-08-08 13:23:53 +00:00
oddsubvector.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)
2019-06-27 21:52:10 +00:00
opaque-constant-asm.ll
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opt_phis2.mir
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opt_phis.mir
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opt-ext-uses.ll
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opt-shuff-tstore.ll
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optimize-max-0.ll
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optimize-max-1.ll
…
optimize-max-2.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
optimize-max-3.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
or-address.ll
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or-branch.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
or-lea.ll
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osx-private-labels.ll
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overflow-intrinsic-setcc-fold.ll
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overflow.ll
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overlap-shift.ll
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packed_struct.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
packss.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
paddus.ll
[X86] Add DAG combine to fold any_extend_vector_inreg+truncstore to an extractelement+store
2019-07-31 22:43:08 +00:00
palignr.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
parity.ll
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partial-fold32.ll
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partial-fold64.ll
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partition.ll
Add IR support, ELF section and user documentation for partitioning feature.
2019-05-29 03:29:01 +00:00
pass-three.ll
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patchable-prologue.ll
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patchpoint-invoke.ll
Emit smaller exception tables for non-SJLJ mode.
2018-02-09 17:13:37 +00:00
patchpoint-verifiable.mir
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patchpoint-webkit_jscc.ll
[MC] Suppress .Lcfi labels when emitting textual assembly
2017-10-10 00:57:36 +00:00
patchpoint.ll
Bias physical register immediate assignments
2018-11-14 21:11:53 +00:00
pause.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
peep-setb.ll
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peep-test-0.ll
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peep-test-1.ll
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peep-test-2.ll
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peep-test-3.ll
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peep-test-4.ll
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peephole-cvt-sse.ll
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peephole-fold-movsd.ll
[X86] Regenerate load fold peephole test.
2019-07-04 12:33:37 +00:00
peephole-fold-testrr.mir
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
peephole-multiple-folds.ll
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peephole-na-phys-copy-folding.ll
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peephole-recurrence.mir
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peephole.mir
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personality_size.ll
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personality.ll
…
phaddsub-extract.ll
[DAGCombine] matchBinOpReduction - add partial reduction matching
2019-07-24 17:29:56 +00:00
phaddsub-undef.ll
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phaddsub.ll
[X86] isHorizontalBinOp - add extract_subvector(shuffle(x)) handling (PR39921)
2019-06-02 15:47:49 +00:00
phi-bit-propagation.ll
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phi-immediate-factoring.ll
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phielim-split.ll
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phys_subreg_coalesce-2.ll
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phys_subreg_coalesce-3.ll
…
phys_subreg_coalesce.ll
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phys-reg-local-regalloc.ll
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physreg-pairs-error.ll
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physreg-pairs.ll
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pic_jumptable.ll
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pic-load-remat.ll
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pic.ll
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pie.ll
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pku.ll
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pmaddubsw.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pmovext.ll
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pmovsx-inreg.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
pmul.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
pmulh.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
pmulld.ll
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pointer-vector.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pop-stack-cleanup-msvc.ll
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pop-stack-cleanup.ll
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
2016-04-19 23:51:52 +00:00
popcnt.ll
[X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users.
2019-07-04 22:53:57 +00:00
post-ra-sched-with-debug.mir
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post-ra-sched.ll
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postalloc-coalescing.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
postra-ignore-dbg-instrs.mir
…
postra-licm.ll
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pow.75.ll
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pow.ll
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powi.ll
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pr1462.ll
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pr1489.ll
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pr1505.ll
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pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2585.ll
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pr2656.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
pr2659.ll
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pr2849.ll
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pr2924.ll
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pr2982.ll
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pr3154.ll
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pr3216.ll
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pr3241.ll
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pr3243.ll
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pr3244.ll
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pr3250.ll
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pr3317.ll
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pr3366.ll
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pr3457.ll
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pr3522.ll
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pr5145.ll
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pr7882.ll
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pr9127.ll
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pr9517.ll
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pr9743.ll
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pr10068.ll
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pr10475.ll
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pr10499.ll
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pr10523.ll
…
pr10524.ll
…
pr10525.ll
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pr10526.ll
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pr11202.ll
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pr11334.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
pr11415.ll
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pr11468.ll
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pr11985.ll
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pr11998.ll
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pr12360.ll
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pr12889.ll
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pr13209.ll
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pr13220.ll
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pr13458.ll
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pr13577.ll
…
pr13859.ll
…
pr13899.ll
…
pr14088.ll
…
pr14098.ll
…
pr14161.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pr14204.ll
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pr14314.ll
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pr14333.ll
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pr14562.ll
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pr15267.ll
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pr15296.ll
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pr15309.ll
…
pr15705.ll
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pr15981.ll
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pr16031.ll
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pr16360.ll
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pr16807.ll
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pr17546.ll
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pr17631.ll
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pr17764.ll
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pr18014.ll
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pr18054.ll
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pr18162.ll
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pr18344.ll
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pr18846.ll
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pr19049.ll
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pr20011.ll
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pr20012.ll
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pr20020.ll
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pr20088.ll
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pr21099.ll
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pr21792.ll
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pr22019.ll
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pr22103.ll
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pr22338.ll
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pr22473.ll
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pr22774.ll
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pr22970.ll
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pr23103.ll
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pr23246.ll
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pr23273.ll
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pr23603.ll
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pr23664.ll
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pr24139.ll
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pr24374.ll
…
pr24602.ll
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pr25828.ll
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pr26350.ll
…
pr26625.ll
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pr26652.ll
…
pr26757.ll
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pr26835.ll
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pr26870.ll
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pr27071.ll
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pr27202.ll
[X86] Add custom isel to select ADD/SUB/OR/XOR/AND to their non-immediate forms under optsize when the immediate has additional users.
2019-07-04 22:53:57 +00:00
pr27501.ll
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pr27591.ll
…
pr27681.mir
…
pr28129.ll
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pr28173.ll
…
pr28444.ll
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pr28472.ll
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pr28489.ll
…
pr28515.ll
…
pr28560.ll
…
pr28824.ll
…
pr29010.ll
…
pr29022.ll
…
pr29061.ll
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pr29112.ll
[X86][SSE] matchBinaryPermuteShuffle - split INSERTPS combines
2019-08-08 13:23:53 +00:00
pr29170.ll
…
pr29222.ll
…
pr30284.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
pr30290.ll
…
pr30430.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
pr30511.ll
…
pr30562.ll
…
pr30813.ll
…
pr30821.mir
[X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.
2019-06-18 03:23:11 +00:00
pr31045.ll
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pr31088.ll
…
pr31143.ll
…
pr31242.ll
…
pr31271.ll
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pr31323.ll
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pr31593.ll
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pr31773.ll
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pr31956.ll
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pr32108.ll
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pr32241.ll
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pr32256.ll
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pr32278.ll
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pr32282.ll
…
pr32284.ll
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pr32329.ll
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pr32340.ll
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pr32345.ll
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pr32368.ll
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pr32420.ll
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pr32451.ll
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pr32484.ll
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pr32515.ll
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pr32588.ll
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pr32610.ll
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pr32659.ll
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pr32907.ll
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pr33010.ll
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pr33290.ll
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pr33349.ll
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pr33396.ll
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pr33715.ll
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pr33747.ll
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pr33828.ll
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pr33954.ll
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pr33960.ll
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pr34080-2.ll
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pr34080.ll
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pr34088.ll
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pr34137.ll
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pr34139.ll
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pr34149.ll
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pr34177.ll
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pr34271-1.ll
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pr34271.ll
…
pr34292.ll
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pr34381.ll
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pr34397.ll
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pr34421.ll
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pr34592.ll
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pr34605.ll
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pr34629.ll
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pr34634.ll
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pr34653.ll
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pr34657.ll
…
pr34855.ll
…
pr35272.ll
…
pr35316.ll
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pr35399.ll
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pr35443.ll
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pr35636.ll
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pr35761.ll
…
pr35763.ll
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pr35765.ll
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pr35918.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pr35972.ll
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pr35982.ll
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pr36199.ll
…
pr36274.ll
…
pr36312.ll
…
pr36553.ll
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pr36602.ll
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pr36865.ll
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pr37063.ll
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pr37264.ll
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pr37359.ll
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pr37499.ll
…
pr37820.ll
…
pr37826.ll
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pr37879.ll
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pr37916.ll
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pr38038.ll
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pr38185.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
pr38217.ll
…
pr38533.ll
…
pr38539.ll
…
pr38639.ll
…
pr38738.ll
…
pr38743.ll
This reverts r365061 and r365062 (test update)
2019-07-05 12:42:06 +00:00
pr38762.ll
…
pr38763.ll
…
pr38795.ll
…
pr38803.ll
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pr38819.ll
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pr38865-2.ll
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pr38865-3.ll
…
pr38865.ll
…
pr38952.mir
…
pr39098.ll
…
pr39187-g.ll
…
pr39243.ll
…
pr39666.ll
[ScalarizeMaskedMemIntrin] Bitcast the mask to the scalar domain and use scalar bit tests for the branches for expandload/compressstore.
2019-08-02 23:43:53 +00:00
pr39733.ll
…
pr39896.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
pr39926.ll
…
pr40090.ll
…
pr40289-64bit.ll
…
pr40289.ll
…
pr40529.ll
…
pr40539.ll
…
pr40631_deadstore_elision.ll
…
pr40730.ll
…
pr40737.ll
…
pr40811.ll
…
pr40891.ll
…
pr40994.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
pr41619.ll
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pr41678.ll
…
pr41748.ll
…
pr42452.ll
[X86] Improve the type checking fast-isel handling of vector bitcasts.
2019-07-01 07:09:34 +00:00
pr42565.ll
[X86] Don't convert 8 or 16 bit ADDs to LEAs on Atom in FixupLEAPass.
2019-07-11 01:01:39 +00:00
pr42616.ll
[X86] Remove offset of 8 from the call to FuseInst for UNPCKLPDrr folding added in r365287.
2019-07-14 04:13:33 +00:00
pr42727.ll
[SelectionDAG] makeEquivalentMemoryOrdering - early out for equal chains (PR42727)
2019-07-24 16:53:14 +00:00
pr42870.ll
[X86] Match the IR pattern form movmsk on SSE1 only targets where v4i32 isn't legal
2019-08-10 07:51:13 +00:00
pr42905.ll
[X86] Don't allow combineSIntToFP to create v2i32 vectors after type legalization.
2019-08-06 21:43:15 +00:00
pr42909.ll
[X86] Remove -x86-experimental-vector-widening-legalization command line option and all its uses.
2019-08-08 06:48:22 +00:00
PR34565.ll
…
PR37310.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
PR40322.ll
…
pre-coalesce-2.ll
…
pre-coalesce.ll
…
pre-coalesce.mir
…
pre-ra-sched.ll
…
prefer-avx256-lzcnt.ll
…
prefer-avx256-mask-extend.ll
…
prefer-avx256-mask-shuffle.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
prefer-avx256-popcnt.ll
…
prefer-avx256-shift.ll
…
prefer-avx256-trunc.ll
…
prefer-avx256-wide-mul.ll
…
prefetch.ll
[X86] Add prefetchwt1 instruction and overhaul priorities and isel enabling for prefetch instructions.
2017-12-22 02:30:30 +00:00
prefixdata.ll
Ensure that prefix data is preserved with subsections-via-symbols
2017-03-15 04:18:16 +00:00
preserve_allcc64.ll
…
preserve_mostcc64.ll
…
private-2.ll
…
private.ll
…
probe-stack-x32.ll
[X86] Fix stack probing on x32 (PR41477)
2019-04-20 07:25:46 +00:00
prolog-push-seq.ll
…
prologepilog_deref_size.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
prologue-epilogue-remarks.mir
…
prologuedata.ll
…
promote-assert-zext.ll
…
promote-i16.ll
…
promote-trunc.ll
…
promote-vec3.ll
Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
2019-08-13 09:33:25 +00:00
promote.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
ps4-noreturn.ll
…
ps4-ssp-nop.ll
…
psadbw.ll
[X86][SSE] Add test showing missing demanded elts PSADBW handling
2019-08-12 14:01:16 +00:00
pseudo_cmov_lower1.ll
…
pseudo_cmov_lower2.ll
…
pseudo_cmov_lower.ll
…
pshufb-mask-comments.ll
…
pshufd-combine-crash.ll
…
psubus.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
ptest.ll
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ptr-rotate.ll
…
ptrtoint-constexpr.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
ptrtoint-narrow.ll
[AsmPrinter] Treat a narrowing PtrToInt like Trunc
2019-05-23 16:29:09 +00:00
ptwrite32-intrinsic.ll
…
ptwrite64-intrinsic.ll
…
pull-binop-through-shift.ll
[DAGCombiner] visitShiftByConstant(): drop bogus signbit check
2019-05-17 15:52:58 +00:00
pull-conditional-binop-through-shift.ll
[NFC] Fixup FileCheck option name in tests added in rL360881
2019-05-16 12:39:34 +00:00
push-cfi-debug.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
push-cfi-obj.ll
…
push-cfi.ll
…
ragreedy-bug.ll
…
ragreedy-hoist-spill.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
ragreedy-last-chance-recoloring.ll
…
rd-mod-wr-eflags.ll
…
rdpid.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
rdpmc.ll
…
rdrand-x86_64.ll
…
rdrand.ll
…
rdseed-x86_64.ll
…
rdseed.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
rdtsc-upgrade.ll
…
rdtsc.ll
…
read-fp-no-frame-pointer.ll
…
recip-fastmath2.ll
…
recip-fastmath.ll
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recip-pic.ll
…
red-zone2.ll
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red-zone.ll
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reduce-trunc-shl.ll
…
regalloc-advanced-split-cost.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
regalloc-copy-hints.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
regalloc-fast-missing-live-out-spill.mir
RegAllocFast: Set MayLiveAcrossBlocks when allocating uses
2019-05-27 20:37:31 +00:00
regalloc-reconcile-broken-hints.ll
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regalloc-spill-at-ehpad.ll
…
regcall-no-plt.ll
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reghinting.ll
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regparm.ll
…
regpressure.ll
…
relptr-rodata.ll
IR: Teach Constant::needsRelocation() that relative pointers don't need to be relocated.
2019-07-18 20:56:21 +00:00
rem_crash.ll
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rem.ll
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remarks-section.ll
Reland: [Remarks] Add support for serializing metadata for every remark streamer
2019-07-26 01:33:30 +00:00
remat-constant.ll
…
remat-fold-load.ll
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remat-mov-0.ll
…
remat-phys-dead.ll
…
remat-scalar-zero.ll
…
replace_unsupported_masked_mem_intrin.ll
…
replace-load-and-with-bzhi.ll
…
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
retpoline-external.ll
…
retpoline-regparm.ll
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retpoline.ll
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return_zeroext_i2.ll
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return-ext.ll
…
returned-trunc-tail-calls.ll
…
reverse_branches.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
rip-rel-address.ll
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rip-rel-lea.ll
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rodata-relocs.ll
…
rot16.ll
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rot32.ll
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rot64.ll
…
rotate2.ll
…
rotate4.ll
…
rotate_vec.ll
…
rotate-extract-vector.ll
[X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C)
2019-05-25 18:02:17 +00:00
rotate-extract.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
rotate-multi.ll
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rotate.ll
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rounding-ops.ll
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rrlist-livereg-corrutpion.ll
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rtm.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
sad_variations.ll
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sad.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sadd_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sadd_sat.ll
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saddo-redundant-add.ll
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safestack_inline.ll
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safestack_ssp.ll
…
safestack.ll
…
sandybridge-loads.ll
[x86] avoid vector load narrowing with extracted store uses (PR42305)
2019-06-19 18:13:47 +00:00
sar_fold64.ll
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sar_fold.ll
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sat-add.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
sbb.ll
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scalar_sse_minmax.ll
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scalar_widen_div.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
scalar-extract.ll
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scalar-fp-to-i64.ll
[X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns.
2019-06-10 00:41:07 +00:00
scalar-int-to-fp.ll
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scalar-min-max-fill-operand.ll
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scalarize-bitcast.ll
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scalarize-fp.ll
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scatter-schedule.ll
…
scavenger.mir
…
scev-interchange.ll
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scheduler-backtracking.ll
…
sdiv-exact.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
sdiv-pow2.ll
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section_mergeable_size.ll
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segmented-stacks-dynamic.ll
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segmented-stacks-standalone.ll
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segmented-stacks.ll
[X86] for split stack, not save/restore nested arg if unused
2019-07-19 12:54:44 +00:00
seh-catch-all-win32.ll
…
seh-catch-all.ll
…
seh-catchpad.ll
…
seh-except-finally.ll
…
seh-exception-code.ll
[IR] Reformulate LLVM's EH funclet IR
2015-12-12 05:38:55 +00:00
seh-filter-no-personality.ll
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seh-finally.ll
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seh-localaddress.ll
…
seh-no-invokes.ll
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seh-safe-div-win32.ll
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seh-safe-div.ll
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seh-stack-realign.ll
[EH] Rename llvm.x86.seh.recoverfp intrinsic to llvm.eh.recoverfp
2019-01-16 00:37:13 +00:00
select_const.ll
[x86] make 8-bit shl undesirable
2019-04-08 13:58:50 +00:00
select_meta.ll
…
select-1-or-neg1.ll
…
select-mmx.ll
…
select-of-fp-constants.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
select-with-and-or.ll
…
select.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
selectcc-to-shiftand.ll
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selectiondag-crash.ll
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selectiondag-cse.ll
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selectiondag-debug-loc.ll
…
selectiondag-dominator.ll
…
selectiondag-order.ll
…
setcc-combine.ll
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setcc-logic.ll
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setcc-lowering.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
setcc-narrowing.ll
…
setcc-wide-types.ll
[X86] Don't compare i128 through vector if construction not cheap (PR41971)
2019-05-22 06:47:06 +00:00
setcc.ll
[X86] Don't promote i16 compares to i32 if the immediate will fit in 8 bits.
2018-10-05 18:13:36 +00:00
setjmp-spills.ll
…
setoeq.ll
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setuge.ll
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sext-i1.ll
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sext-load.ll
…
sext-ret-val.ll
…
sext-setcc-self.ll
…
sext-subreg.ll
…
sext-trunc.ll
…
sha.ll
…
shadow-stack.ll
SelectionDAGBuilder, mach-o: Skip trap after noreturn call (for Mach-O)
2018-06-28 17:00:45 +00:00
shift_minsize.ll
[SelectionDAG] Codesize: don't expand SHIFT to SHIFT_PARTS
2019-01-31 08:07:30 +00:00
shift-amount-mod.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
shift-and-x86_64.ll
…
shift-and.ll
…
shift-avx2-crash.ll
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shift-bmi2.ll
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shift-coalesce.ll
…
shift-codegen.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shift-combine-crash.ll
…
shift-combine.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shift-double-x86_64.ll
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shift-double.ll
[X86] Improve use of SHLD/SHRD
2019-03-02 02:44:16 +00:00
shift-folding.ll
…
shift-i128.ll
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shift-i256.ll
…
shift-mask.ll
…
shift-one.ll
…
shift-pair.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
shift-parts.ll
…
shift-pcmp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
shl_elim.ll
…
shl_undef.ll
…
shl-anyext.ll
…
shl-crash-on-legalize.ll
…
shl-i64.ll
…
shrink_vmul_sse.ll
…
shrink_vmul.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (reapplied)
2019-08-13 10:51:39 +00:00
shrink_wrap_dbg_value.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
shrink-compare.ll
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shrink-fp-const1.ll
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shrink-fp-const2.ll
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shrink-wrap-chkstk-x86_64.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
shrink-wrap-chkstk.ll
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shrink-wrapping-vla.ll
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shrinkwrap-hang.ll
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shuffle-combine-crash-2.ll
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shuffle-combine-crash.ll
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shuffle-extract-subvector.ll
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shuffle-of-insert.ll
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shuffle-of-splat-multiuses.ll
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shuffle-strided-with-offset-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-strided-with-offset-256.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-strided-with-offset-512.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-256.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
shuffle-vs-trunc-512.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sibcall-2.ll
…
sibcall-3.ll
…
sibcall-4.ll
…
sibcall-5.ll
…
sibcall-6.ll
…
sibcall-byval.ll
…
sibcall-win64.ll
…
sibcall.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
signbit-shift.ll
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signed-truncation-check.ll
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simple-register-allocation-read-undef.mir
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simple-zext.ll
…
sincos-opt.ll
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sincos.ll
…
sink-addsub-of-const.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
sink-blockfreq.ll
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sink-cheap-instructions.ll
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sink-gep-before-mem-inst.ll
…
sink-hoist.ll
…
sink-local-value.ll
…
sink-out-of-loop.ll
…
sitofp.ll
…
sjlj-baseptr.ll
…
sjlj-eh.ll
…
sjlj-shadow-stack-liveness.mir
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
sjlj.ll
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slow-incdec.ll
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slow-pmulld.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
slow-unaligned-mem.ll
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small-byval-memcpy.ll
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smul_fix_sat_constants.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
smul_fix_sat.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
smul_fix.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
smul-with-overflow.ll
…
soft-fp-legal-in-HW-reg.ll
…
soft-fp.ll
…
soft-sitofp.ll
…
speculative-load-hardening-call-and-ret.ll
…
speculative-load-hardening-gather.ll
…
speculative-load-hardening-indirect.ll
…
speculative-load-hardening.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
splat-const.ll
…
splat-for-size.ll
…
split-eh-lpad-edges.ll
…
split-extend-vector-inreg.ll
[DAGCombine] Add calls to SimplifyDemandedVectorElts from visitINSERT_SUBVECTOR (PR37989)
2018-11-20 15:23:50 +00:00
split-store.ll
[DAGCombiner] Combine OR as ADD when no common bits are set
2019-04-23 10:01:08 +00:00
split-vector-bitcast.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
split-vector-rem.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
sqrt-fastmath-mir.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
sqrt-fastmath-tune.ll
…
sqrt-fastmath.ll
…
sqrt-partial.ll
…
sqrt.ll
…
srem-seteq-optsize.ll
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
2019-08-13 14:57:37 +00:00
srem-seteq-vec-nonsplat.ll
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
2019-08-13 14:57:37 +00:00
srem-seteq-vec-splat.ll
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
2019-08-13 14:57:37 +00:00
srem-seteq.ll
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
2019-08-13 14:57:37 +00:00
sret-implicit.ll
…
sse1-fcopysign.ll
…
sse1.ll
…
sse2-intrinsics-canonical.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sse2-intrinsics-fast-isel-x86_64.ll
…
sse2-intrinsics-fast-isel.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
sse2-intrinsics-x86_64-upgrade.ll
…
sse2-intrinsics-x86_64.ll
…
sse2-intrinsics-x86-upgrade.ll
…
sse2-intrinsics-x86.ll
…
sse2-vector-shifts.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
sse2.ll
[X86] Make movsd commutable to shufpd with a 0x02 immediate on pre-SSE4.1 targets.
2019-07-08 06:52:43 +00:00
sse3-avx-addsub-2.ll
…
sse3-avx-addsub.ll
…
sse3-intrinsics-fast-isel.ll
…
sse3-intrinsics-x86.ll
…
sse3.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
sse4a-intrinsics-fast-isel.ll
…
sse4a-upgrade.ll
…
sse4a.ll
…
sse41-intrinsics-fast-isel.ll
…
sse41-intrinsics-x86-upgrade.ll
…
sse41-intrinsics-x86.ll
…
sse41-pmovxrm.ll
…
sse41.ll
…
sse42-intrinsics-fast-isel-x86_64.ll
…
sse42-intrinsics-fast-isel.ll
…
sse42-intrinsics-x86_64.ll
…
sse42-intrinsics-x86.ll
…
sse_partial_update.ll
…
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
sse-commute.ll
…
sse-cvttp2si.ll
…
sse-domains.ll
…
sse-fcopysign.ll
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
2019-07-02 17:51:02 +00:00
sse-fsignum.ll
…
sse-intel-ocl.ll
…
sse-intrinsics-fast-isel-x86_64.ll
…
sse-intrinsics-fast-isel.ll
[X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only.
2019-07-15 02:02:31 +00:00
sse-intrinsics-x86_64-upgrade.ll
…
sse-intrinsics-x86_64.ll
…
sse-intrinsics-x86-upgrade.ll
…
sse-intrinsics-x86.ll
…
sse-load-ret.ll
…
sse-minmax.ll
…
sse-only.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
sse-regcall.ll
…
sse-scalar-fp-arith-unary.ll
…
sse-scalar-fp-arith.ll
[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.
2019-06-11 04:30:53 +00:00
sse-unaligned-mem-feature.ll
…
sse-varargs.ll
…
ssp-data-layout.ll
…
ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
…
ssse3-intrinsics-x86.ll
…
ssub_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
ssub_sat.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
stack_guard_remat.ll
Add address space mangling to lifetime intrinsics
2017-04-10 20:18:21 +00:00
stack-align2.ll
[X86] Extend some Linux special cases to cover kFreeBSD.
2016-05-05 11:35:51 +00:00
stack-align-memcpy.ll
[NFC] Update memcpy tests
2019-05-06 09:46:50 +00:00
stack-align.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
stack-folding-3dnow.ll
[X86][3DNow] Added 3DNow! memory folding patterns + tests
2015-04-03 11:50:30 +00:00
stack-folding-adx-x86_64.ll
…
stack-folding-adx.mir
…
stack-folding-avx512bf16.ll
[X86] Add AVX512BF16 and AVX512VP2INTERSECT instructions to the loading folding tables.
2019-06-01 06:20:59 +00:00
stack-folding-avx512vp2intersect.ll
[X86] Add AVX512BF16 and AVX512VP2INTERSECT instructions to the loading folding tables.
2019-06-01 06:20:59 +00:00
stack-folding-bmi2.ll
[X86] Move stack folding test for MULX to a MIR test. Add a MULX32 case as well
2018-12-12 20:50:24 +00:00
stack-folding-bmi2.mir
[X86] Move stack folding test for MULX to a MIR test. Add a MULX32 case as well
2018-12-12 20:50:24 +00:00
stack-folding-bmi.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
stack-folding-fp-avx1.ll
…
stack-folding-fp-avx512.ll
[X86] Make a bunch of merge masked binops commutable for loading folding.
2019-06-06 21:00:04 +00:00
stack-folding-fp-avx512vl.ll
…
stack-folding-fp-sse42.ll
…
stack-folding-int-avx1.ll
…
stack-folding-int-avx2.ll
…
stack-folding-int-avx512.ll
[X86] Make a bunch of merge masked binops commutable for loading folding.
2019-06-06 21:00:04 +00:00
stack-folding-int-avx512vl.ll
…
stack-folding-int-sse42.ll
…
stack-folding-lwp.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
stack-folding-mmx.ll
…
stack-folding-sha.ll
[X86][SHA] Add SHA stack folding tests
2017-02-17 19:24:55 +00:00
stack-folding-tbm.ll
…
stack-folding-x86_64.ll
…
stack-folding-xop.ll
…
stack-probe-red-zone.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
stack-probe-size.ll
Support for emitting inline stack probes
2015-11-10 01:50:49 +00:00
stack-probes.ll
[X86] Add support for "probe-stack" attribute
2017-06-22 15:42:53 +00:00
stack-protector-dbginfo.ll
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
2018-05-09 02:40:45 +00:00
stack-protector-msvc.ll
Re-commit r319490 "XOR the frame pointer with the stack cookie when protecting the stack"
2017-12-05 20:22:20 +00:00
stack-protector-remarks.ll
[SSP] In opt remarks, stream Function directly
2017-03-09 06:10:27 +00:00
stack-protector-target.ll
Disable TLS for stack protector on Android API<17.
2017-02-23 21:06:35 +00:00
stack-protector-vreg-to-vreg-copy.ll
…
stack-protector-weight.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
stack-protector.ll
StackProtector: Use PointerMayBeCaptured
2019-06-12 14:23:33 +00:00
stack-size-section-function-sections.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stack-size-section.ll
Recommit r335333 "[MC] - Add .stack_size sections into groups and link them with .text"
2018-06-22 10:53:47 +00:00
stack-update-frame-opcode.ll
…
StackColoring-dbg.ll
…
StackColoring.ll
…
stackguard-internal.ll
Also fix a typo. Need more coffee today.
2016-06-09 17:06:01 +00:00
stackmap-fast-isel.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
stackmap-frame-setup.ll
Add extra operand to CALLSEQ_START to keep frame part set up previously
2017-05-09 13:35:13 +00:00
stackmap-large-constants.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackmap-large-location-size.ll
[StackMaps] Increase the size of the "location size" field
2017-04-28 04:48:42 +00:00
stackmap-liveness.ll
[CodeGen] Print register names in lowercase in both MIR and debug output
2017-11-28 17:15:09 +00:00
stackmap-nops.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
stackmap-shadow-optimization.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
stackmap.ll
…
stackpointer.ll
IR: Make metadata typeless in assembly
2014-12-15 19:07:53 +00:00
statepoint-allocas.ll
[Test] Use autogenerated checks for more statepoint tests
2019-02-12 00:12:46 +00:00
statepoint-call-lowering.ll
…
statepoint-far-call.ll
…
statepoint-forward.ll
Add placeholder for more extensive verification of psuedo ops
2017-06-02 16:36:37 +00:00
statepoint-gctransition-call-lowering.ll
…
statepoint-invoke.ll
…
statepoint-live-in.ll
…
statepoint-no-realign-stack.ll
[Statepoints] Fix overalignment of loads in no-realign-stack functions
2019-08-02 20:17:37 +00:00
statepoint-stack-usage.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
statepoint-stackmap-format.ll
[CodeGen] Prefer static frame index for STATEPOINT liveness args
2018-11-30 16:22:41 +00:00
statepoint-uniqueing.ll
…
statepoint-vector-bad-spill.ll
…
statepoint-vector.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
stdarg.ll
[X86][DAG] Switch X86 Target to post-legalized store merge
2017-08-11 13:21:35 +00:00
stdcall-notailcall.ll
…
stdcall.ll
[x86] Disambiguate RET[QL] and fix aliases for 16-bit mode
2014-01-08 12:58:07 +00:00
store_op_load_fold2.ll
…
store_op_load_fold.ll
…
store-empty-member.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
store-narrow.ll
…
store-zero-and-minus-one.ll
…
stores-merging.ll
…
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
…
stride-reuse.ll
…
sttni.ll
…
sub-of-not.ll
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
2019-07-03 09:41:35 +00:00
sub-with-overflow.ll
…
sub.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
subcarry.ll
[DAGCombiner] fold (addcarry (xor a, -1), b, c) -> (subcarry b, a, !c) and flip carry.
2019-07-16 15:17:00 +00:00
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
…
subvector-broadcast.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
sunkaddr-ext.ll
…
swap.ll
…
swift-error.ll
X86: remove R12 from CSR on Windows x64 SwiftCC
2017-09-25 22:00:17 +00:00
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
swiftself.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
switch-bt.ll
…
switch-crit-edge-constant.ll
…
switch-default-only.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
switch-density.ll
[Codegen] Decrease minimum jump table density.
2016-03-29 00:23:41 +00:00
switch-edge-weight.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
switch-jump-table.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
switch-lower-peel-top-case.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
switch-or.ll
…
switch-order-weight.ll
…
switch-zextload.ll
…
switch.ll
[test] Change comment wording (NFC)
2019-06-18 23:31:10 +00:00
SwitchLowering.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
swizzle-2.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
swizzle-avx2.ll
…
SwizzleShuff.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
system-intrinsics-64-xsave.ll
…
system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
…
system-intrinsics-xgetbv.ll
…
system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
…
system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
…
system-intrinsics-xsetbv.ll
…
system-intrinsics.ll
…
tail-call-attrs.ll
…
tail-call-casts.ll
…
tail-call-conditional.mir
…
tail-call-got.ll
…
tail-call-legality.ll
…
tail-call-mutable-memarg.ll
…
tail-call-parameter-attrs-mismatch.ll
…
tail-call-win64.ll
…
tail-dup-addr.ll
…
tail-dup-catchret.ll
…
tail-dup-debugloc.ll
…
tail-dup-merge-loop-headers.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
tail-dup-no-other-successor.ll
…
tail-dup-repeat.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
tail-merge-after-mbp.mir
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
tail-merge-debugloc.ll
…
tail-merge-identical.ll
…
tail-merge-unreachable.ll
…
tail-merge-wineh.ll
…
tail-opts.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
tail-threshold.ll
[Codegen] Merge tail blocks with no successors after block placement
2019-06-13 18:11:32 +00:00
tailcall-64.ll
…
tailcall-calleesave.ll
…
tailcall-cgp-dup.ll
…
tailcall-disable.ll
…
tailcall-fastisel.ll
[opaque pointer type] Add textual IR support for explicit type parameter to the call instruction
2015-04-16 23:24:18 +00:00
tailcall-largecode.ll
…
tailcall-lifetime-end.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-msvc-conventions.ll
…
tailcall-multiret.ll
…
tailcall-pseudo-64.mir
…
tailcall-pseudo.mir
…
tailcall-readnone.ll
…
tailcall-returndup-void.ll
…
tailcall-ri64.ll
…
tailcall-stackalign.ll
[X86] Enable call frame optimization ("mov to push") not only for optsize (PR26325)
2016-03-30 23:38:01 +00:00
tailcall-structret.ll
…
tailcall.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallpic3.ll
…
tailcallstack64.ll
ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects
2015-05-08 23:52:00 +00:00
taildup-crash.ll
…
tailjmp_gotpcrel_relax_relocation.ll
…
targetLoweringGeneric.ll
…
tbm_patterns.ll
[X86] Add patterns with and_flag_nocf for BLSI and TBM instructions.
2019-07-10 22:44:32 +00:00
tbm-intrinsics-fast-isel-x86_64.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
tbm-intrinsics-fast-isel.ll
[X86] Teach convertToThreeAddress to handle SUB with immediate
2019-07-15 23:07:56 +00:00
tbm-intrinsics-x86_64.ll
…
tbm-intrinsics.ll
…
test_x86condbr_globaladdr.mir
…
test-nofold.ll
…
test-shrink-bug.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
test-shrink.ll
…
test-vs-bittest.ll
…
testb-je-fusion.ll
…
testl-commute.ll
…
this-return-64.ll
…
throws-cfi-fp.ll
…
throws-cfi-no-fp.ll
…
tls-addr-non-leaf-function.ll
Replace "no-frame-pointer-*" function attributes with "frame-pointer"
2019-01-14 10:55:55 +00:00
tls-android-negative.ll
…
tls-android.ll
[TLS] use emulated TLS if the target supports only this mode
2018-02-28 17:48:55 +00:00
tls-local-dynamic.ll
…
tls-models.ll
…
tls-no-plt.ll
[X86] -fno-plt: use GOT __tls_get_addr only if GOTPCRELX is enabled
2019-07-11 10:10:09 +00:00
tls-pic.ll
…
tls-pie.ll
…
tls-shrink-wrapping.ll
…
tls-windows-itanium.ll
…
tls.ll
…
tlv-1.ll
…
tlv-2.ll
…
tlv-3.ll
…
token_landingpad.ll
…
trap.ll
…
tree_way_unsigned_cmp.ll
[NFC] Added test from PR19758
2019-06-09 15:12:46 +00:00
trunc-and.ll
[DAGCombiner][x86] prevent infinite loop from truncate/extend transforms
2019-08-05 11:27:07 +00:00
trunc-ext-ld-st.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
trunc-store.ll
…
trunc-subvector.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
trunc-to-bool.ll
…
TruncAssertSext.ll
…
TruncAssertZext.ll
…
twoaddr-coalesce-2.ll
…
twoaddr-coalesce-3.ll
…
twoaddr-coalesce.ll
…
twoaddr-dbg-value.mir
…
twoaddr-lea.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
twoaddr-pass-sink.ll
…
twoaddr-sink-terminator.ll
…
typeid-alias.ll
CodeGen: Don't follow aliases when extracting type info.
2019-08-02 17:43:45 +00:00
uadd_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
uadd_sat.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
uint64-to-float.ll
…
uint_to_fp-2.ll
…
uint_to_fp-3.ll
…
uint_to_fp.ll
…
umul_fix.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
umul-with-carry.ll
…
umul-with-overflow.ll
…
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
…
unaligned-32-byte-memops.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
unaligned-load.ll
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
2018-12-13 09:56:19 +00:00
unaligned-spill-folding.ll
…
undef-eflags.mir
…
undef-globals-bss.ll
…
undef-label.ll
…
undef-ops.ll
…
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
unknown-location.ll
…
unreachable-loop-sinking.ll
…
unreachable-mbb-undef-phi.mir
…
unreachable-trap.ll
…
unreachableblockelim.ll
…
unused_stackslots.ll
…
unwind-init.ll
…
unwindraise.ll
…
update-terminator-debugloc.ll
…
update-terminator.mir
…
urem-i8-constant.ll
…
urem-power-of-two.ll
…
urem-seteq-optsize.ll
[CodeGen] [SelectionDAG] More efficient code for X % C == 0 (UREM case) (try 3)
2019-06-27 21:52:10 +00:00
urem-seteq-vec-nonsplat.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
urem-seteq-vec-splat.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
urem-seteq.ll
[NFC][X86][AArch64] Revisit test coverage for X s% C == 0 fold - add tests for negative divisors, INT_MIN divisors
2019-07-30 08:00:49 +00:00
use-add-flags.ll
…
usub_sat_vec.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
usub_sat.ll
[X86] Remove redundant ';' chars ending IR lines in lit tests. NFC
2019-08-11 19:27:14 +00:00
utf8.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
utf16-cfstrings.ll
[MC] Use .p2align instead of .align
2016-01-26 00:03:25 +00:00
uwtables.ll
…
v2f32.ll
…
v4f32-immediate.ll
…
v4i32load-crash.ll
…
v8i1-masks.ll
…
vaargs.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vaes-intrinsics-avx512-x86.ll
…
vaes-intrinsics-avx512vl-x86.ll
…
vaes-intrinsics-avx-x86.ll
…
var-permute-128.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
var-permute-256.ll
[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))
2019-06-22 17:57:01 +00:00
var-permute-512.ll
…
vararg_no_start.ll
…
vararg_tailcall.ll
…
vararg-callee-cleanup.ll
…
variable-sized-darwin-bzero.ll
Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
2018-01-19 17:13:12 +00:00
variadic-node-pic.ll
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
2018-07-23 21:14:35 +00:00
vastart-defs-eflags.ll
…
vbinop-simplify-bug.ll
…
vec3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_align_i256.ll
…
vec_align.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
vec_anyext.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_call.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_cast2.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vec_cast3.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vec_cast.ll
…
vec_cmp_sint-128.ll
…
vec_cmp_uint-128.ll
…
vec_compare-sse4.ll
…
vec_compare.ll
[X86] Autogenerate complete checks. NFC
2018-10-09 17:52:07 +00:00
vec_ctbits.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_ext_inreg.ll
…
vec_extract-avx.ll
[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)
2019-06-21 19:10:21 +00:00
vec_extract-mmx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_extract-sse4.ll
…
vec_extract.ll
[X86][SSE] LowerINSERT_VECTOR_ELT - early out for out of range indices
2019-07-05 10:34:53 +00:00
vec_fabs.ll
[X86] Standardize floating point assembly comments
2018-10-02 09:08:51 +00:00
vec_floor.ll
[X86][InstCombine] Remove InstCombine code that turns X86 round intrinsics into llvm.ceil/floor. Remove some isel patterns that existed because that was happening.
2019-05-22 20:04:55 +00:00
vec_fneg.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
vec_fp_to_int.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_fpext.ll
[X86] Remove avx512 isel patterns for fpextend+load. Prefer to only match fp extloads instead.
2019-05-31 06:21:53 +00:00
vec_fptrunc.ll
[x86] split 256-bit store of concatenated vectors
2019-06-04 16:40:04 +00:00
vec_i64.ll
…
vec_ins_extract-1.ll
…
vec_ins_extract.ll
…
vec_insert-2.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vec_insert-3.ll
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
2018-09-19 18:11:34 +00:00
vec_insert-4.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-5.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_insert-7.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_insert-8.ll
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
vec_insert-9.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_insert-mmx.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_int_to_fp.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_loadsingles.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_logical.ll
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
2019-06-13 19:24:51 +00:00
vec_minmax_match.ll
…
vec_minmax_sint.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
vec_minmax_uint.ll
[TargetLowering] SimplifyMultipleUseDemandedBits - add VECTOR_SHUFFLE support.
2019-07-23 15:35:55 +00:00
vec_partial.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_reassociate.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_return.ll
…
vec_round.ll
…
vec_saddo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_sdiv_to_shift.ll
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vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-F.ll
…
vec_set-H.ll
…
vec_set.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_setcc-2.ll
[x86] use psubus for more vsetcc lowering (PR39859)
2019-04-23 15:20:17 +00:00
vec_setcc.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift2.ll
[X86][SSE] Attempt to convert SSE shift-by-var to shift-by-imm.
2019-03-15 11:05:42 +00:00
vec_shift3.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift4.ll
Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
2018-02-27 16:59:10 +00:00
vec_shift5.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shift6.ll
[X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
2018-07-10 07:58:33 +00:00
vec_shift7.ll
[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT
2018-07-17 09:45:35 +00:00
vec_shift.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vec_shuf-insert.ll
…
vec_smulo.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (reapplied)
2019-08-13 10:51:39 +00:00
vec_split.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_ss_load_fold.ll
…
vec_ssubo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_trunc_sext.ll
…
vec_uaddo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_udiv_to_shift.ll
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vec_uint_to_fp-fastmath.ll
…
vec_uint_to_fp.ll
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vec_umulo.ll
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (reapplied)
2019-08-13 10:51:39 +00:00
vec_unsafe-fp-math.ll
…
vec_usubo.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vec_zero_cse.ll
[DAGCombiner][X86][SystemZ][AArch64] Combine some cases of (bitcast (build_vector constants)) between legalize types and legalize dag.
2019-03-04 19:12:16 +00:00
vec_zero-2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vec_zero.ll
[X86][SSE] Regenerate vector zero tests
2019-03-05 16:52:14 +00:00
vec-copysign-avx512.ll
…
vec-copysign.ll
…
vec-libcalls.ll
…
vec-loadsingles-alignment.ll
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
2015-03-13 18:20:45 +00:00
vec-trunc-store.ll
…
vecloadextract.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
vector_splat-const-shift-of-constmasked.ll
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vector-bitreverse.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
vector-blend.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-compare-all_of.ll
[X86][SSE] Fold movmsk(not(x)) -> not(movmsk)
2019-05-17 17:56:25 +00:00
vector-compare-any_of.ll
[X86][SSE] Fold movmsk(not(x)) -> not(movmsk)
2019-05-17 17:56:25 +00:00
vector-compare-combines.ll
…
vector-compare-results.ll
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vector-compare-simplify.ll
[SelectionDAG] Support some SimplifySetCC cases for comparing against vector splats of constants.
2018-03-01 22:15:39 +00:00
vector-constrained-fp-intrinsics-fma.ll
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vector-constrained-fp-intrinsics.ll
[Strict FP] Allow custom operation actions
2019-08-06 10:43:13 +00:00
vector-ext-logic.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-extend-inreg.ll
[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.
2019-06-21 17:24:21 +00:00
vector-fshl-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-512.ll
[TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
2019-06-27 14:25:54 +00:00
vector-fshl-rot-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-rot-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshl-rot-512.ll
[SelectionDAG] Check for any recursion depth greater than or equal to limit instead of just equal the limit.
2019-07-27 12:48:46 +00:00
vector-fshr-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-512.ll
[TargetLowering] SimplifyDemandedVectorElts - add shift/rotate support.
2019-06-27 14:25:54 +00:00
vector-fshr-rot-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-rot-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-fshr-rot-512.ll
[SelectionDAG] Check for any recursion depth greater than or equal to limit instead of just equal the limit.
2019-07-27 12:48:46 +00:00
vector-gep.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-half-conversions.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-idiv-sdiv-128.ll
[DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2
2019-05-30 20:37:49 +00:00
vector-idiv-sdiv-256.ll
[DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2
2019-05-30 20:37:49 +00:00
vector-idiv-sdiv-512.ll
[DAGCombiner][X86][AArch64] (x - C) + y -> (x + y) - C fold. Try 2
2019-05-30 20:37:49 +00:00
vector-idiv-udiv-128.ll
[X86][SSE] Lower shuffle as ANY_EXTEND_VECTOR_INREG
2019-08-10 16:46:07 +00:00
vector-idiv-udiv-256.ll
[X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C)
2019-05-25 18:02:17 +00:00
vector-idiv-udiv-512.ll
[X86] lowerBuildVectorToBitOp - support build_vector(shift()) -> shift(build_vector(),C)
2019-05-25 18:02:17 +00:00
vector-idiv-v2i32.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vector-idiv.ll
…
vector-interleave.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
vector-intrinsics.ll
…
vector-lzcnt-128.ll
…
vector-lzcnt-256.ll
…
vector-lzcnt-512.ll
…
vector-lzcnt-sub128.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vector-merge-store-fp-constants.ll
…
vector-mul.ll
[X86] In decomposeMulByConstant, legalize the VT before querying whether the multiply is legal
2019-08-01 18:49:07 +00:00
vector-mulfix-legalize.ll
[SelectionDAG] Widen vector results of SMULFIX/UMULFIX/SMULFIXSAT
2019-08-11 19:27:06 +00:00
vector-narrow-binop.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-partial-undef.ll
[TargetLowering] try harder to determine undef elements of vector binops
2019-02-01 15:35:12 +00:00
vector-pcmp.ll
[SelectionDAG] computeKnownBits - support constant pool values from target
2019-05-24 10:03:11 +00:00
vector-popcnt-128.ll
…
vector-popcnt-256.ll
…
vector-popcnt-512.ll
…
vector-reduce-add.ll
[X86] Add some reduction add test cases that show sub-optimal code on avx2 and later.
2019-08-12 06:55:58 +00:00
vector-reduce-and-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-and.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-fadd-fast.ll
[X86] Regenerate fast fadd reduction tests. NFCI
2019-06-24 16:25:30 +00:00
vector-reduce-fadd.ll
Change semantics of fadd/fmul vector reductions.
2019-06-11 08:22:10 +00:00
vector-reduce-fmax-nnan.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmax.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmin-nnan.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmin.ll
Improve reduction intrinsics by overloading result value.
2019-06-13 09:37:38 +00:00
vector-reduce-fmul-fast.ll
Change semantics of fadd/fmul vector reductions.
2019-06-11 08:22:10 +00:00
vector-reduce-fmul.ll
Change semantics of fadd/fmul vector reductions.
2019-06-11 08:22:10 +00:00
vector-reduce-mul.ll
Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
2019-08-13 09:33:25 +00:00
vector-reduce-or-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-or.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-smax.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-smin.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-umax.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-umin.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-xor-bool.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-reduce-xor.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-rem.ll
[CodeGen] Unify MBB reference format in both MIR and debug output
2017-12-04 17:18:51 +00:00
vector-rotate-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-rotate-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-rotate-512.ll
…
vector-sext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-ashr-128.ll
…
vector-shift-ashr-256.ll
…
vector-shift-ashr-512.ll
…
vector-shift-ashr-sub128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-by-select-loop.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
vector-shift-lshr-128.ll
[CodeGenPrepare][x86] shift both sides of a vector select when profitable
2019-06-16 15:29:03 +00:00
vector-shift-lshr-256.ll
…
vector-shift-lshr-512.ll
…
vector-shift-lshr-sub128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shift-shl-128.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-shift-shl-256.ll
[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::VECTOR_SHUFFLE
2019-08-07 11:43:13 +00:00
vector-shift-shl-512.ll
…
vector-shift-shl-sub128.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shuffle-128-unpck.ll
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vector-shuffle-128-v2.ll
[X86] In lowerVectorShuffle, instead of creating a new node to canonicalize the shuffle mask by commuting, just commute the mask and swap V1/V2.
2019-07-23 18:46:15 +00:00
vector-shuffle-128-v4.ll
[X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess into isLoadBitCastBeneficial/isStoreBitCastBeneficial to allow X86 to bypass it
2019-07-09 19:55:28 +00:00
vector-shuffle-128-v8.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
vector-shuffle-128-v16.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shuffle-256-v4.ll
[X86][AVX] Add PR34359 shuffle test case.
2019-07-12 17:42:32 +00:00
vector-shuffle-256-v8.ll
[X86][SSE] Lower shuffle as ANY_EXTEND_VECTOR_INREG
2019-08-10 16:46:07 +00:00
vector-shuffle-256-v16.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
vector-shuffle-256-v32.ll
[X86][AVX1] Combine concat_vectors(pshufd(x,c),pshufd(y,c)) -> vpermilps(concat_vectors(x,y),c)
2019-07-04 10:17:10 +00:00
vector-shuffle-512-v8.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
vector-shuffle-512-v16.ll
[X86][AVX] combineX86ShufflesRecursively - peek through extract_subvector
2019-07-03 15:46:08 +00:00
vector-shuffle-512-v32.ll
[X86][AVX] SimplifyDemandedVectorElts - combine PERMPD(x) -> EXTRACTF128(X)
2019-06-27 11:16:03 +00:00
vector-shuffle-512-v64.ll
…
vector-shuffle-avx512.ll
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vector-shuffle-combining-avx2.ll
[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.
2019-06-21 17:24:21 +00:00
vector-shuffle-combining-avx512bw.ll
[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)
2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx512bwvl.ll
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vector-shuffle-combining-avx512vbmi.ll
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vector-shuffle-combining-avx.ll
[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)
2019-06-15 17:05:24 +00:00
vector-shuffle-combining-sse4a.ll
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vector-shuffle-combining-sse41.ll
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vector-shuffle-combining-ssse3.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
vector-shuffle-combining-xop.ll
[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)
2019-06-15 17:05:24 +00:00
vector-shuffle-combining.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-shuffle-masked.ll
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vector-shuffle-mmx.ll
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vector-shuffle-sse1.ll
[X86] Separate the memory size of vzext_load/vextract_store from the element size of the result type. Use them improve the codegen of v2f32 loads/stores with sse1 only.
2019-07-15 02:02:31 +00:00
vector-shuffle-sse4a.ll
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vector-shuffle-sse41.ll
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vector-shuffle-v1.ll
[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND
2019-06-25 10:51:15 +00:00
vector-shuffle-v48.ll
[X86][SSE] Regenerate v48 shuffle test on a variety of targets
2019-06-27 11:22:23 +00:00
vector-shuffle-variable-128.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vector-shuffle-variable-256.ll
[X86] Add PS<->PD domain changing support for MOVH/MOVL load instructions and MOVH store instructions.
2019-07-06 17:59:57 +00:00
vector-sqrt.ll
[X86] Merge the FR128 and VR128 regclass since they have identical spill and alignment characteristics.
2018-07-16 06:56:09 +00:00
vector-trunc-math.ll
[X86] When using AND+PACKUS in lowerV16I8Shuffle, generate the build vector directly in v16i8 with the correct 0x00 or 0xFF elements rather than using another VT and bitcasting it.
2019-07-22 19:58:49 +00:00
vector-trunc-packus.ll
[X86] Allow combineTruncateWithSat to use pack instructions for i16->i8 without AVX512BW.
2019-08-12 22:18:23 +00:00
vector-trunc-ssat.ll
[X86] Allow combineTruncateWithSat to use pack instructions for i16->i8 without AVX512BW.
2019-08-12 22:18:23 +00:00
vector-trunc-usat.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-trunc.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
vector-truncate-combine.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-tzcnt-128.ll
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vector-tzcnt-256.ll
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vector-tzcnt-512.ll
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vector-unsigned-cmp.ll
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
2018-10-09 19:05:50 +00:00
vector-variable-idx2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-variable-idx.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vector-width-store-merge.ll
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vector-zext.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vector-zmov.ll
[X86] Add a DAG combine to turn vzmovl+load into vzload if the load isn't volatile. Remove isel patterns for vzmovl+load
2019-06-25 17:08:26 +00:00
vector.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vectorcall.ll
[X86] Handle COPYs of physregs better (regalloc hints)
2018-09-19 18:59:08 +00:00
version_directive.ll
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vfcmp.ll
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viabs.ll
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virtreg-physreg-def-regallocfast.mir
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virtual-registers-cleared-in-machine-functions-liveins.ll
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visibility2.ll
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visibility.ll
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vmaskmov-offset.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
vmovq.ll
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volatile-memstores-nooverlapping-load-stores.ll
Fixing @llvm.memcpy not honoring volatile.
2019-07-09 09:53:36 +00:00
volatile.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vortex-bug.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vp2intersect_multiple_pairs.ll
[X86] Regenerate vp2intersect tests
2019-07-31 12:17:10 +00:00
vpshufbitqbm-intrinsics-upgrade.ll
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vpshufbitqbm-intrinsics.ll
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vsel-cmp-load.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vselect-2.ll
[X86] Allow execution domain fixing to turn SHUFPD into SHUFPS.
2019-07-08 06:52:49 +00:00
vselect-avx.ll
[CodeGen][SelectionDAG] More efficient code for X % C == 0 (SREM case)
2019-08-13 14:57:37 +00:00
vselect-constants.ll
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vselect-minmax.ll
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vselect-packss.ll
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vselect-pcmp.ll
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vselect-zero.ll
[x86] limit transform for select-of-fp-constants
2018-11-25 17:27:02 +00:00
vselect.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vshift_scalar.ll
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vshift_split2.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vshift_split.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
vshift-1.ll
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vshift-2.ll
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vshift-3.ll
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vshift-4.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
vshift-5.ll
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vshift-6.ll
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vsplit-and.ll
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vzero-excess.ll
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waitpkg-intrinsics.ll
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warn-stack.ll
[SSP, 2/2] Create llvm.stackguard() intrinsic and lower it to LOAD_STACK_GUARD
2016-04-19 19:40:37 +00:00
wbinvd-intrinsic.ll
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wbnoinvd-intrinsic.ll
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weak_def_can_be_hidden.ll
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weak-undef.ll
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weak.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
webkit-jscc.ll
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wide-fma-contraction.ll
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wide-integer-cmp.ll
Correct dwarf unwind information in function epilogue
2018-04-24 10:32:08 +00:00
wide-integer-fold.ll
X86: Do not use llc -march in tests.
2017-08-02 00:28:10 +00:00
widen_arith-1.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_arith-2.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_arith-3.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_arith-4.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_arith-5.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_arith-6.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_bitops-0.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_bitops-1.ll
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widen_cast-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-3.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-4.ll
Revert r368339 "[MBP] Disable aggressive loop rotate in plain mode"
2019-08-12 14:23:13 +00:00
widen_cast-5.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_cast-6.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_compare-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-3.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conv-4.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_conversions.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
widen_extract-1.ll
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widen_load-0.ll
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widen_load-1.ll
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widen_load-2.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
widen_load-3.ll
[x86] avoid vector load narrowing with extracted store uses (PR42305)
2019-06-19 18:13:47 +00:00
widen_mul.ll
Recommit r368079 "[X86] Remove uses of the -x86-experimental-vector-widening-legalization flag from test/CodeGen/X86/"
2019-08-07 16:33:37 +00:00
widen_shuffle-1.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
WidenArith.ll
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widened-broadcast.ll
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win32_sret.ll
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win32-bool.ll
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win32-eh-available-externally.ll
IR: print value numbers for unnamed function arguments
2019-08-03 14:28:34 +00:00
win32-eh-states.ll
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win32-eh.ll
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win32-pic-jumptable.ll
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win32-preemption.ll
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win32-seh-catchpad-realign.ll
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win32-seh-catchpad.ll
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win32-seh-nested-finally.ll
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win32-spill-xmm.ll
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win32-ssp.ll
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win64_alloca_dynalloca.ll
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win64_call_epi.ll
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win64_eh_leaf2.ll
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win64_eh_leaf.ll
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win64_eh.ll
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win64_frame.ll
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win64_nonvol.ll
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win64_params.ll
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win64_sibcall.ll
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win64_vararg.ll
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win64-bool.ll
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win64-byval.ll
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win64-funclet-savexmm.ll
[WinEH] Fix catch block parent frame pointer offset
2019-08-12 23:02:00 +00:00
win64-jumptable.ll
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win64-long-double.ll
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win64-nosse-csrs.ll
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win_chkstk.ll
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win_coreclr_chkstk_liveins.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
win_coreclr_chkstk.ll
[X86FixupLEAs] Turn optIncDec into a generic two address LEA optimizer. Support LEA64_32r properly.
2019-05-25 06:17:47 +00:00
win_cst_pool.ll
Standardize on MSVC behavior for triples with no environment
2019-07-08 21:05:20 +00:00
win-alloca-expander.ll
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win-catchpad-csrs.ll
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win-catchpad-nested-cxx.ll
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win-catchpad-nested.ll
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win-catchpad-varargs.ll
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win-catchpad.ll
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win-cleanuppad.ll
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win-funclet-cfi.ll
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win-mixed-ehpersonality.ll
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win-smallparams.ll
[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)
2018-05-01 19:26:15 +00:00
windows-itanium-alloca.ll
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wineh-coreclr.ll
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wineh-exceptionpointer.ll
[WinEH] Use operand bundles to describe call sites
2015-12-15 21:27:27 +00:00
wineh-no-ehpads.ll
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x32-cet-intrinsics.ll
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x32-function_pointer-1.ll
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
2015-02-27 21:17:42 +00:00
x32-function_pointer-2.ll
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x32-function_pointer-3.ll
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x32-indirectbr.ll
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x32-landingpad.ll
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x32-lea-1.ll
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x32-movtopush64.ll
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x32-va_start.ll
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x64-cet-intrinsics.ll
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x86_64-mul-by-const.ll
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x86-16.ll
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x86-32-intrcc.ll
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x86-32-vector-calling-conv.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-baseptr.ll
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x86-64-bittest-logic.ll
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x86-64-call.ll
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x86-64-disp.ll
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x86-64-double-precision-shift-left.ll
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x86-64-double-precision-shift-right.ll
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x86-64-double-shifts-Oz-Os-O2.ll
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x86-64-double-shifts-var.ll
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x86-64-extend-shift.ll
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x86-64-flags-intrinsics.ll
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x86-64-gv-offset.ll
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x86-64-intrcc-nosse.ll
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x86-64-intrcc.ll
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x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-ms_abi-vararg.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic-12.ll
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x86-64-pic.ll
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x86-64-plt-relative-reloc.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
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x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-64-veccallcc.ll
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x86-big-ret.ll
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x86-cmov-converter.ll
[MBP] Move a latch block with conditional exit and multi predecessors to top of loop
2019-06-14 23:08:59 +00:00
x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interleaved-access.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
x86-interleaved-check.ll
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x86-interrupt_cc.ll
[WinEH] Allocate space in funclets stack to save XMM CSRs
2019-07-26 07:33:15 +00:00
x86-interrupt_cld.ll
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x86-interrupt_vzeroupper.ll
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x86-mixed-alignment-dagcombine.ll
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x86-no_caller_saved_registers-preserve.ll
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x86-no_caller_saved_registers.ll
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x86-plt-relative-reloc.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
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x86-shifts.ll
Recommit r367901 "[X86] Enable -x86-experimental-vector-widening-legalization by default."
2019-08-07 16:24:26 +00:00
x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll
[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)
2019-06-25 17:29:18 +00:00
x86-store-gv-addr.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-upgrade-avx-vbroadcast.ll
…
x86-win64-shrink-wrapping.ll
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x87.ll
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xaluo.ll
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xchg-nofold.ll
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
2019-06-13 13:56:19 +00:00
xmm-r64.ll
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xmulo.ll
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xop-ifma.ll
Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..."
2019-06-25 01:32:42 +00:00
xop-intrinsics-fast-isel.ll
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xop-intrinsics-x86_64-upgrade.ll
…
xop-intrinsics-x86_64.ll
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xop-mask-comments.ll
…
xop-pcmov.ll
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xor-combine-debugloc.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
xor-icmp.ll
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xor-select-i1-combine.ll
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xor.ll
Revert r368276 "[TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT"
2019-08-13 09:33:25 +00:00
xray-attribute-instrumentation.ll
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xray-custom-log.ll
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xray-empty-firstmbb.mir
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xray-empty-function.mir
Followup on Proposal to move MIR physical register namespace to '$' sigil.
2018-01-31 22:04:26 +00:00
xray-log-args.ll
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xray-loop-detection.ll
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xray-multiplerets-in-blocks.mir
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xray-section-group.ll
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xray-selective-instrumentation-miss.ll
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xray-selective-instrumentation.ll
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xray-tail-call-sled.ll
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xray-typed-event-log.ll
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xtest.ll
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zero-remat.ll
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zext-demanded.ll
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zext-extract_subreg.ll
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zext-fold.ll
…
zext-inreg-0.ll
…
zext-inreg-1.ll
…
zext-logicop-shift-load.ll
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zext-sext.ll
[DAGCombiner][X86][AArch64][AMDGPU] (x + C) - y -> (x - y) + C fold. Try 3
2019-05-30 20:36:54 +00:00
zext-shl.ll
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zext-trunc.ll
…
zlib-longest-match.ll
…