d912a9ba9b
Summary: Since the target has no significant advantage of vectorization, vector instructions bous threshold bonus should be optional. amdgpu-inline-arg-alloca-cost parameter default value and the target InliningThresholdMultiplier value tuned then respectively. Reviewers: arsenm, rampitec Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, eraman, hiraditya, haicheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64642 llvm-svn: 366348
32 lines
1.2 KiB
LLVM
32 lines
1.2 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-inline --inline-threshold=1 < %s | FileCheck %s
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define hidden <16 x i32> @div_vecbonus(<16 x i32> %x, <16 x i32> %y) {
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entry:
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%div.1 = udiv <16 x i32> %x, %y
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%div.2 = udiv <16 x i32> %div.1, %y
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%div.3 = udiv <16 x i32> %div.2, %y
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%div.4 = udiv <16 x i32> %div.3, %y
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%div.5 = udiv <16 x i32> %div.4, %y
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%div.6 = udiv <16 x i32> %div.5, %y
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%div.7 = udiv <16 x i32> %div.6, %y
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%div.8 = udiv <16 x i32> %div.7, %y
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%div.9 = udiv <16 x i32> %div.8, %y
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%div.10 = udiv <16 x i32> %div.9, %y
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%div.11 = udiv <16 x i32> %div.10, %y
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%div.12 = udiv <16 x i32> %div.11, %y
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ret <16 x i32> %div.12
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}
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; CHECK-LABEL: define amdgpu_kernel void @caller_vecbonus
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; CHECK-NOT: udiv
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; CHECK: tail call <16 x i32> @div_vecbonus
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; CHECK: ret void
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define amdgpu_kernel void @caller_vecbonus(<16 x i32> addrspace(1)* nocapture %x, <16 x i32> addrspace(1)* nocapture readonly %y) {
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entry:
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%tmp = load <16 x i32>, <16 x i32> addrspace(1)* %x
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%tmp1 = load <16 x i32>, <16 x i32> addrspace(1)* %y
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%div.i = tail call <16 x i32> @div_vecbonus(<16 x i32> %tmp, <16 x i32> %tmp1)
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store <16 x i32> %div.i, <16 x i32> addrspace(1)* %x
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ret void
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}
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