This patch adds a simplistic backend that gathers all target-specific SelectionDAG nodes and emits descriptions for most of them. This includes generating node enumeration, node names, and information about node "prototype" that can be used to verify that a node is valid. The patch also extends SDNode by adding target-specific flags, which are also included in the generated tables. Part of #119709, [RFC](https://discourse.llvm.org/t/rfc-tablegen-erating-sdnode-descriptions/83627). Pull Request: https://github.com/llvm/llvm-project/pull/123002
184 lines
6.5 KiB
TableGen
184 lines
6.5 KiB
TableGen
// RUN: split-file %s %t
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//--- no-nodes.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/no-nodes.td \
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// RUN: | FileCheck %t/no-nodes.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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// CHECK: #ifdef GET_SDNODE_ENUM
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// CHECK-NEXT: #undef GET_SDNODE_ENUM
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// CHECK-EMPTY:
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// CHECK-NEXT: namespace llvm::MyTargetISD {
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// CHECK-EMPTY:
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// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm::MyTargetISD
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// CHECK-EMPTY:
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// CHECK-NEXT: #endif // GET_SDNODE_ENUM
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// CHECK-EMPTY:
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// CHECK-NEXT: #ifdef GET_SDNODE_DESC
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// CHECK-NEXT: #undef GET_SDNODE_DESC
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// CHECK-EMPTY:
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// CHECK-NEXT: namespace llvm {
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// CHECK-EMPTY:
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// CHECK-NEXT: #ifdef __GNUC__
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// CHECK-NEXT: #pragma GCC diagnostic push
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// CHECK-NEXT: #pragma GCC diagnostic ignored "-Woverlength-strings"
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// CHECK-NEXT: #endif
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// CHECK-NEXT: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "\0";
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// CHECK-NEXT: #ifdef __GNUC__
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// CHECK-NEXT: #pragma GCC diagnostic pop
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// CHECK-NEXT: #endif
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/0, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm
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// CHECK-EMPTY:
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// CHECK-NEXT: #endif // GET_SDNODE_DESC
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//--- trivial-node.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/trivial-node.td \
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// RUN: | FileCheck %t/trivial-node.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;
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// CHECK: namespace llvm::MyTargetISD {
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// CHECK-EMPTY:
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// CHECK-NEXT: enum GenNodeType : unsigned {
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// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm::MyTargetISD
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// CHECK: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "MyTargetISD::NOOP\0"
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// CHECK-NEXT: "\0";
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// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* dummy */ {SDTCisVT, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: {0, 0, 0, 0, 0, 0, 0, 0}, // NOOP
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/1, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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//--- advanced.td
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// RUN: llvm-tblgen -gen-sd-node-info -I %p/../../../include %t/advanced.td \
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// RUN: | FileCheck %t/advanced.td
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include "llvm/Target/Target.td"
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def MyTarget : Target;
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def my_node_1 : SDNode<
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"MyTargetISD::NODE_1",
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SDTypeProfile<1, 1, [SDTCisVT<0, i1>, SDTCisVT<1, i2>]>,
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[SDNPHasChain]
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>;
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let TSFlags = 42 in
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def my_node_2 : SDNode<
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"MyTargetISD::NODE_2",
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SDTypeProfile<3, 1, [
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// Prefix of my_node_3 constraints.
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SDTCisVT<0, i1>,
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SDTCisPtrTy<1>,
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SDTCisInt<2>,
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SDTCisFP<3>,
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]>,
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[SDNPMayStore, SDNPMayLoad, SDNPSideEffect,
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SDNPMemOperand, SDNPVariadic]
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>;
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let IsStrictFP = true, TSFlags = 24 in
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def my_node_3 : SDNode<
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"MyTargetISD::NODE_3",
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SDTypeProfile<2, -1, [
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SDTCisVT<0, i1>,
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SDTCisPtrTy<1>,
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SDTCisInt<2>,
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SDTCisFP<3>,
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SDTCisVec<4>,
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SDTCisSameAs<6, 5>,
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SDTCisVTSmallerThanOp<8, 7>,
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SDTCisOpSmallerThanOp<10, 9>,
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SDTCisEltOfVec<12, 11>,
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SDTCisSubVecOfVec<14, 13>,
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SDTCVecEltisVT<15, i32>,
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SDTCisSameNumEltsAs<17, 16>,
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SDTCisSameSizeAs<19, 18>,
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]>,
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[SDNPCommutative, SDNPAssociative, SDNPHasChain,
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SDNPOutGlue, SDNPInGlue, SDNPOptInGlue]
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>;
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// CHECK: namespace llvm::MyTargetISD {
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// CHECK-EMPTY:
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// CHECK-NEXT: enum GenNodeType : unsigned {
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// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
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// CHECK-NEXT: NODE_2,
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// CHECK-NEXT: NODE_3,
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_3 + 1;
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// CHECK-EMPTY:
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// CHECK-NEXT: } // namespace llvm::MyTargetISD
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// CHECK: static const char MyTargetSDNodeNames[] =
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// CHECK-NEXT: "MyTargetISD::NODE_1\0"
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// CHECK-NEXT: "MyTargetISD::NODE_2\0"
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// CHECK-NEXT: "MyTargetISD::NODE_3\0"
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// CHECK-NEXT: "\0";
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// CHECK: static const SDTypeConstraint MyTargetSDTypeConstraints[] = {
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// CHECK-NEXT: /* 0 */ {SDTCisVT, 1, 0, MVT::i2},
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// CHECK-SAME: {SDTCisVT, 0, 0, MVT::i1},
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// CHECK-NEXT: /* 2 */ {SDTCisSameSizeAs, 19, 18, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisSameNumEltsAs, 17, 16, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCVecEltisVT, 15, 0, MVT::i32},
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// CHECK-SAME: {SDTCisSubVecOfVec, 14, 13, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisEltOfVec, 12, 11, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisOpSmallerThanOp, 10, 9, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisVTSmallerThanOp, 8, 7, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisSameAs, 6, 5, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisVec, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisFP, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisInt, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisPtrTy, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
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// CHECK-SAME: {SDTCisVT, 0, 0, MVT::i1},
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeDesc MyTargetSDNodeDescs[] = {
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// CHECK-NEXT: {1, 1, 0|1<<SDNPHasChain, 0, 0, 0, 0, 2}, // NODE_1
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// CHECK-NEXT: {3, 1, 0|1<<SDNPVariadic|1<<SDNPMemOperand, 0, 42, 20, 11, 4}, // NODE_2
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// CHECK-NEXT: {2, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPInGlue|1<<SDNPOptInGlue, 0|1<<SDNFIsStrictFP, 24, 40, 2, 13}, // NODE_3
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// CHECK-NEXT: };
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// CHECK-EMPTY:
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// CHECK-NEXT: static const SDNodeInfo MyTargetGenSDNodeInfo(
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// CHECK-NEXT: /*NumOpcodes=*/3, MyTargetSDNodeDescs,
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// CHECK-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
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