660e34fd38
The PR adds the support optionally enabled/disabled FP-registers to LLDB `RegisterInfoPOSIX_riscv64`. This situation might take place for RISC-V builds having no FP-registers, like RV64IMAC or RV64IMACV. To aim this, patch adds `opt_regsets` flags mechanism. It re-works RegisterInfo class to work with flexibly allocated (depending on `opt_regsets` flag) `m_register_sets` and `m_register_infos` vectors instead of statically defined structures. The registration of regsets is being arranged by `m_per_regset_regnum_range` map. The patch flows are spread to `NativeRegisterContextLinux_riscv64` and `RegisterContextCorePOSIX_riscv64` classes, that were tested on: - x86_64 host working with coredumps - RV64GC and RV64IMAC targets working with coredumps and natively in run-time with binaries `EmulateInstructionRISCV` is out of scope of this patch, and its behavior did not change, using maximum set of registers. According testcase built for RV64IMAC (no-FPR) was added to `TestLinuxCore.py`.
82 lines
2.5 KiB
C++
82 lines
2.5 KiB
C++
//===-- RegisterContextPOSIX_riscv64.cpp ------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "lldb/Target/Process.h"
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#include "lldb/Target/Target.h"
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#include "lldb/Target/Thread.h"
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#include "lldb/Utility/DataBufferHeap.h"
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#include "lldb/Utility/DataExtractor.h"
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#include "lldb/Utility/Endian.h"
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#include "lldb/Utility/RegisterValue.h"
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#include "lldb/Utility/Scalar.h"
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#include "llvm/Support/Compiler.h"
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#include "RegisterContextPOSIX_riscv64.h"
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using namespace lldb;
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using namespace lldb_private;
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RegisterContextPOSIX_riscv64::RegisterContextPOSIX_riscv64(
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lldb_private::Thread &thread,
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std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info)
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: lldb_private::RegisterContext(thread, 0),
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m_register_info_up(std::move(register_info)) {}
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RegisterContextPOSIX_riscv64::~RegisterContextPOSIX_riscv64() = default;
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void RegisterContextPOSIX_riscv64::invalidate() {}
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void RegisterContextPOSIX_riscv64::InvalidateAllRegisters() {}
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size_t RegisterContextPOSIX_riscv64::GetRegisterCount() {
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return m_register_info_up->GetRegisterCount();
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}
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size_t RegisterContextPOSIX_riscv64::GetGPRSize() {
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return m_register_info_up->GetGPRSize();
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}
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unsigned RegisterContextPOSIX_riscv64::GetRegisterSize(unsigned int reg) {
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return m_register_info_up->GetRegisterInfo()[reg].byte_size;
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}
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unsigned RegisterContextPOSIX_riscv64::GetRegisterOffset(unsigned int reg) {
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return m_register_info_up->GetRegisterInfo()[reg].byte_offset;
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}
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const lldb_private::RegisterInfo *
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RegisterContextPOSIX_riscv64::GetRegisterInfoAtIndex(size_t reg) {
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if (reg < GetRegisterCount())
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return &GetRegisterInfo()[reg];
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return nullptr;
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}
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size_t RegisterContextPOSIX_riscv64::GetRegisterSetCount() {
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return m_register_info_up->GetRegisterSetCount();
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}
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const lldb_private::RegisterSet *
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RegisterContextPOSIX_riscv64::GetRegisterSet(size_t set) {
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return m_register_info_up->GetRegisterSet(set);
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}
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const lldb_private::RegisterInfo *
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RegisterContextPOSIX_riscv64::GetRegisterInfo() {
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return m_register_info_up->GetRegisterInfo();
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}
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bool RegisterContextPOSIX_riscv64::IsGPR(unsigned int reg) {
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return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_riscv64::GPRegSet;
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}
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bool RegisterContextPOSIX_riscv64::IsFPR(unsigned int reg) {
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return m_register_info_up->IsFPReg(reg);
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}
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