c71cced0aa
output As part of the unification of the debug format and the MIR format, always use `printReg` to print all kinds of registers. Updated the tests using '_' instead of '%noreg' until we decide which one we want to be the default one. Differential Revision: https://reviews.llvm.org/D40421 llvm-svn: 319445
13 lines
435 B
YAML
13 lines
435 B
YAML
# RUN: llc -mtriple=armv7-none-eabi -verify-machineinstrs -run-pass arm-ldst-opt %s -o - | FileCheck %s
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---
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# CHECK-LABEL: name: f
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name: f
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# Make sure the load into %r0 doesn't clobber the base register before the second load uses it.
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# CHECK: %r3 = LDRi12 %r0, 12, 14, %noreg
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# CHECK-NEXT: %r0 = LDRi12 %r0, 8, 14, %noreg
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body: |
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bb.0:
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liveins: %r0, %r3
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%r0, %r3 = LDRD %r0, %noreg, 8, 14, %noreg
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...
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