1e68724d24
Summary: This is a resurrection of work first proposed and discussed in Aug 2015: http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html and initially landed (but then backed out) in Nov 2015: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument which is required to be a constant integer. It represents the alignment of the dest (and source), and so must be the minimum of the actual alignment of the two. This change is the first in a series that allows source and dest to each have their own alignments by using the alignment attribute on their arguments. In this change we: 1) Remove the alignment argument. 2) Add alignment attributes to the source & dest arguments. We, temporarily, require that the alignments for source & dest be equal. For example, code which used to read: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false) will now read call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false) Downstream users may have to update their lit tests that check for @llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script may help with updating the majority of your tests, but it does not catch all possible patterns so some manual checking and updating will be required. s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g The remaining changes in the series will: Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing source and dest alignments. Step 3) Update Clang to use the new IRBuilder API. Step 4) Update Polly to use the new IRBuilder API. Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API, and those that use use MemIntrinsicInst::[get|set]Alignment() to use getDestAlignment() and getSourceAlignment() instead. Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the MemIntrinsicInst::[get|set]Alignment() methods. Reviewers: pete, hfinkel, lhames, reames, bollu Reviewed By: reames Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits Differential Revision: https://reviews.llvm.org/D41675 llvm-svn: 322965
141 lines
6.6 KiB
LLVM
141 lines
6.6 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -infer-address-spaces %s | FileCheck %s
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; Check that volatile users of addrspacecast are not replaced.
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; CHECK-LABEL: @volatile_load_flat_from_global(
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; CHECK: load volatile i32, i32 addrspace(4)*
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; CHECK: store i32 %val, i32 addrspace(1)*
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define amdgpu_kernel void @volatile_load_flat_from_global(i32 addrspace(1)* nocapture %input, i32 addrspace(1)* nocapture %output) #0 {
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%tmp0 = addrspacecast i32 addrspace(1)* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32 addrspace(1)* %output to i32 addrspace(4)*
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%val = load volatile i32, i32 addrspace(4)* %tmp0, align 4
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store i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_load_flat_from_constant(
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; CHECK: load volatile i32, i32 addrspace(4)*
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; CHECK: store i32 %val, i32 addrspace(1)*
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define amdgpu_kernel void @volatile_load_flat_from_constant(i32 addrspace(2)* nocapture %input, i32 addrspace(1)* nocapture %output) #0 {
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%tmp0 = addrspacecast i32 addrspace(2)* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32 addrspace(1)* %output to i32 addrspace(4)*
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%val = load volatile i32, i32 addrspace(4)* %tmp0, align 4
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store i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_load_flat_from_group(
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; CHECK: load volatile i32, i32 addrspace(4)*
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; CHECK: store i32 %val, i32 addrspace(3)*
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define amdgpu_kernel void @volatile_load_flat_from_group(i32 addrspace(3)* nocapture %input, i32 addrspace(3)* nocapture %output) #0 {
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%tmp0 = addrspacecast i32 addrspace(3)* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32 addrspace(3)* %output to i32 addrspace(4)*
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%val = load volatile i32, i32 addrspace(4)* %tmp0, align 4
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store i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_load_flat_from_private(
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; CHECK: load volatile i32, i32 addrspace(4)*
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; CHECK: store i32 %val, i32*
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define amdgpu_kernel void @volatile_load_flat_from_private(i32* nocapture %input, i32* nocapture %output) #0 {
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%tmp0 = addrspacecast i32* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32* %output to i32 addrspace(4)*
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%val = load volatile i32, i32 addrspace(4)* %tmp0, align 4
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store i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_store_flat_to_global(
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; CHECK: load i32, i32 addrspace(1)*
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; CHECK: store volatile i32 %val, i32 addrspace(4)*
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define amdgpu_kernel void @volatile_store_flat_to_global(i32 addrspace(1)* nocapture %input, i32 addrspace(1)* nocapture %output) #0 {
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%tmp0 = addrspacecast i32 addrspace(1)* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32 addrspace(1)* %output to i32 addrspace(4)*
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%val = load i32, i32 addrspace(4)* %tmp0, align 4
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store volatile i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_store_flat_to_group(
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; CHECK: load i32, i32 addrspace(3)*
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; CHECK: store volatile i32 %val, i32 addrspace(4)*
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define amdgpu_kernel void @volatile_store_flat_to_group(i32 addrspace(3)* nocapture %input, i32 addrspace(3)* nocapture %output) #0 {
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%tmp0 = addrspacecast i32 addrspace(3)* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32 addrspace(3)* %output to i32 addrspace(4)*
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%val = load i32, i32 addrspace(4)* %tmp0, align 4
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store volatile i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_store_flat_to_private(
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; CHECK: load i32, i32*
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; CHECK: store volatile i32 %val, i32 addrspace(4)*
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define amdgpu_kernel void @volatile_store_flat_to_private(i32* nocapture %input, i32* nocapture %output) #0 {
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%tmp0 = addrspacecast i32* %input to i32 addrspace(4)*
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%tmp1 = addrspacecast i32* %output to i32 addrspace(4)*
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%val = load i32, i32 addrspace(4)* %tmp0, align 4
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store volatile i32 %val, i32 addrspace(4)* %tmp1, align 4
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ret void
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}
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; CHECK-LABEL: @volatile_atomicrmw_add_group_to_flat(
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; CHECK: addrspacecast i32 addrspace(3)* %group.ptr to i32 addrspace(4)*
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; CHECK: atomicrmw volatile add i32 addrspace(4)*
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define i32 @volatile_atomicrmw_add_group_to_flat(i32 addrspace(3)* %group.ptr, i32 %y) #0 {
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%cast = addrspacecast i32 addrspace(3)* %group.ptr to i32 addrspace(4)*
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%ret = atomicrmw volatile add i32 addrspace(4)* %cast, i32 %y seq_cst
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ret i32 %ret
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}
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; CHECK-LABEL: @volatile_atomicrmw_add_global_to_flat(
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; CHECK: addrspacecast i32 addrspace(1)* %global.ptr to i32 addrspace(4)*
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; CHECK: %ret = atomicrmw volatile add i32 addrspace(4)*
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define i32 @volatile_atomicrmw_add_global_to_flat(i32 addrspace(1)* %global.ptr, i32 %y) #0 {
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%cast = addrspacecast i32 addrspace(1)* %global.ptr to i32 addrspace(4)*
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%ret = atomicrmw volatile add i32 addrspace(4)* %cast, i32 %y seq_cst
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ret i32 %ret
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}
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; CHECK-LABEL: @volatile_cmpxchg_global_to_flat(
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; CHECK: addrspacecast i32 addrspace(1)* %global.ptr to i32 addrspace(4)*
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; CHECK: cmpxchg volatile i32 addrspace(4)*
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define { i32, i1 } @volatile_cmpxchg_global_to_flat(i32 addrspace(1)* %global.ptr, i32 %cmp, i32 %val) #0 {
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%cast = addrspacecast i32 addrspace(1)* %global.ptr to i32 addrspace(4)*
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%ret = cmpxchg volatile i32 addrspace(4)* %cast, i32 %cmp, i32 %val seq_cst monotonic
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ret { i32, i1 } %ret
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}
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; CHECK-LABEL: @volatile_cmpxchg_group_to_flat(
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; CHECK: addrspacecast i32 addrspace(3)* %group.ptr to i32 addrspace(4)*
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; CHECK: cmpxchg volatile i32 addrspace(4)*
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define { i32, i1 } @volatile_cmpxchg_group_to_flat(i32 addrspace(3)* %group.ptr, i32 %cmp, i32 %val) #0 {
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%cast = addrspacecast i32 addrspace(3)* %group.ptr to i32 addrspace(4)*
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%ret = cmpxchg volatile i32 addrspace(4)* %cast, i32 %cmp, i32 %val seq_cst monotonic
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ret { i32, i1 } %ret
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}
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; FIXME: Shouldn't be losing names
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; CHECK-LABEL: @volatile_memset_group_to_flat(
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; CHECK: addrspacecast i8 addrspace(3)* %group.ptr to i8 addrspace(4)*
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; CHECK: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %1, i8 4, i64 32, i1 true)
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define amdgpu_kernel void @volatile_memset_group_to_flat(i8 addrspace(3)* %group.ptr, i32 %y) #0 {
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%cast = addrspacecast i8 addrspace(3)* %group.ptr to i8 addrspace(4)*
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call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %cast, i8 4, i64 32, i1 true)
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ret void
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}
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; CHECK-LABEL: @volatile_memset_global_to_flat(
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; CHECK: addrspacecast i8 addrspace(1)* %global.ptr to i8 addrspace(4)*
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; CHECK: call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %1, i8 4, i64 32, i1 true)
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define amdgpu_kernel void @volatile_memset_global_to_flat(i8 addrspace(1)* %global.ptr, i32 %y) #0 {
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%cast = addrspacecast i8 addrspace(1)* %global.ptr to i8 addrspace(4)*
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call void @llvm.memset.p4i8.i64(i8 addrspace(4)* align 4 %cast, i8 4, i64 32, i1 true)
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ret void
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}
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declare void @llvm.memset.p4i8.i64(i8 addrspace(4)* nocapture writeonly, i8, i64, i1) #1
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attributes #0 = { nounwind }
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attributes #1 = { argmemonly nounwind }
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