David Green 9ba7e2da00 [GlobalISel] Use replaceRegOrBuildCopy when legalizer-combining s/zext(undef) (#119850) ...

Similar to #119721, this helps remove some of the COPYs created by the
CSE builder.

2024-12-16 05:57:11 +00:00

..

aapcs_vararg_frame.ll

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arm64-atomic-128.ll

Revert "[AArch64] Enable subreg liveness tracking by default."

2024-12-12 17:22:15 +00:00

arm64-atomic.ll

Revert "[AArch64] Enable subreg liveness tracking by default."

2024-12-12 17:22:15 +00:00

arm64-callingconv-ios.ll

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arm64-callingconv.ll

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arm64-fallback.ll

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arm64-irtranslator-fmuladd.ll

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arm64-irtranslator-gep.ll

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arm64-irtranslator-stackprotect.ll

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arm64-irtranslator-switch.ll

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arm64-irtranslator.ll

[AArch64][GlobalISel] Do not create LIFETIME instructions in functions. (#115669)

2024-11-11 09:27:40 +00:00

arm64-pcsections.ll

Revert "[AArch64] Enable subreg liveness tracking by default."

2024-12-12 17:22:15 +00:00

arm64-regbankselect.mir

[MIR] Fix tests for flags in register info (#112179)

2024-10-14 18:28:54 +05:30

artifact-combine-unmerge.mir

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artifact-find-value.mir

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assert-align.ll

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atomic-anyextending-load-crash.ll

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builtin-return-address-pacret.ll

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byval-call.ll

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call-lowering-alias.ll

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call-lowering-const-bitcast-func.ll

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call-lowering-i128-on-stack.ll

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call-lowering-i256-crash.ll

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call-lowering-ifunc.ll

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call-lowering-signext.ll

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call-lowering-sret-demotion.ll

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call-lowering-tail-call-fallback.ll

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call-lowering-vectors.ll

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call-lowering-zeroext.ll

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call-translator-cse.ll

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call-translator-ios.ll

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call-translator-musttail.ll

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call-translator-tail-call-sret.ll

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call-translator-tail-call-weak.ll

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call-translator-tail-call.ll

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call-translator-variadic-musttail.ll

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call-translator.ll

[MIR] Fix tests for flags in register info (#112179)

2024-10-14 18:28:54 +05:30

combine-2-icmps-of-0-and-or.mir

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combine-add-of-sub.mir

[GlobalIsel] Combine G_ADD and G_SUB with constants (#97771)

2024-08-09 20:14:32 +02:00

combine-add.mir

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combine-and-or-disjoint-mask.mir

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combine-anyext-crash.mir

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combine-binop-undef-left-to-zero.mir

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combine-bitreverse-shift.ll

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combine-build-vector.mir

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combine-cannonicalize-fcmp.mir

[GlobalIsel] Canonicalize G_FCMP (#108891)

2024-09-17 09:42:04 +02:00

combine-canonicalize-icmp.mir

[GlobalIsel] Canonicalize G_ICMP (#108755)

2024-09-16 19:25:34 +02:00

combine-cast.mir

[GlobalISel] Fold ptrtoint(undef) and inttoptr(undef) to undef. (#119073)

2024-12-09 08:52:22 +00:00

combine-commute-const-infinite-loop.mir

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combine-commute-fp-const-lhs.mir

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combine-commute-int-const-lhs.mir

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combine-const-fold-barrier-rhs.mir

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combine-constant-fold-fma.mir

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combine-constant-fold-itofp-zero.mir

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combine-copy.mir

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combine-ext-debugloc.mir

[GlobalISel] Use replaceRegOrBuildCopy when legalizer-combining anyext(undef). (#119721)

2024-12-13 08:39:45 +00:00

combine-ext.mir

[GlobalIsel] Revisit ext of ext. (#102769)

2024-08-16 15:38:56 +02:00

combine-extract-vec-elt.mir

[GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (#115377)

2024-11-14 15:13:41 -08:00

combine-fabs.mir

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combine-fconstant.mir

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combine-flog2.mir

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combine-fminimum-fmaximum.mir

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combine-fminnum-fmaxnum.mir

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combine-fneg.mir

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combine-fpowi-optsize.ll

[GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (#95217)

2024-06-28 09:57:50 +02:00

combine-fpowi.mir

[GlobalISel][AArch64][AMDGPU] Expand FPOWI into series of multiplication (#95217)

2024-06-28 09:57:50 +02:00

combine-fptrunc.mir

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combine-freeze.mir

[GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (#115377)

2024-11-14 15:13:41 -08:00

combine-fshl.mir

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combine-fshr.mir

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combine-fsqrt.mir

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combine-icmp-of-binop-to-icmp-of-0.mir

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combine-icmp-to-lhs-known-bits.mir

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combine-insert-vec-elt.mir

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combine-integer-ll.ll

[GlobalIsel] Combine G_ADD and G_SUB with constants (#97771)

2024-08-09 20:14:32 +02:00

combine-integer.mir

Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"

2024-11-08 10:21:46 -08:00

combine-inttoptr-ptrtoint.mir

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combine-logic-of-compare.mir

[AArch64][GlobalISel] Disable fixed-point iteration in all Combiners

2024-08-16 15:15:29 +02:00

combine-mul-to-shl.mir

[GISel] Don't preserve NSW flag when converting G_MUL of INT_MIN to G_SHL. (#111230)

2024-10-05 10:27:09 -07:00

combine-mul.mir

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combine-mulo-with-2.mir

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combine-narrow-binop.mir

Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"

2024-11-08 10:21:46 -08:00

combine-op-trunc.mir

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combine-overflow.mir

[GlobalISel] Combine [S,U]SUBO (#116489)

2024-11-18 22:39:23 +01:00

combine-ptradd-int2ptr.mir

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combine-ptradd-reassociation.mir

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combine-ptrtoint.mir

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combine-sdiv.mir

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combine-select.mir

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combine-sext-debugloc.mir

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combine-sext-trunc-sextload.mir

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combine-shift-immed-mismatch-crash.mir

[GlobalISel] Combine G_UNMERGE_VALUES with anyext and build vector (#112370)

2024-10-19 09:41:43 +02:00

combine-shift-of-shifted-dbg-value-fallback.ll

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combine-shifts-undef.mir

[GlobalISel] Combine G_UNMERGE_VALUES with anyext and build vector (#112370)

2024-10-19 09:41:43 +02:00

combine-shufflevector.mir

[AArch64][GlobalISel] Create copy rather than single-element concat

2024-07-03 10:22:15 +01:00

combine-trunc.mir

[AArch64][GlobalISel] Add some post-legalization cast combines. (#112509)

2024-10-18 09:57:25 +01:00

combine-udiv.ll

Revert "[AArch64] Enable subreg liveness tracking by default."

2024-12-12 17:22:15 +00:00

combine-udiv.mir

[CodeGen] Emit more efficient magic numbers for exact udivs (#87161)

2024-07-17 12:19:02 -07:00

combine-udivrem-use-bug.mir

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combine-umulh-to-lshr.mir

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combine-unary-undef-to-zero.mir

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combine-unmerge.mir

[GlobalISel] Combine G_MERGE_VALUES of x and zero (#116283)

2024-11-16 08:00:21 +01:00

combine-vscale.mir

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combine-with-flags.mir

[GlobalIsel] Push cast through build vector (#104634)

2024-08-21 10:10:36 +02:00

combiner-load-store-indexing.ll

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constant-dbg-loc.ll

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constant-mir-debugify.mir

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contract-store.mir

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counter-fallback.ll

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darwin-tls-call-clobber.ll

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debug-cpp.ll

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debug-insts.ll

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debug-loc-legalize-tail-call.mir

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dynamic-alloca-lifetime.ll

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dynamic-alloca.ll

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endian_fallback.ll

[GlobalISel] Bail out early for big-endian (#103310)

2024-08-19 18:50:47 +01:00

fallback-nofastisel.ll

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fconstant-dbg-loc.ll

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fold-brcond-fcmp.mir

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fold-fp-select.mir

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fold-global-offsets-insertpt.mir

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fold-global-offsets-target-features.mir

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fold-global-offsets.mir

[AArch64][GlobalISel] Disable fixed-point iteration in all Combiners

2024-08-16 15:15:29 +02:00

fold-select.mir

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form-bitfield-extract-from-and.mir

[GlobalIsel][NFC] Modernize UBFX combine (#97513)

2024-07-03 09:19:40 +02:00

form-bitfield-extract-from-sextinreg.mir

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form-bitfield-extract-from-shr-and.mir

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form-bitfield-extract-from-shr.mir

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fp16-copy-gpr.mir

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fp128-legalize-crash-pr35690.mir

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fpenv.ll

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gisel-abort.ll

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gisel-commandline-option-fastisel.ll

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gisel-commandline-option.ll

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huge-switch.ll

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icmp-flags.mir

[GlobalISel] Import samesign flag (#114267)

2024-10-30 19:56:25 +01:00

implicit_def_rbs_crash.mir

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inline-asm.ll

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inline-memcpy-forced.mir

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inline-memcpy.mir

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inline-memmove.mir

[AArch64] Increase inline memmove limit to 16 stored registers (#111848)

2024-10-14 08:57:32 +01:00

inline-memset.mir

[GlobalIsel] Combine trunc of binop (#107721)

2024-09-11 15:04:55 +02:00

inline-small-memcpy.mir

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insert-vector-elt-pr63826.ll

Revert "[AArch64] Enable subreg liveness tracking by default."

2024-12-12 17:22:15 +00:00

integration-shuffle-vector.ll

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inttoptr_add.ll

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invoke-region.ll

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irtranslater-samesign.ll

[GlobalISel] Import samesign flag (#114267)

2024-10-30 19:56:25 +01:00

irtranslator-arguments.ll

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irtranslator-atomic-metadata.ll

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irtranslator-bitcast.ll

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irtranslator-block-order.ll

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irtranslator-condbr-lower-tree.ll

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irtranslator-convert-fp16-intrinsics.ll

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irtranslator-delayed-stack-protector.ll

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irtranslator-dilocation.ll

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irtranslator-duplicate-types-param.ll

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irtranslator-exceptions.ll

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irtranslator-extends.ll

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irtranslator-extract-used-by-dbg.ll

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irtranslator-fixed-point-intrinsics.ll

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irtranslator-fp-min-max-intrinsics.ll

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irtranslator-fpenv.ll

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irtranslator-gep-flags.ll

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irtranslator-hoisted-constants.ll

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irtranslator-indirect-br-repeated-block.ll

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irtranslator-inline-asm.ll

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irtranslator-invoke-probabilities.ll

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irtranslator-load-metadata.ll

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irtranslator-localescape.ll

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irtranslator-max-address-space.ll

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irtranslator-memcpy-inline.ll

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irtranslator-memfunc-undef.ll

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irtranslator-nneg-disjoint.ll

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irtranslator-no-op-intrinsics.ll

[GISel] Add generic implementation for @llvm.expect.with.probability when optimizations are disabled (#117835)

2024-11-29 22:30:13 -05:00

irtranslator-no-unwind-inline-asm.ll

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irtranslator-one-by-n-vector-ptr-add.ll

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irtranslator-reductions.ll

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irtranslator-sincos.ll

[IR] Add llvm.sincos intrinsic (#109825)

2024-10-29 10:52:20 +00:00

irtranslator-split-vector-arg.ll

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irtranslator-stack-evt-bug47619.ll

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irtranslator-stack-objects.ll

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irtranslator-stack-protector-trap-unreachable.ll

[CodeGen] Generalize trap emission after SP check fail (#109744)

2024-10-12 20:01:22 -04:00

irtranslator-stack-protector-windows.ll

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irtranslator-stepvector.ll

[GlobalISel] Import llvm.stepvector (#115721)

2024-11-11 21:35:22 +01:00

irtranslator-store-metadata.ll

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irtranslator-subvector.ll

[GlobalISel] Import extract/insert subvector (#110287)

2024-09-30 22:12:06 +02:00

irtranslator-sucmp.ll

[GlobalIsel] import G_SCMP and G_UCMP (#99518)

2024-07-19 06:16:12 +02:00

irtranslator-switch-bittest.ll

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irtranslator-switch-split.ll

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irtranslator-tbaa.ll

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irtranslator-trunc.ll

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irtranslator-unreachable.ll

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irtranslator-unwind-inline-asm.ll

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irtranslator-vector-deinterleave2.ll

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irtranslator-vector-interleave2.ll

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irtranslator-volatile-load-pr36018.ll

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irtranslator-vscale.ll

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irtranslator-weird-alloca-size.ll

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labels-are-not-dead.mir

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legalize-abs.mir

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legalize-acos.mir

[aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

2024-07-19 10:18:23 -04:00

legalize-add.mir

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legalize-and.mir

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legalize-asin.mir

[aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

2024-07-19 10:18:23 -04:00

legalize-atan2.mir

[aarch64] atan2 intrinsic lowering (p5) (#112611)

2024-10-24 17:53:12 -07:00

legalize-atan.mir

[aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

2024-07-19 10:18:23 -04:00

legalize-atomicrmw.mir

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legalize-bitcast.mir

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legalize-bitreverse.mir

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legalize-blockaddress.mir

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legalize-bswap.mir

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legalize-build-vector.mir

[GlobalISel] Use replaceRegOrBuildCopy when legalizer-combining anyext(undef). (#119721)

2024-12-13 08:39:45 +00:00

legalize-bzero-unsupported.mir

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legalize-bzero.mir

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legalize-ceil.mir

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legalize-cmp.mir

[GISel] Support narrowing G_ICMP with more than 2 parts. (#119335)

2024-12-12 09:50:26 -08:00

legalize-cmpxchg-128.mir

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legalize-cmpxchg-with-success.mir

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legalize-cmpxchg.mir

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legalize-combines.mir

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legalize-concat-vectors.mir

[GlobalISel] Use replaceRegOrBuildCopy when legalizer-combining anyext(undef). (#119721)

2024-12-13 08:39:45 +00:00

legalize-constant.mir

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legalize-cos.mir

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legalize-cosh.mir

[aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

2024-07-19 10:18:23 -04:00

legalize-ctlz.mir

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legalize-ctpop-no-implicit-float.mir

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legalize-ctpop.mir

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legalize-cttz-zero-undef.mir

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legalize-cttz.mir

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legalize-div.mir

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legalize-divrem.mir

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legalize-dyn-alloca.mir

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legalize-exceptions.ll

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legalize-exp.mir

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legalize-ext-cse.mir

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legalize-ext-csedebug-output.mir

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legalize-ext.mir

[GlobalISel] Use replaceRegOrBuildCopy when legalizer-combining s/zext(undef) (#119850)

2024-12-16 05:57:11 +00:00

legalize-extload.mir

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legalize-extract-vector-elt.mir

[AArch64][GlobalISel] Legalize ptr vector freeze and implicit defs.

2024-11-18 22:35:58 +00:00

legalize-extracts.mir

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legalize-fcmp.mir

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legalize-fcopysign.mir

DAG/GlobalISel: Set disjoint for or in copysign lowering (#97057)

2024-06-28 23:03:39 +02:00

legalize-fexp2.mir

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legalize-fma.mir

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legalize-fmad.mir

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legalize-fmaximum.mir

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legalize-fmaxnum.mir

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legalize-fminimum.mir

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legalize-fminnum.mir

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legalize-fp16-fconstant.mir

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legalize-fp128-fconstant.mir

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legalize-fp-arith-fp16.mir

[AArch64][GlobalISel] Lower fp16 abs and neg without fullfp16. (#110096)

2024-09-27 07:43:58 +01:00

legalize-fp-arith.mir

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legalize-fp-class.mir

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legalize-fpenv.mir

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legalize-fpext.mir

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legalize-fpmode.mir

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legalize-fptoi.mir

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legalize-fptrunc.mir

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legalize-freeze.mir

[AArch64][GlobalISel] Prefer to use Vector Truncate (#105692)

2024-09-23 13:52:37 +01:00

legalize-frint.mir

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legalize-fshl.mir

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legalize-fshr.mir

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legalize-global-pic.mir

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legalize-global.mir

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legalize-ignore-hint.mir

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legalize-ignore-non-generic.mir

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legalize-indexed-load-stores.mir

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legalize-insert-vector-elt.mir

[AArch64][GlobalISel] Prefer to use Vector Truncate (#105692)

2024-09-23 13:52:37 +01:00

legalize-inserts.mir

[GlobalISel] Use replaceRegOrBuildCopy when legalizer-combining anyext(undef). (#119721)

2024-12-13 08:39:45 +00:00

legalize-intrinsic-get-dynamic-area-offset.mir

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legalize-intrinsic-min-max.mir

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legalize-intrinsic-round.mir

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legalize-intrinsic-roundeven.mir

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legalize-intrinsic-trunc.mir

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legalize-inttoptr-xfail-1.mir

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legalize-inttoptr-xfail-2.mir

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legalize-inttoptr.mir

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legalize-itofp.mir

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legalize-llrint.mir

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legalize-llround.mir

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legalize-load-store-fewerElts.mir

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legalize-load-store-vector-of-ptr-debugloc.mir

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legalize-load-store-vector-of-ptr.mir

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legalize-load-store.mir

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legalize-load-trunc.mir

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legalize-log2.mir

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legalize-log10.mir

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legalize-log.mir

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legalize-lrint.mir

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legalize-lround.mir

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legalize-memcpy-et-al.mir

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legalize-memcpy-with-debug-info.mir

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legalize-memlib-debug-loc.mir

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legalize-merge-values.mir

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legalize-min-max.mir

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legalize-mul.mir

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legalize-nearbyint.mir

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legalize-non-pow2-load-store.mir

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legalize-or.mir

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legalize-phi-insertpt-decrement.mir

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legalize-phi.mir

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legalize-pow.mir

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legalize-property.mir

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legalize-ptr-add.mir

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legalize-ptrtoint.mir

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legalize-reduce-add.mir

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legalize-reduce-and.mir

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legalize-reduce-fadd.mir

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legalize-reduce-fminmax.mir

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legalize-reduce-fmul.mir

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legalize-reduce-or.mir

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legalize-reduce-xor.mir

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legalize-rem.mir

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legalize-rotr-rotl.mir

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legalize-s128-div.mir

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legalize-sadde.mir

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legalize-saddo.mir

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legalize-saddsat.mir

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legalize-sbfx.mir

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legalize-select.mir

[GlobalISel] Combine unmerge(unmerge()) if the result is legal. (#109606)

2024-09-25 07:04:09 +01:00

legalize-sext-128.ll

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legalize-sext-128.mir

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legalize-sext-copy.mir

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legalize-sext-zext-128.mir

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legalize-sext.mir

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legalize-sextload.mir

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legalize-shift-imm-promote-dloc.mir

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legalize-shift.mir

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legalize-shuffle-vector-widen-crash.ll

[GlobalISel] Combine G_UNMERGE_VALUES with anyext and build vector (#112370)

2024-10-19 09:41:43 +02:00

legalize-shuffle-vector.mir

[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)

2024-11-23 17:00:51 +00:00

legalize-simple.mir

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legalize-sin.mir

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legalize-sinh.mir

[aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

2024-07-19 10:18:23 -04:00

legalize-sqrt.mir

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legalize-ssube.mir

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legalize-ssubo.mir

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legalize-ssubsat.mir

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legalize-sub.mir

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legalize-tan.mir

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legalize-tanh.mir

[aarch64] Add hyperbolic and arc trig intrinsic lowering (#98937)

2024-07-19 10:18:23 -04:00

legalize-threeway-cmp.mir

[GISel][RISCV][AArch64] Support legalizing G_SCMP/G_UCMP to sub(isgt,islt). (#119265)

2024-12-15 20:47:17 -08:00

legalize-uadd-sat.mir

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legalize-uadde.mir

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legalize-uaddo.mir

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legalize-ubfx.mir

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legalize-undef.mir

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legalize-unmerge-values.mir

[GlobalISel][AArch64] Generate ptrtoint/inttoptr as opposed to bitcast in unmerge combine. (#115225)

2024-11-09 13:34:55 +00:00

legalize-usub-sat.mir

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legalize-usube.mir

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legalize-usubo.mir

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legalize-vaarg.mir

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legalize-vacopy.mir

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legalize-vector-cmp.mir

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legalize-vector-compress.mir

[LLVM] Add llvm.experimental.vector.compress intrinsic (#92289)

2024-07-17 14:24:24 +02:00

legalize-vector-shift.mir

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legalize-xor.mir

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legalize-xtn.mir

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legalize-zextload.mir

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legalizer-combiner-zext-trunc-crash.mir

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legalizer-combiner.mir

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legalizer-info-validation.mir

[GlobalISel] Add G_ABDS and G_ABDU instructions (#118122)

2024-12-04 12:53:15 +01:00

lifetime-marker-no-dce.mir

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load-addressing-modes.mir

[AArch64][GISel] Always fold G_SHL into addressing mode where possible, unless the subtarget has addr-lsl-slow-14 (#96603)

2024-07-18 10:22:27 +01:00

load-wro-addressing-modes.mir

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localizer-arm64-tti.ll

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localizer-propagate-debug-loc.mir

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localizer.mir

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lower-neon-vector-fcmp.mir

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machine-cse-mid-pipeline.mir

[CodeGen][NewPM] Port MachineCSE pass to new pass manager. (#106605)

2024-09-04 18:54:07 +05:30

memcpy_chk_no_tail.ll

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merge-stores-truncating.ll

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merge-stores-truncating.mir

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no-neon-no-fp.ll

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no-reduce-shl-of-ext.ll

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no-regclass.mir

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non-pow-2-extload-combine.mir

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observer-change-crash.mir

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opt-and-tbnz-tbz.mir

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opt-fold-and-tbz-tbnz.mir

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opt-fold-compare.mir

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opt-fold-ext-tbz-tbnz.mir

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opt-fold-shift-tbz-tbnz.mir

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opt-fold-trunc-tbz-tbnz.mir

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opt-fold-xor-tbz-tbnz.mir

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opt-overlapping-and-postlegalize.mir

…

opt-overlapping-and.mir

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opt-shifted-reg-compare.mir

…

phi-mir-debugify.mir

…

phi-with-empty-type.ll

…

postlegalizer-combine-ptr-add-chain.mir

…

postlegalizer-combiner-and-trivial-mask.mir

…

postlegalizer-combiner-anyext-to-zext.mir

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postlegalizer-combiner-constant-fold.mir

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postlegalizer-combiner-copy-prop.mir

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postlegalizer-combiner-identity.mir

…

postlegalizer-combiner-merge.mir

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postlegalizer-combiner-redundant-sextinreg.mir

…

postlegalizer-combiner-sameopcode-hands-crash.mir

[AArch64][GlobalISel] Disable fixed-point iteration in all Combiners

2024-08-16 15:15:29 +02:00

postlegalizer-combiner-split-zero-stores.mir

…

postlegalizer-combiner-undef.mir

…

postlegalizer-lowering-adjust-icmp-imm.mir

…

postlegalizer-lowering-build-vector-to-dup.mir

[AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (#105686)

2024-09-03 18:55:23 -07:00

postlegalizer-lowering-ext.mir

…

postlegalizer-lowering-rev.mir

…

postlegalizer-lowering-sextinreg.mir

…

postlegalizer-lowering-shuf-to-ins.mir

…

postlegalizer-lowering-shuffle-duplane.mir

…

postlegalizer-lowering-shuffle-splat.mir

[AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (#105686)

2024-09-03 18:55:23 -07:00

postlegalizer-lowering-swap-compare-operands.mir

[AArch64][GlobalISel] Disable fixed-point iteration in all Combiners

2024-08-16 15:15:29 +02:00

postlegalizer-lowering-trn.mir

…

postlegalizer-lowering-truncstore.mir

…

postlegalizer-lowering-unmerge-ext.mir

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postlegalizer-lowering-uzp.mir

…

postlegalizer-lowering-vashr-vlshr.mir

…

postlegalizer-lowering-zip.mir

…

postlegalizercombiner-extending-loads.mir

…

postlegalizercombiner-extractvec-faddp.mir

…

postlegalizercombiner-hoist-same-hands.mir

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postlegalizercombiner-mulpow2.mir

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postlegalizercombiner-rotate.mir

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postlegalizercombiner-select.mir

…

postselectopt-constrain-new-regop.mir

…

postselectopt-dead-cc-defs-in-fcmp.mir

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postselectopt-dead-cc-defs.mir

…

postselectopt-xclass-copies.mir

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pr57349.ll

…

pr58423.ll

…

prelegalizer-combiner-addo-zero.mir

…

prelegalizer-combiner-binop-reassoc.mir

…

prelegalizer-combiner-divrem-insertpt-conflict.mir

[GlobalIsel] Combine trunc of binop (#107721)

2024-09-11 15:04:55 +02:00

prelegalizer-combiner-divrem-insertpt-crash.mir

…

prelegalizer-combiner-icmp-to-true-false-known-bits.mir

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prelegalizer-combiner-load-and-mask.mir

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prelegalizer-combiner-load-or-pattern-align.mir

…

prelegalizer-combiner-load-or-pattern.mir

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prelegalizer-combiner-mulo-zero.mir

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prelegalizer-combiner-narrow-binop-feeding-add.mir

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prelegalizer-combiner-select-to-fminmax.mir

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prelegalizercombiner-ashr-shl-to-sext-inreg.mir

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prelegalizercombiner-binop-same-val.mir

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prelegalizercombiner-br.mir

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prelegalizercombiner-bzero.mir

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prelegalizercombiner-commute-shift.mir

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prelegalizercombiner-concat-vectors.mir

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prelegalizercombiner-copy-prop-disabled.mir

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prelegalizercombiner-extending-loads-cornercases.mir

Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"

2024-11-08 10:21:46 -08:00

prelegalizercombiner-extending-loads-s1.mir

…

prelegalizercombiner-extending-loads.mir

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prelegalizercombiner-funnel-shifts-to-rotates.mir

…

prelegalizercombiner-hoist-same-hands.mir

[AArch64][GlobalISel] Guard against no operands in matchHoistLogicOpWithSameOpcodeHands

2024-12-13 11:02:55 +00:00

prelegalizercombiner-icmp-redundant-trunc.mir

…

prelegalizercombiner-invert-cmp.mir

…

prelegalizercombiner-not-really-equiv-insts.mir

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prelegalizercombiner-prop-extends-phi.mir

…

prelegalizercombiner-ptradd-chain.mir

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prelegalizercombiner-select.mir

…

prelegalizercombiner-sextload-from-sextinreg.mir

…

prelegalizercombiner-shuffle-vector-disjoint-mask.mir

[GlobalISel] Turn shuffle a, b, mask -> shuffle undef, b, mask iff mask does not reference a (#115377)

2024-11-14 15:13:41 -08:00

prelegalizercombiner-shuffle-vector-undef-rhs.mir

[GlobalISel] Remove references to rhs of shufflevector if rhs is undef (#115076)

2024-11-06 16:36:13 -08:00

prelegalizercombiner-shuffle-vector.mir

…

prelegalizercombiner-simplify-add.mir

…

prelegalizercombiner-trivial-arith.mir

Recommit "[GISel][AArch64][AMDGPU][RISCV] Canonicalize (sub X, C) -> (add X, -C) (#114309)"

2024-11-08 10:21:46 -08:00

prelegalizercombiner-undef.mir

…

prelegalizercombiner-xor-of-and-with-same-reg.mir

…

preselect-process-phis.mir

…

ptrauth-constant-in-code.ll

[AArch64][PAC] Lower ptrauth constants in code for MachO. (#97665)

2024-07-10 15:03:17 -07:00

rbs-matrixindex-regclass-crash.mir

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reg-bank-128bit.mir

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regbank-assert-align.mir

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regbank-assert-sext.mir

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regbank-assert-zext.mir

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regbank-ceil.mir

…

regbank-dup.mir

[AArch64][GlobalISel] Reland Make G_DUP immediate 32-bits or larger (#96780) (#99014)

2024-07-25 11:06:46 +01:00

regbank-extract-vector-elt.mir

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regbank-extract.mir

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regbank-fcmp.mir

…

regbank-fma.mir

…

regbank-fmaximum.mir

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regbank-fminimum.mir

…

regbank-fp-use-def.mir

…

regbank-inlineasm.mir

Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"

2024-11-27 13:31:59 +00:00

regbank-insert-vector-elt.mir

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regbank-intrinsic-round.mir

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regbank-intrinsic-trunc.mir

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regbank-intrinsic.mir

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regbank-llround.mir

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regbank-lround.mir

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regbank-maxnum.mir

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regbank-minnum.mir

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regbank-nearbyint.mir

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regbank-select.mir

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regbank-shift-imm-64.mir

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regbank-trunc-s128.mir

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regbankselect-build-vector.mir

…

regbankselect-dbg-value.mir

[MIR] Fix tests for flags in register info (#112179)

2024-10-14 18:28:54 +05:30

regbankselect-default.mir

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regbankselect-fp-loads.mir

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regbankselect-reductions.mir

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regbankselect-reg_sequence.mir

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regbankselect-unmerge-vec.mir

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ret-1x-vec.ll

…

ret-vec-promote.ll

[GlobalISel] Allow more illegal vector types in params/returns. (#95514)

2024-06-18 13:20:49 +01:00

retry-artifact-combine.mir

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salvage-debug-info-dead.mir

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select-abs.mir

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select-add-low.mir

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select-anyext-indexed-load-crash.ll

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select-arith-extended-reg.mir

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select-arith-shifted-reg.mir

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select-atomic-load-store.mir

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select-atomicrmw.mir

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select-binop.mir

…

select-bit.mir

…

select-bitcast-bigendian.mir

[TableGen][GISel] Extract helper function for constraining operands (#115148)

2024-11-07 07:16:54 +03:00

select-bitcast.mir

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select-bitfield-insert.ll

…

select-bitreverse.mir

…

select-blockaddress.mir

…

select-br.mir

…

select-brcond-of-binop.mir

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select-bswap.mir

…

select-build-vector.mir

…

select-cbz.mir

…

select-ceil.mir

…

select-cmp.mir

…

select-cmpxchg.mir

…

select-concat-vectors.mir

…

select-const-pool.mir

…

select-const-vector.mir

…

select-constant.mir

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select-constbarrier.mir

…

select-ctlz.mir

…

select-ctpop.mir

…

select-cttz.mir

…

select-dbg-value.mir

…

select-dup.mir

[AArch64][GlobalISel] Reland Make G_DUP immediate 32-bits or larger (#96780) (#99014)

2024-07-25 11:06:46 +01:00

select-ext.mir

…

select-extload.mir

…

select-extract-vector-elt-with-extend.mir

…

select-extract-vector-elt.mir

…

select-extract.mir

…

select-fabs.mir

…

select-faddp.mir

…

select-fcmp.mir

…

select-floor.mir

…

select-fma.mir

…

select-fmaximum.mir

…

select-fminimum.mir

…

select-fmul-indexed.mir

…

select-fp16-fconstant.mir

…

select-fp-casts.mir

[AArch64][GISel] Add fp128 and i128 sitofp/uitofp handling (#97691)

2024-07-15 16:24:24 +01:00

select-frameaddr.ll

…

select-frint-nofp16.mir

…

select-frint.mir

…

select-gv-cmodel-large.mir

…

select-gv-cmodel-tiny.mir

…

select-gv-with-offset.mir

…

select-hint.mir

…

select-imm.mir

…

select-implicit-def.mir

…

select-insert-extract.mir

…

select-insert-vector-elt.mir

…

select-int-ext.mir

…

select-int-ptr-casts.mir

…

select-intrinsic-aarch64-hint.mir

[MIR] Fix tests for flags in register info (#112179)

2024-10-14 18:28:54 +05:30

select-intrinsic-aarch64-sdiv.mir

…

select-intrinsic-crypto-aesmc.mir

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select-intrinsic-round.mir

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select-intrinsic-trunc.mir

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select-jump-table-brjt-constrain.mir

…

select-jump-table-brjt.mir

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select-ld2.mir

…

select-ld4.mir

…

select-ldaxr-intrin.mir

…

select-ldxr-intrin.mir

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select-load-store-vector-of-ptr.mir

…

select-load.mir

[GlobalISel] Look between instructions to be matched (#101675)

2024-08-27 16:56:40 +01:00

select-logical-imm.mir

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select-logical-shifted-reg.mir

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select-mul.mir

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select-muladd.mir

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select-nearbyint.mir

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select-neon-vcvtfxu2fp.mir

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select-neon-vector-fcmp.mir

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select-phi.mir

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select-pr32733.mir

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select-property.mir

…

select-ptr-add.mir

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select-reduce-add.mir

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select-reduce-fadd.mir

…

select-redundant-zext-of-load.mir

…

select-redundant-zext.mir

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select-returnaddr.ll

…

select-returnaddress-liveins.mir

…

select-rev.mir

…

select-rotate.mir

…

select-sadde.mir

…

select-saddo.mir

…

select-sbfx.mir

…

select-scalar-merge.mir

…

select-scalar-shift-imm.mir

…

select-select.mir

…

select-sextload.mir

…

select-shuffle-vector.mir

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select-shufflevec-undef-mask-elt.mir

…

select-splat-vector.ll

[GlobalISel][AArch64] Legalize G_SPLAT_VECTOR (#114006)

2024-10-31 22:20:08 +01:00

select-sqrt.mir

…

select-ssube.mir

…

select-ssubo.mir

…

select-st2.mir

…

select-static.mir

[MIR] Fix tests for flags in register info (#112179)

2024-10-14 18:28:54 +05:30

select-stlxr-intrin.mir

…

select-store-truncating-float.mir

…

select-store.mir

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select-stx.mir

…

select-tbnz-from-cmp.mir

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select-to-fmin-fmax.ll

…

select-trap.mir

…

select-trn.mir

…

select-trunc.mir

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select-truncstore-atomic.mir

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select-uadde.mir

…

select-uaddo.mir

…

select-ubfx.mir

…

select-unmerge.mir

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select-unreachable-blocks.mir

…

select-usube.mir

…

select-usubo.mir

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select-uzp.mir

…

select-vector-icmp.mir

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select-vector-shift.mir

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select-with-no-legality-check.mir

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select-xor.mir

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select-zext-as-copy.mir

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select-zextload.mir

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select-zip.mir

…

select.mir

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sext-inreg-ldrow-16b.mir

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sink-and-fold-illegal-shift.ll

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speculative-hardening-brcond.mir

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split-offsets-for-stp.ll

…

stacksave-stackrestore.ll

…

store-addressing-modes.mir

[AArch64][GISel] Always fold G_SHL into addressing mode where possible, unless the subtarget has addr-lsl-slow-14 (#96603)

2024-07-18 10:22:27 +01:00

store-merging-debug.mir

…

store-merging.ll

…

store-merging.mir

…

store-wro-addressing-modes.mir

…

subreg-copy.mir

…

sve-formal-argument-multiple.ll

[AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (#95236)

2024-06-18 09:25:47 +01:00

sve-formal-argument.ll

[AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (#95236)

2024-06-18 09:25:47 +01:00

sve-integer.ll

[GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (#110561)

2024-10-27 23:14:07 +01:00

sve-load-store.ll

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swifterror.ll

…

swiftself.ll

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tail-call-no-save-fp-lr.ll

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tbz-sgt.mir

…

translate-constant-dag.ll

…

translate-gep.ll

[GlobalISel][AArch64] Allow vector ptr to int unmerges (#115228)

2024-11-08 19:45:08 +00:00

translate-ret.ll

…

translate-sve-formal-argument-multiple.ll

[AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (#95236)

2024-06-18 09:25:47 +01:00

translate-sve-formal-argument.ll

[AArch64][GISel] Translate legal SVE formal arguments and select COPY for SVE (#95236)

2024-06-18 09:25:47 +01:00

uaddo-8-16-bits.mir

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ubsantrap.ll

…

unknown-intrinsic.ll

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unwind-inline-asm.ll

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v8.4-atomic-128.ll

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vararg.mir

[AArch64][GlobalISel] Implement selectVaStartAAPCS (#106979)

2024-09-19 11:48:14 +05:30

varargs-ios-translator.ll

…

vastart.ll

…

vec-param.ll

[GlobalISel] Allow more illegal vector types in params/returns. (#95514)

2024-06-18 13:20:49 +01:00

vec-s16-param.ll

…

widen-narrow-tbz-tbnz.mir

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xro-addressing-mode-constant.mir

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