61510b51c3
This reverts commit 9c319d5bb4.
Some issues were discovered with the bootstrap builds, which
seem like they were caused by this commit. I'm reverting to investigate.
279 lines
10 KiB
LLVM
279 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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define double @copysign_f64(double %a, double %b) {
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; CHECK-LABEL: copysign_f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi v2.2d, #0xffffffffffffffff
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: fneg v2.2d, v2.2d
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; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-NEXT: ret
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entry:
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%c = call double @llvm.copysign.f64(double %a, double %b)
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ret double %c
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}
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define float @copysign_f32(float %a, float %b) {
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; CHECK-SD-LABEL: copysign_f32:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: mvni v2.4s, #128, lsl #24
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; CHECK-SD-NEXT: // kill: def $s0 killed $s0 def $q0
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; CHECK-SD-NEXT: // kill: def $s1 killed $s1 def $q1
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; CHECK-SD-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: copysign_f32:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: mvni v2.2s, #128, lsl #24
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; CHECK-GI-NEXT: // kill: def $s0 killed $s0 def $d0
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; CHECK-GI-NEXT: // kill: def $s1 killed $s1 def $d1
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; CHECK-GI-NEXT: bif v0.8b, v1.8b, v2.8b
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; CHECK-GI-NEXT: // kill: def $s0 killed $s0 killed $d0
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; CHECK-GI-NEXT: ret
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entry:
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%c = call float @llvm.copysign.f32(float %a, float %b)
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ret float %c
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}
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define half @copysign_f16(half %a, half %b) {
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; CHECK-SD-LABEL: copysign_f16:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: fcvt s1, h1
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; CHECK-SD-NEXT: fcvt s0, h0
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; CHECK-SD-NEXT: mvni v2.4s, #128, lsl #24
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; CHECK-SD-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-SD-NEXT: fcvt h0, s0
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: copysign_f16:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: mvni v2.4h, #128, lsl #8
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; CHECK-GI-NEXT: // kill: def $h0 killed $h0 def $d0
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; CHECK-GI-NEXT: // kill: def $h1 killed $h1 def $d1
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; CHECK-GI-NEXT: bif v0.8b, v1.8b, v2.8b
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; CHECK-GI-NEXT: // kill: def $h0 killed $h0 killed $d0
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; CHECK-GI-NEXT: ret
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entry:
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%c = call half @llvm.copysign.f16(half %a, half %b)
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ret half %c
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}
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define <2 x double> @copysign_v2f64(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: copysign_v2f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi v2.2d, #0xffffffffffffffff
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; CHECK-NEXT: fneg v2.2d, v2.2d
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; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: ret
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entry:
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%c = call <2 x double> @llvm.copysign.v2f64(<2 x double> %a, <2 x double> %b)
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ret <2 x double> %c
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}
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define <3 x double> @copysign_v3f64(<3 x double> %a, <3 x double> %b) {
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; CHECK-SD-LABEL: copysign_v3f64:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: movi v6.2d, #0xffffffffffffffff
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; CHECK-SD-NEXT: // kill: def $d3 killed $d3 def $q3
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; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-SD-NEXT: // kill: def $d4 killed $d4 def $q4
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; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
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; CHECK-SD-NEXT: // kill: def $d5 killed $d5 def $q5
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; CHECK-SD-NEXT: mov v3.d[1], v4.d[0]
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; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-SD-NEXT: fneg v1.2d, v6.2d
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; CHECK-SD-NEXT: bif v0.16b, v3.16b, v1.16b
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; CHECK-SD-NEXT: bif v2.16b, v5.16b, v1.16b
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; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
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; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: copysign_v3f64:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: movi v6.2d, #0xffffffffffffffff
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3
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; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4
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; CHECK-GI-NEXT: fmov x8, d2
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; CHECK-GI-NEXT: fmov x9, d5
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; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]
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; CHECK-GI-NEXT: and x8, x8, #0x7fffffffffffffff
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; CHECK-GI-NEXT: and x9, x9, #0x8000000000000000
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; CHECK-GI-NEXT: fneg v1.2d, v6.2d
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; CHECK-GI-NEXT: orr x8, x8, x9
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; CHECK-GI-NEXT: fmov d2, x8
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; CHECK-GI-NEXT: bif v0.16b, v3.16b, v1.16b
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; CHECK-GI-NEXT: mov d1, v0.d[1]
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-GI-NEXT: ret
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entry:
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%c = call <3 x double> @llvm.copysign.v3f64(<3 x double> %a, <3 x double> %b)
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ret <3 x double> %c
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}
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define <4 x double> @copysign_v4f64(<4 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: copysign_v4f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: movi v4.2d, #0xffffffffffffffff
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; CHECK-NEXT: fneg v4.2d, v4.2d
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; CHECK-NEXT: bif v0.16b, v2.16b, v4.16b
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; CHECK-NEXT: bif v1.16b, v3.16b, v4.16b
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; CHECK-NEXT: ret
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entry:
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%c = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b)
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ret <4 x double> %c
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}
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define <2 x float> @copysign_v2f32(<2 x float> %a, <2 x float> %b) {
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; CHECK-LABEL: copysign_v2f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mvni v2.2s, #128, lsl #24
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; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
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; CHECK-NEXT: ret
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entry:
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%c = call <2 x float> @llvm.copysign.v2f32(<2 x float> %a, <2 x float> %b)
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ret <2 x float> %c
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}
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define <3 x float> @copysign_v3f32(<3 x float> %a, <3 x float> %b) {
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; CHECK-SD-LABEL: copysign_v3f32:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: mvni v2.4s, #128, lsl #24
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; CHECK-SD-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: copysign_v3f32:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: mov w8, #-2147483648 // =0x80000000
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; CHECK-GI-NEXT: mov w9, #2147483647 // =0x7fffffff
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; CHECK-GI-NEXT: mov v2.s[0], w9
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; CHECK-GI-NEXT: mov v3.s[0], w8
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; CHECK-GI-NEXT: mov v2.s[1], w9
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; CHECK-GI-NEXT: mov v3.s[1], w8
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; CHECK-GI-NEXT: mov v2.s[2], w9
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; CHECK-GI-NEXT: mov v3.s[2], w8
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; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b
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; CHECK-GI-NEXT: and v1.16b, v1.16b, v3.16b
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; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
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; CHECK-GI-NEXT: ret
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entry:
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%c = call <3 x float> @llvm.copysign.v3f32(<3 x float> %a, <3 x float> %b)
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ret <3 x float> %c
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}
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define <4 x float> @copysign_v4f32(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: copysign_v4f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mvni v2.4s, #128, lsl #24
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; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: ret
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entry:
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%c = call <4 x float> @llvm.copysign.v4f32(<4 x float> %a, <4 x float> %b)
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ret <4 x float> %c
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}
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define <8 x float> @copysign_v8f32(<8 x float> %a, <8 x float> %b) {
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; CHECK-LABEL: copysign_v8f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mvni v4.4s, #128, lsl #24
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; CHECK-NEXT: bif v0.16b, v2.16b, v4.16b
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; CHECK-NEXT: bif v1.16b, v3.16b, v4.16b
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; CHECK-NEXT: ret
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entry:
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%c = call <8 x float> @llvm.copysign.v8f32(<8 x float> %a, <8 x float> %b)
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ret <8 x float> %c
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}
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define <7 x half> @copysign_v7f16(<7 x half> %a, <7 x half> %b) {
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; CHECK-SD-LABEL: copysign_v7f16:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: mvni v2.8h, #128, lsl #8
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; CHECK-SD-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: copysign_v7f16:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: mov w8, #32768 // =0x8000
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; CHECK-GI-NEXT: mov w9, #32767 // =0x7fff
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; CHECK-GI-NEXT: fmov s2, w9
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; CHECK-GI-NEXT: fmov s3, w8
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; CHECK-GI-NEXT: mov v2.h[1], w9
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; CHECK-GI-NEXT: mov v3.h[1], w8
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; CHECK-GI-NEXT: mov v2.h[2], w9
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; CHECK-GI-NEXT: mov v3.h[2], w8
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; CHECK-GI-NEXT: mov v2.h[3], w9
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; CHECK-GI-NEXT: mov v3.h[3], w8
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; CHECK-GI-NEXT: mov v2.h[4], w9
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; CHECK-GI-NEXT: mov v3.h[4], w8
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; CHECK-GI-NEXT: mov v2.h[5], w9
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; CHECK-GI-NEXT: mov v3.h[5], w8
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; CHECK-GI-NEXT: mov v2.h[6], w9
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; CHECK-GI-NEXT: mov v3.h[6], w8
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; CHECK-GI-NEXT: and v0.16b, v0.16b, v2.16b
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; CHECK-GI-NEXT: and v1.16b, v1.16b, v3.16b
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; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
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; CHECK-GI-NEXT: ret
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entry:
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%c = call <7 x half> @llvm.copysign.v7f16(<7 x half> %a, <7 x half> %b)
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ret <7 x half> %c
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}
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define <4 x half> @copysign_v4f16(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: copysign_v4f16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mvni v2.4h, #128, lsl #8
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; CHECK-NEXT: bif v0.8b, v1.8b, v2.8b
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; CHECK-NEXT: ret
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entry:
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%c = call <4 x half> @llvm.copysign.v4f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %c
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}
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define <8 x half> @copysign_v8f16(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: copysign_v8f16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mvni v2.8h, #128, lsl #8
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; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b
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; CHECK-NEXT: ret
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entry:
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%c = call <8 x half> @llvm.copysign.v8f16(<8 x half> %a, <8 x half> %b)
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ret <8 x half> %c
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}
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define <16 x half> @copysign_v16f16(<16 x half> %a, <16 x half> %b) {
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; CHECK-LABEL: copysign_v16f16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mvni v4.8h, #128, lsl #8
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; CHECK-NEXT: bif v0.16b, v2.16b, v4.16b
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; CHECK-NEXT: bif v1.16b, v3.16b, v4.16b
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; CHECK-NEXT: ret
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entry:
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%c = call <16 x half> @llvm.copysign.v16f16(<16 x half> %a, <16 x half> %b)
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ret <16 x half> %c
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}
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declare <16 x half> @llvm.copysign.v16f16(<16 x half>, <16 x half>)
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declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>)
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declare <2 x float> @llvm.copysign.v2f32(<2 x float>, <2 x float>)
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declare <3 x double> @llvm.copysign.v3f64(<3 x double>, <3 x double>)
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declare <3 x float> @llvm.copysign.v3f32(<3 x float>, <3 x float>)
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declare <4 x double> @llvm.copysign.v4f64(<4 x double>, <4 x double>)
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declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>)
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declare <4 x half> @llvm.copysign.v4f16(<4 x half>, <4 x half>)
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declare <7 x half> @llvm.copysign.v7f16(<7 x half>, <7 x half>)
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declare <8 x float> @llvm.copysign.v8f32(<8 x float>, <8 x float>)
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declare <8 x half> @llvm.copysign.v8f16(<8 x half>, <8 x half>)
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declare double @llvm.copysign.f64(double, double)
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declare float @llvm.copysign.f32(float, float)
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declare half @llvm.copysign.f16(half, half)
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