Same as X86, , if X's size is BitWidth, then X sdiv 2 can be expressived as ``` X += X >> (BitWidth - 1) X = X >> 1 ``` Fix https://github.com/llvm/llvm-project/issues/97884
135 lines
3.4 KiB
LLVM
135 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel=0 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ISEL
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; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,FAST
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define i32 @test1(i32 %x) {
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; CHECK-LABEL: test1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, #7
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: asr w0, w8, #3
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; CHECK-NEXT: ret
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%div = sdiv i32 %x, 8
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ret i32 %div
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}
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define i32 @test2(i32 %x) {
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; CHECK-LABEL: test2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, #7
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: neg w0, w8, asr #3
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; CHECK-NEXT: ret
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%div = sdiv i32 %x, -8
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ret i32 %div
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}
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define i32 @test3(i32 %x) {
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; CHECK-LABEL: test3:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, #31
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; CHECK-NEXT: cmp w0, #0
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; CHECK-NEXT: csel w8, w8, w0, lt
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; CHECK-NEXT: asr w0, w8, #5
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; CHECK-NEXT: ret
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%div = sdiv i32 %x, 32
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ret i32 %div
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}
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define i64 @test4(i64 %x) {
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; CHECK-LABEL: test4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, #7
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: csel x8, x8, x0, lt
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; CHECK-NEXT: asr x0, x8, #3
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; CHECK-NEXT: ret
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%div = sdiv i64 %x, 8
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ret i64 %div
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}
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define i64 @test5(i64 %x) {
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; CHECK-LABEL: test5:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, #7
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: csel x8, x8, x0, lt
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; CHECK-NEXT: neg x0, x8, asr #3
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; CHECK-NEXT: ret
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%div = sdiv i64 %x, -8
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ret i64 %div
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}
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define i64 @test6(i64 %x) {
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; CHECK-LABEL: test6:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, #63
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: csel x8, x8, x0, lt
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; CHECK-NEXT: asr x0, x8, #6
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; CHECK-NEXT: ret
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%div = sdiv i64 %x, 64
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ret i64 %div
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}
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define i64 @test7(i64 %x) {
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; CHECK-LABEL: test7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov x8, #281474976710655 // =0xffffffffffff
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; CHECK-NEXT: cmp x0, #0
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; CHECK-NEXT: add x8, x0, x8
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; CHECK-NEXT: csel x8, x8, x0, lt
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; CHECK-NEXT: asr x0, x8, #48
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; CHECK-NEXT: ret
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%div = sdiv i64 %x, 281474976710656
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ret i64 %div
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}
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define i64 @test8(i64 %x) {
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; ISEL-LABEL: test8:
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; ISEL: // %bb.0:
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; ISEL-NEXT: add x8, x0, x0, lsr #63
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; ISEL-NEXT: asr x0, x8, #1
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; ISEL-NEXT: ret
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;
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; FAST-LABEL: test8:
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; FAST: // %bb.0:
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; FAST-NEXT: add x8, x0, #1
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; FAST-NEXT: cmp x0, #0
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; FAST-NEXT: csel x8, x8, x0, lt
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; FAST-NEXT: asr x0, x8, #1
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; FAST-NEXT: ret
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%div = sdiv i64 %x, 2
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ret i64 %div
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}
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define i32 @sdiv_int(i32 %begin, i32 %first) #0 {
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; ISEL-LABEL: sdiv_int:
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; ISEL: // %bb.0:
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; ISEL-NEXT: sub w8, w0, w1
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; ISEL-NEXT: add w8, w8, #1
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; ISEL-NEXT: add w8, w8, w8, lsr #31
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; ISEL-NEXT: sub w0, w0, w8, asr #1
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; ISEL-NEXT: ret
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;
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; FAST-LABEL: sdiv_int:
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; FAST: // %bb.0:
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; FAST-NEXT: add w8, w0, #1
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; FAST-NEXT: sub w8, w8, w1
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; FAST-NEXT: add w9, w8, #1
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; FAST-NEXT: cmp w8, #0
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; FAST-NEXT: csel w8, w9, w8, lt
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; FAST-NEXT: neg w8, w8, asr #1
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; FAST-NEXT: add w0, w8, w0
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; FAST-NEXT: ret
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%sub = add i32 %begin, 1
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%add = sub i32 %sub, %first
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%div.neg = sdiv i32 %add, -2
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%sub1 = add i32 %div.neg, %begin
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ret i32 %sub1
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}
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attributes #0 = { "target-features"="+sve" vscale_range(2,2) }
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