8c752900dd
Use a local pointer type to represent the named barrier in builtin and intrinsic. This makes the definitions more user friendly bacause they do not need to worry about the hardware ID assignment. Also this approach is more like the other popular GPU programming language. Named barriers should be represented as global variables of addrspace(3) in LLVM-IR. Compiler assigns the special LDS offsets for those variables during AMDGPULowerModuleLDS pass. Those addresses are converted to hw barrier ID during instruction selection. The rest of the instruction-selection changes are primarily due to the intrinsic-definition changes.
67 lines
3.0 KiB
LLVM
67 lines
3.0 KiB
LLVM
; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds < %s 2>&1 | FileCheck %s
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@bar2 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison
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@bar3 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison
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@bar1 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison
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; CHECK: @bar2 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison, !absolute_symbol !0
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; CHECK-NEXT: @bar3 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison, !absolute_symbol !1
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; CHECK-NEXT: @bar1 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison, !absolute_symbol !2
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; CHECK-NEXT: @bar1.kernel1 = internal addrspace(3) global target("amdgcn.named.barrier", 0) poison, !absolute_symbol !2
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define void @func1() {
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar3, i32 7)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar3)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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ret void
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}
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define void @func2() {
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar2, i32 7)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar2)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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ret void
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}
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define amdgpu_kernel void @kernel1() #0 {
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; CHECK-DAG: call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1.kernel1, i32 11)
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1, i32 11)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar1)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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call void @llvm.amdgcn.s.wakeup.barrier(ptr addrspace(3) @bar1)
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%state = call i32 @llvm.amdgcn.s.get.named.barrier.state(ptr addrspace(3) @bar1)
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call void @llvm.amdgcn.s.barrier()
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call void @func1()
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call void @func2()
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ret void
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}
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define amdgpu_kernel void @kernel2() #0 {
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; CHECK-DAG: call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1, i32 9)
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call void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3) @bar1, i32 9)
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call void @llvm.amdgcn.s.barrier.join(ptr addrspace(3) @bar1)
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call void @llvm.amdgcn.s.barrier.wait(i16 1)
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call void @func2()
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ret void
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}
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declare void @llvm.amdgcn.s.barrier() #1
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declare void @llvm.amdgcn.s.barrier.wait(i16) #1
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declare void @llvm.amdgcn.s.barrier.signal(i32) #1
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declare void @llvm.amdgcn.s.barrier.signal.var(ptr addrspace(3), i32) #1
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declare i1 @llvm.amdgcn.s.barrier.signal.isfirst(i32) #1
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declare void @llvm.amdgcn.s.barrier.init(ptr addrspace(3), i32) #1
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declare void @llvm.amdgcn.s.barrier.join(ptr addrspace(3)) #1
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declare void @llvm.amdgcn.s.barrier.leave(i16) #1
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declare void @llvm.amdgcn.s.wakeup.barrier(ptr addrspace(3)) #1
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declare i32 @llvm.amdgcn.s.get.named.barrier.state(ptr addrspace(3)) #1
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attributes #0 = { nounwind }
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attributes #1 = { convergent nounwind }
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attributes #2 = { nounwind readnone }
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; CHECK: !0 = !{i32 8396816, i32 8396817}
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; CHECK-NEXT: !1 = !{i32 8396848, i32 8396849}
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; CHECK-NEXT: !2 = !{i32 8396832, i32 8396833}
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