e0ed0333f0
Re-landing #116970 after fixing miscompilation error. The original change made it possible for CMPZ to have multiple uses; `ARMDAGToDAGISel::SelectCMPZ` was not prepared for this. Pull Request: https://github.com/llvm/llvm-project/pull/118887 Original commit message: Following #116547 and #116676, this PR changes the type of results and operands of some nodes to accept / return a normal type instead of Glue. Unfortunately, changing the result type of one node requires changing the operand types of all potential consumer nodes, which in turn requires changing the result types of all other possible producer nodes. So this is a bulk change.
32 lines
839 B
LLVM
32 lines
839 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s -check-prefix=A8
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; RUN: llc -mtriple=arm-eabi -mcpu=swift %s -o - | FileCheck %s -check-prefix=SWIFT
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define i32 @t1(i32 %a, i32 %b) {
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; A8-LABEL: t1:
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; A8: @ %bb.0: @ %common.ret
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; A8-NEXT: mov r2, #1
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; A8-NEXT: cmp r0, #0
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; A8-NEXT: mvneq r2, #0
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; A8-NEXT: add r0, r1, r2
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; A8-NEXT: bx lr
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;
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; SWIFT-LABEL: t1:
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; SWIFT: @ %bb.0: @ %common.ret
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; SWIFT-NEXT: cmp r0, #0
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; SWIFT-NEXT: mov r0, #1
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; SWIFT-NEXT: mvneq r0, #0
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; SWIFT-NEXT: add r0, r1, r0
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; SWIFT-NEXT: bx lr
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%tmp2 = icmp eq i32 %a, 0
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br i1 %tmp2, label %cond_false, label %cond_true
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cond_true:
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%tmp5 = add i32 %b, 1
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ret i32 %tmp5
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cond_false:
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%tmp7 = add i32 %b, -1
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ret i32 %tmp7
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}
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