0f0a96b862
Remove the extraneous '+0' immediate offset part in PTX load/stores, to improve readability of output PTX code.
171 lines
4.6 KiB
LLVM
171 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s | FileCheck %s
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; RUN: %if ptxas %{ llc < %s | %ptxas-verify %}
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target triple = "nvptx64-nvidia-cuda"
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@out = addrspace(1) global i32 0, align 4
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define void @foo(i32 %i) {
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; CHECK-LABEL: foo(
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; CHECK: {
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; CHECK-NEXT: .reg .pred %p<2>;
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; CHECK-NEXT: .reg .b32 %r<7>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0: // %entry
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; CHECK-NEXT: ld.param.u32 %r2, [foo_param_0];
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; CHECK-NEXT: setp.gt.u32 %p1, %r2, 3;
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; CHECK-NEXT: @%p1 bra $L__BB0_6;
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; CHECK-NEXT: // %bb.1: // %entry
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; CHECK-NEXT: $L_brx_0: .branchtargets
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; CHECK-NEXT: $L__BB0_2,
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; CHECK-NEXT: $L__BB0_3,
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; CHECK-NEXT: $L__BB0_4,
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; CHECK-NEXT: $L__BB0_5;
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; CHECK-NEXT: brx.idx %r2, $L_brx_0;
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; CHECK-NEXT: $L__BB0_2: // %case0
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; CHECK-NEXT: mov.b32 %r6, 0;
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; CHECK-NEXT: st.global.u32 [out], %r6;
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; CHECK-NEXT: bra.uni $L__BB0_6;
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; CHECK-NEXT: $L__BB0_4: // %case2
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; CHECK-NEXT: mov.b32 %r4, 2;
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; CHECK-NEXT: st.global.u32 [out], %r4;
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; CHECK-NEXT: bra.uni $L__BB0_6;
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; CHECK-NEXT: $L__BB0_5: // %case3
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; CHECK-NEXT: mov.b32 %r3, 3;
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; CHECK-NEXT: st.global.u32 [out], %r3;
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; CHECK-NEXT: bra.uni $L__BB0_6;
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; CHECK-NEXT: $L__BB0_3: // %case1
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; CHECK-NEXT: mov.b32 %r5, 1;
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; CHECK-NEXT: st.global.u32 [out], %r5;
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; CHECK-NEXT: $L__BB0_6: // %end
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; CHECK-NEXT: ret;
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entry:
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switch i32 %i, label %end [
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i32 0, label %case0
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i32 1, label %case1
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i32 2, label %case2
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i32 3, label %case3
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]
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case0:
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store i32 0, ptr addrspace(1) @out, align 4
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br label %end
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case1:
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store i32 1, ptr addrspace(1) @out, align 4
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br label %end
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case2:
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store i32 2, ptr addrspace(1) @out, align 4
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br label %end
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case3:
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store i32 3, ptr addrspace(1) @out, align 4
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br label %end
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end:
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ret void
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}
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define i32 @test2(i32 %tmp158) {
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; CHECK-LABEL: test2(
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; CHECK: {
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; CHECK-NEXT: .reg .pred %p<6>;
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; CHECK-NEXT: .reg .b32 %r<10>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0: // %entry
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; CHECK-NEXT: ld.param.u32 %r1, [test2_param_0];
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; CHECK-NEXT: setp.gt.s32 %p1, %r1, 119;
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; CHECK-NEXT: @%p1 bra $L__BB1_4;
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; CHECK-NEXT: // %bb.1: // %entry
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; CHECK-NEXT: setp.lt.u32 %p4, %r1, 6;
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; CHECK-NEXT: @%p4 bra $L__BB1_3;
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; CHECK-NEXT: // %bb.2: // %entry
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; CHECK-NEXT: setp.lt.s32 %p5, %r1, -2147483645;
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; CHECK-NEXT: @%p5 bra $L__BB1_3;
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; CHECK-NEXT: bra.uni $L__BB1_6;
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; CHECK-NEXT: $L__BB1_4: // %entry
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; CHECK-NEXT: add.s32 %r2, %r1, -120;
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; CHECK-NEXT: setp.gt.u32 %p2, %r2, 5;
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; CHECK-NEXT: @%p2 bra $L__BB1_5;
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; CHECK-NEXT: // %bb.12: // %entry
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; CHECK-NEXT: $L_brx_0: .branchtargets
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; CHECK-NEXT: $L__BB1_3,
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; CHECK-NEXT: $L__BB1_7,
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; CHECK-NEXT: $L__BB1_8,
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; CHECK-NEXT: $L__BB1_9,
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; CHECK-NEXT: $L__BB1_10,
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; CHECK-NEXT: $L__BB1_11;
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; CHECK-NEXT: brx.idx %r2, $L_brx_0;
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; CHECK-NEXT: $L__BB1_7: // %bb339
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; CHECK-NEXT: mov.b32 %r7, 12;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r7;
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; CHECK-NEXT: ret;
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; CHECK-NEXT: $L__BB1_5: // %entry
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; CHECK-NEXT: setp.eq.s32 %p3, %r1, 1024;
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; CHECK-NEXT: @%p3 bra $L__BB1_3;
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; CHECK-NEXT: bra.uni $L__BB1_6;
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; CHECK-NEXT: $L__BB1_3: // %bb338
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; CHECK-NEXT: mov.b32 %r8, 11;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r8;
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; CHECK-NEXT: ret;
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; CHECK-NEXT: $L__BB1_10: // %bb342
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; CHECK-NEXT: mov.b32 %r4, 15;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r4;
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; CHECK-NEXT: ret;
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; CHECK-NEXT: $L__BB1_6: // %bb336
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; CHECK-NEXT: mov.b32 %r9, 10;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r9;
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; CHECK-NEXT: ret;
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; CHECK-NEXT: $L__BB1_8: // %bb340
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; CHECK-NEXT: mov.b32 %r6, 13;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r6;
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; CHECK-NEXT: ret;
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; CHECK-NEXT: $L__BB1_9: // %bb341
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; CHECK-NEXT: mov.b32 %r5, 14;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r5;
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; CHECK-NEXT: ret;
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; CHECK-NEXT: $L__BB1_11: // %bb343
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; CHECK-NEXT: mov.b32 %r3, 18;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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entry:
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switch i32 %tmp158, label %bb336 [
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i32 -2147483648, label %bb338
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i32 -2147483647, label %bb338
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i32 -2147483646, label %bb338
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i32 120, label %bb338
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i32 121, label %bb339
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i32 122, label %bb340
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i32 123, label %bb341
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i32 124, label %bb342
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i32 125, label %bb343
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i32 126, label %bb336
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i32 1024, label %bb338
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i32 0, label %bb338
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i32 1, label %bb338
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i32 2, label %bb338
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i32 3, label %bb338
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i32 4, label %bb338
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i32 5, label %bb338
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]
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bb336:
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ret i32 10
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bb338:
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ret i32 11
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bb339:
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ret i32 12
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bb340:
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ret i32 13
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bb341:
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ret i32 14
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bb342:
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ret i32 15
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bb343:
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ret i32 18
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}
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