b279f6b098
Similar to 806761a762
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS),
leaving a target triple which may not make sense.
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as we recognize
nvptx{,64}-apple-darwin as ELF instead of rejecting it outrightly.
96 lines
3.8 KiB
LLVM
96 lines
3.8 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_30 -mattr=+ptx60 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_30 -mattr=+ptx60 | %ptxas-verify %}
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declare i32 @llvm.nvvm.shfl.sync.down.i32(i32, i32, i32, i32)
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declare float @llvm.nvvm.shfl.sync.down.f32(float, i32, i32, i32)
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declare i32 @llvm.nvvm.shfl.sync.up.i32(i32, i32, i32, i32)
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declare float @llvm.nvvm.shfl.sync.up.f32(float, i32, i32, i32)
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declare i32 @llvm.nvvm.shfl.sync.bfly.i32(i32, i32, i32, i32)
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declare float @llvm.nvvm.shfl.sync.bfly.f32(float, i32, i32, i32)
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declare i32 @llvm.nvvm.shfl.sync.idx.i32(i32, i32, i32, i32)
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declare float @llvm.nvvm.shfl.sync.idx.f32(float, i32, i32, i32)
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; CHECK-LABEL: .func{{.*}}shfl_sync_rrr
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define i32 @shfl_sync_rrr(i32 %mask, i32 %a, i32 %b, i32 %c) {
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; CHECK: ld.param.u32 [[MASK:%r[0-9]+]]
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: ld.param.u32 [[B:%r[0-9]+]]
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; CHECK: ld.param.u32 [[C:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], [[C]], [[MASK]];
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 %mask, i32 %a, i32 %b, i32 %c)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_irr
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define i32 @shfl_sync_irr(i32 %a, i32 %b, i32 %c) {
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: ld.param.u32 [[B:%r[0-9]+]]
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; CHECK: ld.param.u32 [[C:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], [[C]], 1;
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 1, i32 %a, i32 %b, i32 %c)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_rri
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define i32 @shfl_sync_rri(i32 %mask, i32 %a, i32 %b) {
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; CHECK: ld.param.u32 [[MASK:%r[0-9]+]]
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: ld.param.u32 [[B:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], 1, [[MASK]];
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 %mask, i32 %a, i32 %b, i32 1)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_iri
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define i32 @shfl_sync_iri(i32 %a, i32 %b) {
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: ld.param.u32 [[B:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], [[B]], 2, 1;
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 1, i32 %a, i32 %b, i32 2)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_rir
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define i32 @shfl_sync_rir(i32 %mask, i32 %a, i32 %c) {
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; CHECK: ld.param.u32 [[MASK:%r[0-9]+]]
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: ld.param.u32 [[C:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 1, [[C]], [[MASK]];
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 %mask, i32 %a, i32 1, i32 %c)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_iir
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define i32 @shfl_sync_iir(i32 %a, i32 %c) {
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: ld.param.u32 [[C:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 2, [[C]], 1;
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 1, i32 %a, i32 2, i32 %c)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_rii
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define i32 @shfl_sync_rii(i32 %mask, i32 %a) {
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; CHECK: ld.param.u32 [[MASK:%r[0-9]+]]
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 1, 2, [[MASK]];
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 %mask, i32 %a, i32 1, i32 2)
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ret i32 %val
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}
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; CHECK-LABEL: .func{{.*}}shfl_sync_iii
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define i32 @shfl_sync_iii(i32 %a, i32 %b) {
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; CHECK: ld.param.u32 [[A:%r[0-9]+]]
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; CHECK: shfl.sync.down.b32 [[OUT:%r[0-9]+]], [[A]], 2, 3, 1;
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; CHECK: st.param.{{.}}32 {{.*}}, [[OUT]]
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%val = call i32 @llvm.nvvm.shfl.sync.down.i32(i32 1, i32 %a, i32 2, i32 3)
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ret i32 %val
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}
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