85d15bd130
Similar to what we do for broadcast shuffles, when legalising load costs, if the value is known to be uniform, then we will only load a single vector and reuse this across the split legalised registers. Fixes #111126
40 lines
2.5 KiB
LLVM
40 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64 | FileCheck %s
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; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64-v2 | FileCheck %s
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; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64-v3 | FileCheck %s
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; RUN: opt < %s -S -mtriple=x86_64-- -passes=slp-vectorizer -mcpu=x86-64-v4 | FileCheck %s
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@arr = global [20 x i64] zeroinitializer, align 16
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define void @PR111126() {
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; CHECK-LABEL: @PR111126(
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; CHECK-NEXT: store <4 x i64> splat (i64 1), ptr @arr, align 16
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; CHECK-NEXT: store <4 x i64> splat (i64 1), ptr getelementptr inbounds (i8, ptr @arr, i64 32), align 16
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; CHECK-NEXT: store <4 x i64> splat (i64 1), ptr getelementptr inbounds (i8, ptr @arr, i64 64), align 16
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; CHECK-NEXT: store <4 x i64> splat (i64 1), ptr getelementptr inbounds (i8, ptr @arr, i64 96), align 16
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; CHECK-NEXT: store <4 x i64> splat (i64 1), ptr getelementptr inbounds (i8, ptr @arr, i64 128), align 16
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; CHECK-NEXT: ret void
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;
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store i64 1, ptr @arr, align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 8), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 16), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 24), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 32), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 40), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 48), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 56), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 64), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 72), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 80), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 88), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 96), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 104), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 112), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 120), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 128), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 136), align 8
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 144), align 16
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store i64 1, ptr getelementptr inbounds (i8, ptr @arr, i64 152), align 8
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ret void
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}
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