There is a DAG combine, that folds:
```
t1: v1i1 = setcc x:v1f16, y:v1f16, setogt:ch
t2: v1i64 = zero_extend t1
```
->
```
t1: v1i16 = setcc x:v1f16, y:v1f16, setogt:ch
t2: v1i64 = any_extend t1
```
This creates an issue on AArch64 when attempting to widen the result to
`v4i16`. The operand types (`v1f16`) are set to be scalarized, so the
"by hand" widening with `DAG.WidenVector` is used for them, however,
this only widens to the next power-of-2, so returns `v2f16`, which does
not match the result VF. The fix is to manually construct the widened
inputs using `INSERT_SUBVECTOR`.
Fixes#136540
c95bc41562