Don't count register uses when determining the maximum number of registers used by a function. Count only the defs. This is really an underestimate of the true register usage, but in practice that's not a problem because if a function uses a register, then it has either defined it earlier, or some other function that executed before has defined it. In particular, the register counts are used: 1. When launching an entry function - in which case we're safe because the register counts of the entry function will include the register counts of all callees. 2. At function boundaries in dynamic VGPR mode. In this case it's safe because whenever we set the new VGPR allocation we take into account the outgoing_vgpr_count set by the middle-end. The main advantage of doing this is that the artificial VGPR arguments used only for preserving the inactive lanes when using the llvm.amdgcn.init.whole.wave intrinsic are no longer counted. This enables us to allocate only the registers we need in dynamic VGPR mode. --------- Co-authored-by: Thomas Symalla <5754458+tsymalla@users.noreply.github.com>
31 lines
1.1 KiB
LLVM
31 lines
1.1 KiB
LLVM
; RUN: llc -mcpu=gfx1200 -o - < %s | FileCheck %s --check-prefixes=CHECK,PACKED
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; RUN: llc -mcpu=gfx1030 -o - < %s | FileCheck %s --check-prefixes=CHECK,NOTPACKED
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target triple = "amdgcn-amd-amdhsa"
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@global = addrspace(1) global i32 poison, align 4
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; Carefully crafted kernel that uses v0 but never writes a VGPR or reads another VGPR.
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; Only hardware-initialized VGPRs (v0) are read in this kernel.
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; CHECK-LABEL: amdhsa.kernels:
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; CHECK-LABEL: kernel_x
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; CHECK: .vgpr_count: 1
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define amdgpu_kernel void @kernel_x(ptr addrspace(8) %rsrc) #0 {
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entry:
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %id, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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ret void
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}
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; CHECK-LABEL: kernel_z
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; PACKED: .vgpr_count: 1
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; NOTPACKED: .vgpr_count: 3
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define amdgpu_kernel void @kernel_z(ptr addrspace(8) %rsrc) {
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entry:
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%id = call i32 @llvm.amdgcn.workitem.id.z()
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call void @llvm.amdgcn.raw.ptr.buffer.store.i32(i32 %id, ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
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ret void
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}
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attributes #0 = { "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
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