130080fab1
Don't count register uses when determining the maximum number of registers used by a function. Count only the defs. This is really an underestimate of the true register usage, but in practice that's not a problem because if a function uses a register, then it has either defined it earlier, or some other function that executed before has defined it. In particular, the register counts are used: 1. When launching an entry function - in which case we're safe because the register counts of the entry function will include the register counts of all callees. 2. At function boundaries in dynamic VGPR mode. In this case it's safe because whenever we set the new VGPR allocation we take into account the outgoing_vgpr_count set by the middle-end. The main advantage of doing this is that the artificial VGPR arguments used only for preserving the inactive lanes when using the llvm.amdgcn.init.whole.wave intrinsic are no longer counted. This enables us to allocate only the registers we need in dynamic VGPR mode. --------- Co-authored-by: Thomas Symalla <5754458+tsymalla@users.noreply.github.com>
36 lines
1.1 KiB
LLVM
36 lines
1.1 KiB
LLVM
; RUN: llc -mcpu=gfx1200 -o - < %s | FileCheck %s
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; Check that reads of a VGPR in kernels counts towards VGPR count, but in functions, only writes of VGPRs count towards VGPR count.
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target triple = "amdgcn--amdpal"
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@global = addrspace(1) global i32 poison, align 4
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; CHECK-LABEL: amdpal.pipelines:
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; Neither uses not writes a VGPR, but the hardware initializes the VGPRs that the kernel receives, so they count as used.
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; CHECK-LABEL: .entry_point_symbol: kernel_use
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; CHECK: .vgpr_count: 0x20
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define amdgpu_cs void @kernel_use([32 x i32] %args) {
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entry:
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%a = extractvalue [32 x i32] %args, 14
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store i32 %a, ptr addrspace(1) @global
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ret void
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}
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; Neither uses not writes a VGPR
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; CHECK-LABEL: chain_func:
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; CHECK: .vgpr_count: 0x1
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define amdgpu_cs_chain void @chain_func([32 x i32] %args) {
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entry:
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call void (ptr, i32, {}, [32 x i32], i32, ...) @llvm.amdgcn.cs.chain.p0.i32.s.a(
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ptr @chain_func, i32 0, {} inreg {}, [32 x i32] %args, i32 0)
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unreachable
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}
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; Neither uses not writes a VGPR
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; CHECK-LABEL: gfx_func:
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; CHECK: .vgpr_count: 0x1
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define amdgpu_gfx [32 x i32] @gfx_func([32 x i32] %args) {
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entry:
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ret [32 x i32] %args
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}
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