369891b674
In most cases, the type information attached to load and store instructions is meaningless and inconsistently applied. We can usually use ".b" loads and avoid the complexity of trying to assign the correct type. The one expectation is sign-extending load, which will continue to use ".s" to ensure the sign extension into a larger register is done correctly.
139 lines
4.2 KiB
LLVM
139 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s | FileCheck %s
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target triple = "nvptx64-nvidia-cuda"
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define i32 @test_ld_param_const(ptr byval(i32) %a) {
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; CHECK-LABEL: test_ld_param_const(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [test_ld_param_const_param_0+4];
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%p2 = getelementptr i32, ptr %a, i32 1
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%ld = load i32, ptr %p2
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ret i32 %ld
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}
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define i32 @test_ld_param_non_const(ptr byval([10 x i32]) %a, i32 %b) {
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; CHECK-LABEL: test_ld_param_non_const(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-NEXT: .reg .b64 %rd<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: mov.b64 %rd1, test_ld_param_non_const_param_0;
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; CHECK-NEXT: ld.param.s32 %rd2, [test_ld_param_non_const_param_1];
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; CHECK-NEXT: add.s64 %rd3, %rd1, %rd2;
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; CHECK-NEXT: ld.local.b32 %r1, [%rd3];
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%p2 = getelementptr i8, ptr %a, i32 %b
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%ld = load i32, ptr %p2
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ret i32 %ld
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}
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declare void @escape(ptr)
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declare void @byval_user(ptr byval(i32))
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define void @test_ld_param_escaping(ptr byval(i32) %a) {
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; CHECK-LABEL: test_ld_param_escaping(
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; CHECK: {
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; CHECK-NEXT: .reg .b64 %rd<3>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: mov.b64 %rd1, test_ld_param_escaping_param_0;
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; CHECK-NEXT: cvta.local.u64 %rd2, %rd1;
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; CHECK-NEXT: { // callseq 0, 0
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; CHECK-NEXT: .param .b64 param0;
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; CHECK-NEXT: st.param.b64 [param0], %rd2;
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; CHECK-NEXT: call.uni
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; CHECK-NEXT: escape,
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; CHECK-NEXT: (
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; CHECK-NEXT: param0
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; CHECK-NEXT: );
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; CHECK-NEXT: } // callseq 0
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; CHECK-NEXT: ret;
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call void @escape(ptr %a)
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ret void
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}
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define void @test_ld_param_byval(ptr byval(i32) %a) {
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; CHECK-LABEL: test_ld_param_byval(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [test_ld_param_byval_param_0];
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; CHECK-NEXT: { // callseq 1, 0
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; CHECK-NEXT: .param .align 4 .b8 param0[4];
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; CHECK-NEXT: st.param.b32 [param0], %r1;
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; CHECK-NEXT: call.uni
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; CHECK-NEXT: byval_user,
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; CHECK-NEXT: (
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; CHECK-NEXT: param0
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; CHECK-NEXT: );
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; CHECK-NEXT: } // callseq 1
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; CHECK-NEXT: ret;
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call void @byval_user(ptr %a)
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ret void
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}
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define i32 @test_modify_param(ptr byval([10 x i32]) %a, i32 %b, i32 %c ) {
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; CHECK-LABEL: test_modify_param(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: mov.b64 %rd1, test_modify_param_param_0;
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; CHECK-NEXT: ld.param.b32 %r1, [test_modify_param_param_1];
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; CHECK-NEXT: ld.param.b32 %r2, [test_modify_param_param_2];
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; CHECK-NEXT: st.local.b32 [%rd1+2], %r1;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
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; CHECK-NEXT: ret;
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%p2 = getelementptr i8, ptr %a, i32 2
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store volatile i32 %b, ptr %p2
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ret i32 %c
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}
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define i32 @test_multi_block(ptr byval([10 x i32]) %a, i1 %p) {
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; CHECK-LABEL: test_multi_block(
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; CHECK: {
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; CHECK-NEXT: .reg .pred %p<3>;
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; CHECK-NEXT: .reg .b16 %rs<3>;
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; CHECK-NEXT: .reg .b32 %r<5>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b8 %rs1, [test_multi_block_param_1];
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; CHECK-NEXT: and.b16 %rs2, %rs1, 1;
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; CHECK-NEXT: setp.ne.b16 %p1, %rs2, 0;
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; CHECK-NEXT: not.pred %p2, %p1;
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; CHECK-NEXT: @%p2 bra $L__BB5_2;
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; CHECK-NEXT: // %bb.1: // %if
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; CHECK-NEXT: ld.param.b32 %r4, [test_multi_block_param_0+4];
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; CHECK-NEXT: bra.uni $L__BB5_3;
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; CHECK-NEXT: $L__BB5_2: // %else
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; CHECK-NEXT: ld.param.b32 %r4, [test_multi_block_param_0+8];
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; CHECK-NEXT: $L__BB5_3: // %end
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; CHECK-NEXT: st.param.b32 [func_retval0], %r4;
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; CHECK-NEXT: ret;
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br i1 %p, label %if, label %else
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if:
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%p2 = getelementptr i8, ptr %a, i32 4
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%v2 = load i32, ptr %p2
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br label %end
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else:
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%p3 = getelementptr i8, ptr %a, i32 8
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%v3 = load i32, ptr %p3
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br label %end
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end:
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%v = phi i32 [ %v2, %if ], [ %v3, %else ]
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ret i32 %v
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}
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