369891b674
In most cases, the type information attached to load and store instructions is meaningless and inconsistently applied. We can usually use ".b" loads and avoid the complexity of trying to assign the correct type. The one expectation is sign-extending load, which will continue to use ".s" to ensure the sign extension into a larger register is done correctly.
125 lines
3.6 KiB
LLVM
125 lines
3.6 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefixes=CHECK,NOALIGN4
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-force-min-byval-param-align | FileCheck %s --check-prefixes=CHECK,ALIGN4
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-force-min-byval-param-align | %ptxas-verify %}
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;;; Need 4-byte alignment on ptr passed byval
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define ptx_device void @t1(ptr byval(float) %x) {
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; CHECK: .func t1
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; CHECK: .param .align 4 .b8 t1_param_0[4]
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ret void
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}
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;;; Need 8-byte alignment on ptr passed byval
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define ptx_device void @t2(ptr byval(double) %x) {
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; CHECK: .func t2
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; CHECK: .param .align 8 .b8 t2_param_0[8]
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ret void
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}
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;;; Need 4-byte alignment on float2* passed byval
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%struct.float2 = type { float, float }
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define ptx_device void @t3(ptr byval(%struct.float2) %x) {
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; CHECK: .func t3
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; CHECK: .param .align 4 .b8 t3_param_0[8]
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ret void
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}
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define ptx_device void @t4(ptr byval(i8) %x) {
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; CHECK: .func t4
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; NOALIGN4: .param .align 1 .b8 t4_param_0[1]
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; ALIGN4: .param .align 4 .b8 t4_param_0[1]
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ret void
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}
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;;; Make sure we adjust alignment at the call site as well.
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define ptx_device void @t5(ptr align 2 byval(i8) %x) {
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; CHECK: .func t5
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; NOALIGN4: .param .align 2 .b8 t5_param_0[1]
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; ALIGN4: .param .align 4 .b8 t5_param_0[1]
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; CHECK: {
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; NOALIGN4: .param .align 1 .b8 param0[1];
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; ALIGN4: .param .align 4 .b8 param0[1];
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; CHECK: call.uni
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call void @t4(ptr byval(i8) %x)
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ret void
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}
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;;; Make sure we adjust alignment for a function prototype
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;;; in case of an inderect call.
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declare ptr @getfp(i32 %n)
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%struct.half2 = type { half, half }
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define ptx_device void @t6() {
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; CHECK: .func t6
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%fp = call ptr @getfp(i32 0)
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; CHECK: prototype_2 : .callprototype ()_ (.param .align 8 .b8 _[8]);
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call void %fp(ptr byval(double) null);
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%fp2 = call ptr @getfp(i32 1)
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; NOALIGN4: prototype_4 : .callprototype ()_ (.param .align 2 .b8 _[4]);
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; ALIGN4: prototype_4 : .callprototype ()_ (.param .align 4 .b8 _[4]);
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call void %fp(ptr byval(%struct.half2) null);
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%fp3 = call ptr @getfp(i32 2)
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; NOALIGN4: prototype_6 : .callprototype ()_ (.param .align 1 .b8 _[1]);
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; ALIGN4: prototype_6 : .callprototype ()_ (.param .align 4 .b8 _[1]);
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call void %fp(ptr byval(i8) null);
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ret void
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}
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; CHECK-LABEL: .func check_ptr_align1(
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; CHECK: ld.param.b64 %rd1, [check_ptr_align1_param_0];
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; CHECK-NOT: ld.param.b8
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; CHECK: mov.b32 %r1, 0;
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; CHECK: st.b8 [%rd1+3], %r1;
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; CHECK: st.b8 [%rd1+2], %r1;
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; CHECK: st.b8 [%rd1+1], %r1;
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; CHECK: mov.b32 %r2, 1;
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; CHECK: st.b8 [%rd1], %r2;
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; CHECK: ret;
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define void @check_ptr_align1(ptr align 1 %_arg_ptr) {
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entry:
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store i32 1, ptr %_arg_ptr, align 1
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ret void
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}
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; CHECK-LABEL: .func check_ptr_align2(
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; CHECK: ld.param.b64 %rd1, [check_ptr_align2_param_0];
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; CHECK-NOT: ld.param.b16
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; CHECK: mov.b32 %r1, 0;
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; CHECK: st.b16 [%rd1+2], %r1;
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; CHECK: mov.b32 %r2, 2;
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; CHECK: st.b16 [%rd1], %r2;
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; CHECK: ret;
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define void @check_ptr_align2(ptr align 2 %_arg_ptr) {
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entry:
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store i32 2, ptr %_arg_ptr, align 2
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ret void
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}
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; CHECK-LABEL: .func check_ptr_align4(
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; CHECK: ld.param.b64 %rd1, [check_ptr_align4_param_0];
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; CHECK-NOT: ld.param.b32
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; CHECK: mov.b32 %r1, 4;
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; CHECK: st.b32 [%rd1], %r1;
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; CHECK: ret;
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define void @check_ptr_align4(ptr align 4 %_arg_ptr) {
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entry:
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store i32 4, ptr %_arg_ptr, align 4
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ret void
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}
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; CHECK-LABEL: .func check_ptr_align8(
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; CHECK: ld.param.b64 %rd1, [check_ptr_align8_param_0];
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; CHECK: mov.b32 %r1, 8;
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; CHECK: st.b32 [%rd1], %r1;
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; CHECK: ret;
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define void @check_ptr_align8(ptr align 8 %_arg_ptr) {
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entry:
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store i32 8, ptr %_arg_ptr, align 8
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ret void
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}
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