f24cf59d7a
As part of an effort to enable instr-ref-based debug value tracking, this PR implements `SystemZInstrInfo::isLoadFromStackSlotPostFE`, as well as `SystemZInstrInfo::isStoreToStackSlotPostFE`. The implementation relies upon the presence of MachineMemoryOperands on the relevant `MachineInstr`s in order to access the `FrameIndex` post frame index elimination. Since these new functions are only meant to be called after frame-index elimination, they assert against the present of a frame index on the base register operand of the instruction. Outside of the utility of these functions to enable instr-ref-based debug value tracking, they also changes the behavior of the AsmPrinter, since it will now be able to properly detect non-folded spills and reloads, so this changes a number of tests that were checking specifically for folded reloads. Note that there are some tests that still check for `vst` and `vl` as folded spills/reloads even though they should be straight reloads. This will be addressed in a future PR. Co-authored-by: Dominik Steenken <dominik.steenken@gmail.com>
88 lines
2.9 KiB
LLVM
88 lines
2.9 KiB
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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;
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; Test the packed stack layout.
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; Test spill/restore of an FPR and a GPR.
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define void @f1() #0 {
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; CHECK-LABEL: f1:
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; CHECK: stmg %r12, %r15, 128(%r15)
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; CHECK-NEXT: .cfi_offset %r12, -32
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; CHECK-NEXT: .cfi_offset %r15, -8
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; CHECK-NEXT: std %f8, 120(%r15) # 8-byte Spill
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; CHECK-NEXT: .cfi_offset %f8, -40
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ld %f8, 120(%r15) # 8-byte Reload
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; CHECK-NEXT: lmg %r12, %r15, 128(%r15)
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; CHECK-NEXT: br %r14
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call void asm sideeffect "", "~{f8},~{r12}"() nounwind
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ret void
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}
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; Test spill/restore with anyregcc, including an FP argument register.
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define anyregcc void @f2() #0 {
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; CHECK-LABEL: f2:
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; CHECK: stmg %r3, %r15, 56(%r15)
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; CHECK-NEXT: .cfi_offset %r3, -104
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; CHECK-NEXT: .cfi_offset %r15, -8
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; CHECK-NEXT: std %f0, 48(%r15) # 8-byte Spill
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; CHECK-NEXT: std %f1, 40(%r15) # 8-byte Spill
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; CHECK-NEXT: .cfi_offset %f0, -112
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; CHECK-NEXT: .cfi_offset %f1, -120
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ld %f0, 48(%r15) # 8-byte Reload
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; CHECK-NEXT: ld %f1, 40(%r15) # 8-byte Reload
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; CHECK-NEXT: lmg %r3, %r15, 56(%r15)
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; CHECK-NEXT: br %r14
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call void asm sideeffect "", "~{f0},~{f1},~{r3}"() nounwind
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ret void
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}
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; Test spill/restore in local area with incoming stack arguments.
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define i64 @f3(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f,
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double %A, double %B, double %C, double %D, double %E) #0 {
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; CHECK-LABEL: f3:
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; CHECK: std %f8, 152(%r15) # 8-byte Spill
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; CHECK-NEXT: .cfi_offset %f8, -8
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; CHECK-NEXT: ld %f0, 168(%r15)
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; CHECK-NEXT: cgdbr %r2, 5, %f0
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; CHECK-NEXT: ag %r2, 160(%r15)
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: ld %f8, 152(%r15) # 8-byte Reload
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; CHECK-NEXT: br %r14
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call void asm sideeffect "", "~{f8}"() nounwind
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%Ei = fptosi double %E to i64
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%S = add i64 %f, %Ei
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ret i64 %S
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}
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; Test spill/restore in local area with outgoing stack arguments.
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define i64 @f4() #0 {
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; CHECK-LABEL: f4:
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; CHECK: stmg %r6, %r15, 80(%r15)
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; CHECK-NEXT: .cfi_offset %r6, -80
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; CHECK-NEXT: .cfi_offset %r14, -16
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; CHECK-NEXT: .cfi_offset %r15, -8
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; CHECK-NEXT: aghi %r15, -104
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; CHECK-NEXT: .cfi_def_cfa_offset 264
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; CHECK-NEXT: std %f8, 176(%r15) # 8-byte Spill
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; CHECK-NEXT: .cfi_offset %f8, -88
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; CHECK-NEXT: #APP
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: llihh %r0, 16404
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; CHECK-NEXT: stg %r0, 168(%r15)
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; CHECK: mvghi 160(%r15), 6
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; CHECK-NEXT: brasl %r14, f3@PLT
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; CHECK-NEXT: ld %f8, 176(%r15) # 8-byte Reload
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; CHECK-NEXT: lmg %r6, %r15, 184(%r15)
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; CHECK-NEXT: br %r14
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call void asm sideeffect "", "~{f8}"() nounwind
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%C = call i64 @f3 (i64 1, i64 2, i64 3, i64 4, i64 5, i64 6,
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double 1.0, double 2.0, double 3.0, double 4.0, double 5.0)
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ret i64 %C
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}
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attributes #0 = { "packed-stack"="true" }
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