6d03f51f0c
- _Float16 is now accepted by Clang. - The half IR type is fully handled by the backend. - These values are passed in FP registers and converted to/from float around each operation. - Compiler-rt conversion functions are now built for s390x including the missing extendhfdf2 which was added. Fixes #50374
123 lines
3.2 KiB
LLVM
123 lines
3.2 KiB
LLVM
; Test the Test Data Class instruction logic operation conversion from
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; compares, combined with signbit or other compares to ensure worthiness.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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;
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declare float @llvm.fabs.f32(float)
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declare double @llvm.fabs.f64(double)
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declare fp128 @llvm.fabs.f128(fp128)
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; Compare with 0, extract sign bit
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define i32 @f0(half %x) {
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; CHECK-LABEL: f0
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; CHECK: lgdr %r0, %f0
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; CHECK-NEXT: srlg %r0, %r0, 48
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; CHECK-NEXT: lhr %r0, %r0
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; CHECK-NEXT: chi %r0, 0
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; CHECK-NEXT: ipm %r0
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; CHECK-NEXT: risbg %r13, %r0, 63, 191, 36
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; CHECK-NEXT: # kill: def $f0h killed $f0h killed $f0d
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; CHECK-NEXT: brasl %r14, __extendhfsf2@PLT
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; CHECK-NEXT: ltebr %f0, %f0
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; CHECK-NEXT: ipm %r0
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; CHECK-NEXT: rosbg %r13, %r0, 63, 63, 35
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; CHECK-NEXT: lr %r2, %r13
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; CHECK-NEXT: lmg %r13, %r15, 264(%r15)
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; CHECK-NEXT: br %r14
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%cast = bitcast half %x to i16
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%sign = icmp slt i16 %cast, 0
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%fcmp = fcmp ugt half %x, 0.0
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%res = or i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with 0, extract sign bit
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define i32 @f1(float %x) {
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; CHECK-LABEL: f1
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; CHECK: tceb %f0, 2047
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%cast = bitcast float %x to i32
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%sign = icmp slt i32 %cast, 0
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%fcmp = fcmp ugt float %x, 0.0
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%res = or i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with inf, extract negated sign bit
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define i32 @f2(float %x) {
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; CHECK-LABEL: f2
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; CHECK: tceb %f0, 2698
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%cast = bitcast float %x to i32
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%sign = icmp sgt i32 %cast, -1
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%fcmp = fcmp ult float %x, 0x7ff0000000000000
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%res = and i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Compare with minnorm, extract negated sign bit
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define i32 @f3(float %x) {
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; CHECK-LABEL: f3
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; CHECK: tceb %f0, 2176
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%cast = bitcast float %x to i32
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%sign = icmp sgt i32 %cast, -1
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%fcmp = fcmp olt float %x, 0x3810000000000000
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%res = and i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Test float isnormal, from clang.
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define i32 @f4(float %x) {
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; CHECK-LABEL: f4
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; CHECK: tceb %f0, 768
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%y = call float @llvm.fabs.f32(float %x)
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%ord = fcmp ord float %x, 0.0
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%a = fcmp ult float %y, 0x7ff0000000000000
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%b = fcmp uge float %y, 0x3810000000000000
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%c = and i1 %a, %b
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%res = and i1 %ord, %c
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Check for negative 0.
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define i32 @f5(float %x) {
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; CHECK-LABEL: f5
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; CHECK: tceb %f0, 1024
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%cast = bitcast float %x to i32
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%sign = icmp slt i32 %cast, 0
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%fcmp = fcmp oeq float %x, 0.0
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%res = and i1 %sign, %fcmp
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Test isnormal, from clang.
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define i32 @f6(double %x) {
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; CHECK-LABEL: f6
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; CHECK: tcdb %f0, 768
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%y = call double @llvm.fabs.f64(double %x)
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%ord = fcmp ord double %x, 0.0
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%a = fcmp ult double %y, 0x7ff0000000000000
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%b = fcmp uge double %y, 0x0010000000000000
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%c = and i1 %ord, %a
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%res = and i1 %b, %c
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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; Test isinf || isnan, from clang.
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define i32 @f7(double %x) {
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; CHECK-LABEL: f7
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; CHECK: tcdb %f0, 63
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%y = call double @llvm.fabs.f64(double %x)
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%a = fcmp oeq double %y, 0x7ff0000000000000
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%b = fcmp uno double %x, 0.0
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%res = or i1 %a, %b
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%xres = zext i1 %res to i32
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ret i32 %xres
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}
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