a47c35a699
The createSIMachineScheduler & createPostMachineScheduler target hooks are currently placed in the PassConfig interface. Moving it out to TargetMachine so that both legacy and the new pass manager can effectively use them.
112 lines
4.0 KiB
C++
112 lines
4.0 KiB
C++
//==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the AArch64 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
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#define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
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#include "AArch64InstrInfo.h"
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#include "AArch64Subtarget.h"
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#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
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#include "llvm/IR/DataLayout.h"
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#include <optional>
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namespace llvm {
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class AArch64TargetMachine : public CodeGenTargetMachineImpl {
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protected:
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std::unique_ptr<TargetLoweringObjectFile> TLOF;
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mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
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/// Reset internal state.
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void reset() override;
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public:
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AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT, bool IsLittleEndian);
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~AArch64TargetMachine() override;
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const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
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// DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
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// subtargets are per-function entities based on the target-specific
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// attributes of each function.
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const AArch64Subtarget *getSubtargetImpl() const = delete;
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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void registerPassBuilderCallbacks(PassBuilder &PB) override;
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TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
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TargetLoweringObjectFile* getObjFileLowering() const override {
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return TLOF.get();
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}
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MachineFunctionInfo *
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createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
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const TargetSubtargetInfo *STI) const override;
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yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
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yaml::MachineFunctionInfo *
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convertFuncInfoToYAML(const MachineFunction &MF) const override;
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bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
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PerFunctionMIParsingState &PFS,
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SMDiagnostic &Error,
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SMRange &SourceRange) const override;
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/// Returns true if a cast between SrcAS and DestAS is a noop.
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bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
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return getPointerSize(SrcAS) == getPointerSize(DestAS);
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}
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ScheduleDAGInstrs *
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createMachineScheduler(MachineSchedContext *C) const override;
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ScheduleDAGInstrs *
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createPostMachineScheduler(MachineSchedContext *C) const override;
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private:
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bool isLittle;
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};
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// AArch64 little endian target machine.
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//
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class AArch64leTargetMachine : public AArch64TargetMachine {
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virtual void anchor();
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public:
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AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT);
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};
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// AArch64 big endian target machine.
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//
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class AArch64beTargetMachine : public AArch64TargetMachine {
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virtual void anchor();
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public:
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AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT);
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};
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} // end namespace llvm
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#endif
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