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clang-p2996/llvm/test/CodeGen/AMDGPU/machine-sink-ignorable-exec-use.mir
Jeffrey Byrnes acb7859f07 [MachineSink] Extend loop sinking capability (#117247) 
The current MIR cycle sinking capabilities are rather limited. It only
support sinking copies into a single successor block while obeying
limits.

This opt-in feature adds a more aggressive option, that is not limited
to the above concerns. The feature will try to "sink" by duplicating any
top-level preheader instruction (that we are sure is safe to sink) into
any user block, then does some dead code cleanup. In particular, this is
useful for high RP situations when loop bodies have control flow.
2025-01-23 17:08:23 -08:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs -run-pass=machine-sink -o - %s | FileCheck -check-prefixes=GFX9 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs -run-pass=machine-sink --sink-insts-to-avoid-spills=1 -o - %s | FileCheck -check-prefixes=GFX9 %s
---
name: test_sink_fmac_to_only_use
alignment: 1
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: test_sink_fmac_to_only_use
; GFX9: bb.0:
; GFX9-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_1]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY3]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY4]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.1
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_1:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[V_FMAC_F32_e64_]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_2:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD1]], 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_3:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[V_FMAC_F32_e64_2]], 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_ADD_F32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_]], [[V_FMAC_F32_e64_1]], implicit $mode, implicit $exec
; GFX9-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_2]], [[V_FMAC_F32_e64_3]], implicit $mode, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[V_MOV_B32_e32_]], %bb.0, [[V_ADD_F32_e32_]], %bb.1
; GFX9-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[V_MOV_B32_e32_1]], %bb.0, [[V_ADD_F32_e32_1]], %bb.1
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: S_ENDPGM 0, implicit [[PHI]], implicit [[PHI1]]
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2
%1:vgpr_32 = COPY $vgpr0
%2:vgpr_32 = COPY $vgpr1
%3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%4:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%5:sreg_64 = S_MOV_B64 0
%6:sreg_64 = S_MOV_B64 0
%7:vreg_64 = COPY %5
%8:vreg_64 = COPY %6
%9:vgpr_32 = GLOBAL_LOAD_DWORD killed %7, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%10:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %9, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%11:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %10, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%12:vgpr_32 = GLOBAL_LOAD_DWORD killed %8, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%13:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %12, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
%14:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %13, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
%15:vgpr_32(s32) = COPY $vgpr0
%16:sreg_32 = S_MOV_B32 1
%17:sreg_64 = V_CMP_LT_I32_e64 %15(s32), %16, implicit $exec
%18:sreg_64 = COPY %17
%19:sreg_64 = SI_IF %18, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.1
bb.1:
%20:vgpr_32 = V_ADD_F32_e32 %10, %11, implicit $mode, implicit $exec
%21:vgpr_32 = V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
bb.2:
%22:vgpr_32 = PHI %3, %bb.0, %20, %bb.1
%23:vgpr_32 = PHI %4, %bb.0, %21, %bb.1
SI_END_CF %19, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
bb.3:
S_ENDPGM 0, implicit %22, implicit %23
...
---
name: test_no_sink_into_if_cond_multiple_uses
alignment: 1
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: test_no_sink_into_if_cond_multiple_uses
; GFX9: bb.0:
; GFX9-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_1]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_1:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[V_FMAC_F32_e64_]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY3]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_2:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD1]], 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_3:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[V_FMAC_F32_e64_2]], 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY4]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.1
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[V_ADD_F32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_]], [[V_FMAC_F32_e64_1]], implicit $mode, implicit $exec
; GFX9-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_2]], [[V_FMAC_F32_e64_3]], implicit $mode, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[V_MOV_B32_e32_]], %bb.0, [[V_ADD_F32_e32_]], %bb.1
; GFX9-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[V_MOV_B32_e32_1]], %bb.0, [[V_ADD_F32_e32_1]], %bb.1
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: [[V_ADD_F32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_3]], [[V_FMAC_F32_e64_1]], implicit $mode, implicit $exec
; GFX9-NEXT: S_ENDPGM 0, implicit [[PHI]], implicit [[PHI1]]
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2
%1:vgpr_32 = COPY $vgpr0
%2:vgpr_32 = COPY $vgpr1
%3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%4:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%5:sreg_64 = S_MOV_B64 0
%6:sreg_64 = S_MOV_B64 0
%7:vreg_64 = COPY %5
%8:vreg_64 = COPY %6
%9:vgpr_32 = GLOBAL_LOAD_DWORD killed %7, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%10:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %9, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%11:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %10, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%12:vgpr_32 = GLOBAL_LOAD_DWORD killed %8, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%13:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %12, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
%14:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %13, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
%15:vgpr_32(s32) = COPY $vgpr0
%16:sreg_32 = S_MOV_B32 1
%17:sreg_64 = V_CMP_LT_I32_e64 %15(s32), %16, implicit $exec
%18:sreg_64 = COPY %17
%19:sreg_64 = SI_IF %18, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.1
bb.1:
%20:vgpr_32 = V_ADD_F32_e32 %10, %11, implicit $mode, implicit $exec
%21:vgpr_32 = V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
bb.2:
%22:vgpr_32 = PHI %3, %bb.0, %20, %bb.1
%23:vgpr_32 = PHI %4, %bb.0, %21, %bb.1
SI_END_CF %19, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
bb.3:
%24:vgpr_32 = V_ADD_F32_e32 %14, %11, implicit $mode, implicit $exec
S_ENDPGM 0, implicit %22, implicit %23
...
---
name: no_sink_fmac_not_constant_mode
alignment: 1
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: no_sink_fmac_not_constant_mode
; GFX9: bb.0:
; GFX9-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: $mode = IMPLICIT_DEF
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_1]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_1:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[V_FMAC_F32_e64_]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY3]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_2:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD1]], 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_3:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[V_FMAC_F32_e64_2]], 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY4]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.1
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[V_ADD_F32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_]], [[V_FMAC_F32_e64_1]], implicit $mode, implicit $exec
; GFX9-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_F32_e32 [[V_FMAC_F32_e64_2]], [[V_FMAC_F32_e64_3]], implicit $mode, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[V_MOV_B32_e32_]], %bb.0, [[V_ADD_F32_e32_]], %bb.1
; GFX9-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[V_MOV_B32_e32_1]], %bb.0, [[V_ADD_F32_e32_1]], %bb.1
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: S_ENDPGM 0, implicit [[PHI]], implicit [[PHI1]]
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2
$mode = IMPLICIT_DEF
%1:vgpr_32 = COPY $vgpr0
%2:vgpr_32 = COPY $vgpr1
%3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%4:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%5:sreg_64 = S_MOV_B64 0
%6:sreg_64 = S_MOV_B64 0
%7:vreg_64 = COPY %5
%8:vreg_64 = COPY %6
%9:vgpr_32 = GLOBAL_LOAD_DWORD killed %7, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%10:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %9, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%11:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %10, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%12:vgpr_32 = GLOBAL_LOAD_DWORD killed %8, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%13:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %12, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
%14:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %13, 0, %2, 0, %1, 0, 0, implicit $mode, implicit $exec
%15:vgpr_32(s32) = COPY $vgpr0
%16:sreg_32 = S_MOV_B32 1
%17:sreg_64 = V_CMP_LT_I32_e64 %15(s32), %16, implicit $exec
%18:sreg_64 = COPY %17
%19:sreg_64 = SI_IF %18, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.1
bb.1:
%20:vgpr_32 = V_ADD_F32_e32 %10, %11, implicit $mode, implicit $exec
%21:vgpr_32 = V_ADD_F32_e32 %13, %14, implicit $mode, implicit $exec
bb.2:
%22:vgpr_32 = PHI %3, %bb.0, %20, %bb.1
%23:vgpr_32 = PHI %4, %bb.0, %21, %bb.1
SI_END_CF %19, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
bb.3:
S_ENDPGM 0, implicit %22, implicit %23
...
---
name: test_no_sink_fmac_wwm
alignment: 1
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: test_no_sink_fmac_wwm
; GFX9: bb.0:
; GFX9-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: early-clobber %6:vgpr_32 = STRICT_WWM [[V_FMAC_F32_e64_]], implicit $exec
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY3]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.1
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x80000000)
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0, implicit [[V_FMAC_F32_e64_]]
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: S_ENDPGM 0, implicit %6
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2
%1:vgpr_32 = COPY $vgpr0
%2:vgpr_32 = COPY $vgpr1
%20:sreg_64 = S_MOV_B64 0
%30:vreg_64 = COPY %20
%29:vgpr_32 = GLOBAL_LOAD_DWORD killed %30, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%6:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %29, 0, %1, 0, %2, 0, 0, implicit $mode, implicit $exec
%9:vgpr_32 = STRICT_WWM %6, implicit $exec
%16:vgpr_32(s32) = COPY $vgpr0
%23:sreg_32 = S_MOV_B32 1
%24:sreg_64 = V_CMP_LT_I32_e64 %16(s32), %23, implicit $exec
%0:sreg_64 = COPY %24
%5:sreg_64 = SI_IF %0, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.1
bb.1:
bb.2:
S_NOP 0, implicit %6
SI_END_CF %5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
bb.3:
S_ENDPGM 0, implicit %9
...
---
name: test_def_and_use_in_loop_sink_fmac
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: test_def_and_use_in_loop_sink_fmac
; GFX9: bb.0.entry:
; GFX9-NEXT: successors: %bb.1(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY3]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY4]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: successors: %bb.4(0x40000000), %bb.6(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[V_FMAC_F32_e64_1:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD1]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: S_NOP 0, implicit [[V_FMAC_F32_e64_]], implicit [[V_FMAC_F32_e64_1]]
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.6, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.4:
; GFX9-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.4, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.5:
; GFX9-NEXT: successors: %bb.6(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.6:
; GFX9-NEXT: successors: %bb.7(0x04000000), %bb.1(0x7c000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_CBRANCH_VCCZ %bb.1, implicit $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.7:
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_ENDPGM 0
bb.0.entry:
successors: %bb.1(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
%101:vgpr_32 = COPY $vgpr0
%102:vgpr_32 = COPY $vgpr1
%15:vreg_64 = COPY $vgpr2_vgpr3
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
%20:sreg_64 = S_MOV_B64 0
%30:vreg_64 = COPY %20
%29:vgpr_32 = GLOBAL_LOAD_DWORD %30, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%6:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %29, 0, %101, 0, %102, 0, 0, implicit $mode, implicit $exec
%31:vgpr_32 = GLOBAL_LOAD_DWORD %15, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%7:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %31, 0, %101, 0, %102, 0, 0, implicit $mode, implicit $exec
%16:vgpr_32(s32) = COPY $vgpr0
%23:sreg_32 = S_MOV_B32 1
%24:sreg_64 = V_CMP_LT_I32_e64 %16(s32), %23, implicit $exec
%0:sreg_64 = COPY %24
%5:sreg_64 = SI_IF %0, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.2
bb.2:
successors: %bb.3(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
bb.3:
successors: %bb.4(0x40000000), %bb.6(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0, implicit %6, implicit %7
SI_END_CF %5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_CBRANCH_EXECZ %bb.6, implicit $exec
bb.4:
successors: %bb.5(0x04000000), %bb.4(0x7c000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
S_CBRANCH_EXECZ %bb.4, implicit $exec
bb.5:
successors: %bb.6(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
bb.6:
successors: %bb.7(0x04000000), %bb.1(0x7c000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_CBRANCH_VCCZ %bb.1, implicit $vcc
bb.7:
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_ENDPGM 0
...
---
name: test_no_sink_def_into_loop
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: test_no_sink_def_into_loop
; GFX9: bb.0.entry:
; GFX9-NEXT: successors: %bb.1(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY3]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_1:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD1]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0, implicit [[V_FMAC_F32_e64_]], implicit [[V_FMAC_F32_e64_1]]
; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY4]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: successors: %bb.4(0x40000000), %bb.6(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.6, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.4:
; GFX9-NEXT: successors: %bb.5(0x04000000), %bb.4(0x7c000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.4, implicit $exec
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.5:
; GFX9-NEXT: successors: %bb.6(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.6:
; GFX9-NEXT: successors: %bb.7(0x04000000), %bb.1(0x7c000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_CBRANCH_VCCZ %bb.1, implicit $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.7:
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_ENDPGM 0
bb.0.entry:
successors: %bb.1(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
%101:vgpr_32 = COPY $vgpr0
%102:vgpr_32 = COPY $vgpr1
%15:vreg_64 = COPY $vgpr2_vgpr3
%20:sreg_64 = S_MOV_B64 0
%30:vreg_64 = COPY %20
%29:vgpr_32 = GLOBAL_LOAD_DWORD killed %30, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%6:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %29, 0, %101, 0, %102, 0, 0, implicit $mode, implicit $exec
%31:vgpr_32 = GLOBAL_LOAD_DWORD killed %15, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%7:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %31, 0, %101, 0, %102, 0, 0, implicit $mode, implicit $exec
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0, implicit %6, implicit %7
%16:vgpr_32(s32) = COPY $vgpr0
%23:sreg_32 = S_MOV_B32 1
%24:sreg_64 = V_CMP_LT_I32_e64 %16(s32), %23, implicit $exec
%0:sreg_64 = COPY %24
%5:sreg_64 = SI_IF %0, %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.2
bb.2:
successors: %bb.3(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
bb.3:
successors: %bb.4(0x40000000), %bb.6(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
SI_END_CF %5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_CBRANCH_EXECZ %bb.6, implicit $exec
bb.4:
successors: %bb.5(0x04000000), %bb.4(0x7c000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
S_CBRANCH_EXECZ %bb.4, implicit $exec
bb.5:
successors: %bb.6(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
bb.6:
successors: %bb.7(0x04000000), %bb.1(0x7c000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_CBRANCH_VCCZ %bb.1, implicit $vcc
bb.7:
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_ENDPGM 0
...
---
name: test_no_sink_def_into_loop2
tracksRegLiveness: true
machineFunctionInfo:
isEntryFunction: true
body: |
; GFX9-LABEL: name: test_no_sink_def_into_loop2
; GFX9: bb.0.entry:
; GFX9-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX9-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX9-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0
; GFX9-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_MOV_B64_]]
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY3]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: [[GLOBAL_LOAD_DWORD1:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD killed [[COPY2]], 0, 0, implicit $exec :: (load (s32), addrspace 1)
; GFX9-NEXT: [[V_FMAC_F32_e64_1:%[0-9]+]]:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, [[GLOBAL_LOAD_DWORD1]], 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.1
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.1:
; GFX9-NEXT: successors: %bb.2(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: S_BRANCH %bb.2
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.2:
; GFX9-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0, implicit [[V_FMAC_F32_e64_]], implicit [[V_FMAC_F32_e64_1]]
; GFX9-NEXT: [[COPY4:%[0-9]+]]:vgpr_32(s32) = COPY $vgpr0
; GFX9-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 1
; GFX9-NEXT: [[V_CMP_LT_I32_e64_:%[0-9]+]]:sreg_64 = V_CMP_LT_I32_e64 [[COPY4]](s32), [[S_MOV_B32_]], implicit $exec
; GFX9-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF [[V_CMP_LT_I32_e64_]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.3
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.3:
; GFX9-NEXT: successors: %bb.4(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: S_BRANCH %bb.4
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.4:
; GFX9-NEXT: successors: %bb.5(0x40000000), %bb.7(0x40000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.7, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.5
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.5:
; GFX9-NEXT: successors: %bb.6(0x04000000), %bb.5(0x7c000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec
; GFX9-NEXT: S_BRANCH %bb.6
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.6:
; GFX9-NEXT: successors: %bb.7(0x80000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_NOP 0
; GFX9-NEXT: S_BRANCH %bb.7
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.7:
; GFX9-NEXT: successors: %bb.8(0x04000000), %bb.2(0x7c000000)
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_CBRANCH_VCCZ %bb.2, implicit $vcc
; GFX9-NEXT: S_BRANCH %bb.8
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: bb.8:
; GFX9-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
; GFX9-NEXT: {{ $}}
; GFX9-NEXT: S_ENDPGM 0
bb.0.entry:
successors: %bb.1(0x40000000), %bb.2 (0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
%101:vgpr_32 = COPY $vgpr0
%102:vgpr_32 = COPY $vgpr1
%15:vreg_64 = COPY $vgpr2_vgpr3
%20:sreg_64 = S_MOV_B64 0
%30:vreg_64 = COPY %20
%29:vgpr_32 = GLOBAL_LOAD_DWORD killed %30, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%6:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %29, 0, %101, 0, %102, 0, 0, implicit $mode, implicit $exec
%31:vgpr_32 = GLOBAL_LOAD_DWORD killed %15, 0, 0, implicit $exec :: (load (s32), addrspace 1)
%7:vgpr_32 = contract nofpexcept V_FMAC_F32_e64 0, %31, 0, %101, 0, %102, 0, 0, implicit $mode, implicit $exec
S_CBRANCH_EXECZ %bb.2, implicit $exec
S_BRANCH %bb.1
bb.1:
successors: %bb.2(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
S_BRANCH %bb.2
bb.2:
successors: %bb.3(0x40000000), %bb.4(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0, implicit %6, implicit %7
%16:vgpr_32(s32) = COPY $vgpr0
%23:sreg_32 = S_MOV_B32 1
%24:sreg_64 = V_CMP_LT_I32_e64 %16(s32), %23, implicit $exec
%0:sreg_64 = COPY %24
%5:sreg_64 = SI_IF %0, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_BRANCH %bb.3
bb.3:
successors: %bb.4(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
S_BRANCH %bb.4
bb.4:
successors: %bb.5(0x40000000), %bb.7(0x40000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
SI_END_CF %5, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
S_CBRANCH_EXECZ %bb.7, implicit $exec
S_BRANCH %bb.5
bb.5:
successors: %bb.6(0x04000000), %bb.5(0x7c000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
S_CBRANCH_EXECZ %bb.5, implicit $exec
S_BRANCH %bb.6
bb.6:
successors: %bb.7(0x80000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_NOP 0
S_BRANCH %bb.7
bb.7:
successors: %bb.8(0x04000000), %bb.2(0x7c000000)
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_CBRANCH_VCCZ %bb.2, implicit $vcc
S_BRANCH %bb.8
bb.8:
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vcc
S_ENDPGM 0
...
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