Generate code using the VECTOR ADD COMPUTE CARRY and VECTOR SUBTRACT COMPUTE BORROW INDICATION instructions to implement open-coded IR with those semantics. Handles integer vector types as well as i128. Fixes: https://github.com/llvm/llvm-project/issues/129608
88 lines
2.3 KiB
LLVM
88 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; Test usage of VACC/VSCBI.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
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define i128 @i128_subc_1(i128 %a, i128 %b) unnamed_addr {
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; CHECK-LABEL: i128_subc_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vscbiq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%cmp = icmp uge i128 %a, %b
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%ext = zext i1 %cmp to i128
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ret i128 %ext
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}
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define i128 @i128_subc_2(i128 %a, i128 %b) unnamed_addr {
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; CHECK-LABEL: i128_subc_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r3), 3
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; CHECK-NEXT: vl %v1, 0(%r4), 3
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; CHECK-NEXT: vscbiq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%cmp = icmp ule i128 %a, %b
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%ext = zext i1 %cmp to i128
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ret i128 %ext
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}
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define i128 @i128_addc_1(i128 %a, i128 %b) {
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; CHECK-LABEL: i128_addc_1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vaccq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%sum = add i128 %a, %b
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%cmp = icmp ult i128 %sum, %a
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%ext = zext i1 %cmp to i128
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ret i128 %ext
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}
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define i128 @i128_addc_2(i128 %a, i128 %b) {
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; CHECK-LABEL: i128_addc_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vaccq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%sum = add i128 %a, %b
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%cmp = icmp ult i128 %sum, %b
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%ext = zext i1 %cmp to i128
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ret i128 %ext
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}
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define i128 @i128_addc_3(i128 %a, i128 %b) {
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; CHECK-LABEL: i128_addc_3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vaccq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%sum = add i128 %a, %b
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%cmp = icmp ugt i128 %a, %sum
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%ext = zext i1 %cmp to i128
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ret i128 %ext
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}
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define i128 @i128_addc_4(i128 %a, i128 %b) {
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; CHECK-LABEL: i128_addc_4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl %v0, 0(%r4), 3
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; CHECK-NEXT: vl %v1, 0(%r3), 3
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; CHECK-NEXT: vaccq %v0, %v1, %v0
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; CHECK-NEXT: vst %v0, 0(%r2), 3
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; CHECK-NEXT: br %r14
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%sum = add i128 %a, %b
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%cmp = icmp ugt i128 %b, %sum
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%ext = zext i1 %cmp to i128
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ret i128 %ext
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}
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