Allowed range for Page21 relocation is -2^32 <= X < 2^32 in both ELF and MachO.
09c2b7c35a/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h (L210) (MachO)
ELF for the ARM ® 64-bit Architecture (AArch64) Table 4-9 (ELF)
Reviewed By: sgraenitz
Differential Revision: https://reviews.llvm.org/D126387
224 lines
7.1 KiB
C++
224 lines
7.1 KiB
C++
//===---- aarch64.cpp - Generic JITLink aarch64 edge kinds, utilities -----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Generic utilities for graphs representing aarch64 objects.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ExecutionEngine/JITLink/aarch64.h"
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#define DEBUG_TYPE "jitlink"
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namespace llvm {
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namespace jitlink {
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namespace aarch64 {
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bool isLoadStoreImm12(uint32_t Instr) {
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constexpr uint32_t LoadStoreImm12Mask = 0x3b000000;
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return (Instr & LoadStoreImm12Mask) == 0x39000000;
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}
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unsigned getPageOffset12Shift(uint32_t Instr) {
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constexpr uint32_t Vec128Mask = 0x04800000;
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if (isLoadStoreImm12(Instr)) {
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uint32_t ImplicitShift = Instr >> 30;
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if (ImplicitShift == 0)
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if ((Instr & Vec128Mask) == Vec128Mask)
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ImplicitShift = 4;
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return ImplicitShift;
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}
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return 0;
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}
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Error applyFixup(LinkGraph &G, Block &B, const Edge &E) {
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using namespace support;
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char *BlockWorkingMem = B.getAlreadyMutableContent().data();
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char *FixupPtr = BlockWorkingMem + E.getOffset();
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orc::ExecutorAddr FixupAddress = B.getAddress() + E.getOffset();
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switch (E.getKind()) {
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case Branch26: {
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assert((FixupAddress.getValue() & 0x3) == 0 &&
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"Branch-inst is not 32-bit aligned");
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int64_t Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
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if (static_cast<uint64_t>(Value) & 0x3)
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return make_error<JITLinkError>("Branch26 target is not 32-bit "
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"aligned");
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if (Value < -(1 << 27) || Value > ((1 << 27) - 1))
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return makeTargetOutOfRangeError(G, B, E);
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uint32_t RawInstr = *(little32_t *)FixupPtr;
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assert((RawInstr & 0x7fffffff) == 0x14000000 &&
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"RawInstr isn't a B or BR immediate instruction");
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uint32_t Imm = (static_cast<uint32_t>(Value) & ((1 << 28) - 1)) >> 2;
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uint32_t FixedInstr = RawInstr | Imm;
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*(little32_t *)FixupPtr = FixedInstr;
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break;
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}
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case Pointer32: {
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uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
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if (Value > std::numeric_limits<uint32_t>::max())
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return makeTargetOutOfRangeError(G, B, E);
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*(ulittle32_t *)FixupPtr = Value;
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break;
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}
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case Pointer64:
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case Pointer64Anon: {
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uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
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*(ulittle64_t *)FixupPtr = Value;
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break;
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}
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case Page21:
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case TLVPage21:
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case GOTPage21: {
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assert((E.getKind() != GOTPage21 || E.getAddend() == 0) &&
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"GOTPAGE21 with non-zero addend");
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uint64_t TargetPage =
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(E.getTarget().getAddress().getValue() + E.getAddend()) &
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~static_cast<uint64_t>(4096 - 1);
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uint64_t PCPage =
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FixupAddress.getValue() & ~static_cast<uint64_t>(4096 - 1);
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int64_t PageDelta = TargetPage - PCPage;
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if (!isInt<33>(PageDelta))
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return makeTargetOutOfRangeError(G, B, E);
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uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
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assert((RawInstr & 0xffffffe0) == 0x90000000 &&
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"RawInstr isn't an ADRP instruction");
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uint32_t ImmLo = (static_cast<uint64_t>(PageDelta) >> 12) & 0x3;
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uint32_t ImmHi = (static_cast<uint64_t>(PageDelta) >> 14) & 0x7ffff;
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uint32_t FixedInstr = RawInstr | (ImmLo << 29) | (ImmHi << 5);
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*(ulittle32_t *)FixupPtr = FixedInstr;
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break;
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}
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case PageOffset12: {
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uint64_t TargetOffset =
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(E.getTarget().getAddress() + E.getAddend()).getValue() & 0xfff;
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uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
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unsigned ImmShift = getPageOffset12Shift(RawInstr);
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if (TargetOffset & ((1 << ImmShift) - 1))
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return make_error<JITLinkError>("PAGEOFF12 target is not aligned");
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uint32_t EncodedImm = (TargetOffset >> ImmShift) << 10;
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uint32_t FixedInstr = RawInstr | EncodedImm;
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*(ulittle32_t *)FixupPtr = FixedInstr;
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break;
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}
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case TLVPageOffset12:
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case GOTPageOffset12: {
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assert(E.getAddend() == 0 && "GOTPAGEOF12 with non-zero addend");
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uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
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assert((RawInstr & 0xfffffc00) == 0xf9400000 &&
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"RawInstr isn't a 64-bit LDR immediate");
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uint32_t TargetOffset = E.getTarget().getAddress().getValue() & 0xfff;
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assert((TargetOffset & 0x7) == 0 && "GOT entry is not 8-byte aligned");
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uint32_t EncodedImm = (TargetOffset >> 3) << 10;
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uint32_t FixedInstr = RawInstr | EncodedImm;
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*(ulittle32_t *)FixupPtr = FixedInstr;
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break;
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}
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case LDRLiteral19: {
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assert((FixupAddress.getValue() & 0x3) == 0 && "LDR is not 32-bit aligned");
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assert(E.getAddend() == 0 && "LDRLiteral19 with non-zero addend");
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uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
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assert(RawInstr == 0x58000010 && "RawInstr isn't a 64-bit LDR literal");
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int64_t Delta = E.getTarget().getAddress() - FixupAddress;
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if (Delta & 0x3)
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return make_error<JITLinkError>("LDR literal target is not 32-bit "
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"aligned");
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if (Delta < -(1 << 20) || Delta > ((1 << 20) - 1))
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return makeTargetOutOfRangeError(G, B, E);
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uint32_t EncodedImm = ((static_cast<uint32_t>(Delta) >> 2) & 0x7ffff) << 5;
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uint32_t FixedInstr = RawInstr | EncodedImm;
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*(ulittle32_t *)FixupPtr = FixedInstr;
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break;
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}
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case Delta32:
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case Delta64:
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case NegDelta32:
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case NegDelta64: {
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int64_t Value;
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if (E.getKind() == Delta32 || E.getKind() == Delta64)
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Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
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else
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Value = FixupAddress - E.getTarget().getAddress() + E.getAddend();
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if (E.getKind() == Delta32 || E.getKind() == NegDelta32) {
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if (Value < std::numeric_limits<int32_t>::min() ||
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Value > std::numeric_limits<int32_t>::max())
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return makeTargetOutOfRangeError(G, B, E);
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*(little32_t *)FixupPtr = Value;
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} else
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*(little64_t *)FixupPtr = Value;
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break;
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}
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default:
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return make_error<JITLinkError>(
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"In graph " + G.getName() + ", section " + B.getSection().getName() +
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"unsupported edge kind" + getEdgeKindName(E.getKind()));
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}
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return Error::success();
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}
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const char *getEdgeKindName(Edge::Kind R) {
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switch (R) {
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case Branch26:
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return "Branch26";
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case Pointer64:
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return "Pointer64";
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case Pointer64Anon:
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return "Pointer64Anon";
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case Page21:
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return "Page21";
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case PageOffset12:
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return "PageOffset12";
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case GOTPage21:
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return "GOTPage21";
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case GOTPageOffset12:
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return "GOTPageOffset12";
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case TLVPage21:
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return "TLVPage21";
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case TLVPageOffset12:
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return "TLVPageOffset12";
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case PointerToGOT:
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return "PointerToGOT";
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case PairedAddend:
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return "PairedAddend";
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case LDRLiteral19:
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return "LDRLiteral19";
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case Delta32:
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return "Delta32";
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case Delta64:
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return "Delta64";
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case NegDelta32:
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return "NegDelta32";
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case NegDelta64:
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return "NegDelta64";
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default:
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return getGenericEdgeKindName(static_cast<Edge::Kind>(R));
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}
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}
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} // namespace aarch64
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} // namespace jitlink
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} // namespace llvm
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