6c8c816b17
This PR fixes the feature detection for RISC-V floating-point support in LLVM's libc implementation. The `__riscv_flen` macro represents the floating-point register width in bits (32, 64, or 128). Since Extension D is specifically documented as implying F, we can use simple >= comparisons to detect them. For half-precision support, the implementation checks for the Zfhmin extension as RVA22 and RVA23 profiles only require Zfhmin rather than the full Zfh extension. Zfh also implies Zfhmin, so checking for Zfhmin should cover all cases.
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