This merges more AMDGPU ABI lowering code into the generic call
lowering. Start cleaning up by factoring away more of the pack/unpack
logic into the buildCopy{To|From}Parts functions. These could use more
improvement, and the SelectionDAG versions are significantly more
complex, and we'll eventually have to emulate all of those cases too.
This is mostly NFC, but does result in some minor instruction
reordering. It also removes some of the limitations with mismatched
sizes the old code had. However, similarly to the merge on the input,
this is forcing gfx6/gfx7 to use the gfx8+ ABI (which is what we
actually want, but SelectionDAG is stuck using the weird emergent
ABI).
This also changes the load/store size for stack passed EVTs for
AArch64, which makes it consistent with the DAG behavior.
65 lines
2.5 KiB
C++
65 lines
2.5 KiB
C++
//===- lib/Target/AMDGPU/AMDGPUCallLowering.h - Call lowering -*- C++ -*---===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file describes how to lower LLVM calls to machine code calls.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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namespace llvm {
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class AMDGPUTargetLowering;
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class MachineInstrBuilder;
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class AMDGPUCallLowering final : public CallLowering {
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void lowerParameterPtr(Register DstReg, MachineIRBuilder &B, Type *ParamTy,
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uint64_t Offset) const;
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void lowerParameter(MachineIRBuilder &B, Type *ParamTy, uint64_t Offset,
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Align Alignment, Register DstReg) const;
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bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
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SmallVectorImpl<BaseArgInfo> &Outs,
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bool IsVarArg) const override;
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bool lowerReturnVal(MachineIRBuilder &B, const Value *Val,
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ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const;
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public:
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AMDGPUCallLowering(const AMDGPUTargetLowering &TLI);
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bool lowerReturn(MachineIRBuilder &B, const Value *Val,
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ArrayRef<Register> VRegs,
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FunctionLoweringInfo &FLI) const override;
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bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F,
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ArrayRef<ArrayRef<Register>> VRegs) const;
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bool lowerFormalArguments(MachineIRBuilder &B, const Function &F,
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ArrayRef<ArrayRef<Register>> VRegs,
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FunctionLoweringInfo &FLI) const override;
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bool passSpecialInputs(MachineIRBuilder &MIRBuilder,
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CCState &CCInfo,
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SmallVectorImpl<std::pair<MCRegister, Register>> &ArgRegs,
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CallLoweringInfo &Info) const;
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bool lowerCall(MachineIRBuilder &MIRBuilder,
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CallLoweringInfo &Info) const override;
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static CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg);
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static CCAssignFn *CCAssignFnForReturn(CallingConv::ID CC, bool IsVarArg);
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};
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} // End of namespace llvm;
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#endif
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